Computer Architecture and Assembly Language

Course Name: Computer Architecture and Assembly Language

Course ID: COMP233/L

Course Instructor: Mr. Ahmad Jawdat

Lecture Notes

Each character is stored inside a cell of bits.

A seven-bit cell

Some possible values in a seven-bit cell

Representation of Unsigned Integers:

Range for unsigned integers

In real world there is no limit to counting numbers.

A real computer has a finite number of bits in each cell.

There is a limit to the numbers that can be stored in a cell.

The number 22 (dec) in a seven-bit cell

The range of unsigned values depends on the number of bits in a cell.

A sequence of all 0s represents the smallest unsigned value.

000 0000

A sequence of all 1s represents the largest.

111 1111

000 0000 (bin) = 0 (dec).

111 1111(bin) = 127 (dec).

Unsigned addition:

Similar to unsigned 1addition in the decimal system.

Addition rules in binary system:

0 + 0 = 0

0 + 1 = 1

1 + 0 = 1

1 + 1 = 10

Carry technique:

If two numbers in a column add to a value greater than 1

1 must be carried to the next column.

Example1:

01 1010 (bin) = 26 (dec)

01 0001(bin) = 17 (dec)

10 1011 (bin) = 43 (dec)

26 + 17 = 43

Example 2:

The Carry Bit:

When adding two numbers in binary system, we are limited by the number of bits in a cell.

Sometimes the sum is too large to fit into the cell.

Six-bit cell range is 0 to 63 (dec).

The CPU contains a special bit called the carry bit.

Denoted C.

When two binary numbers were added, if the sum of the left-most column (the most significant bit) produces a carry.

The C is set to 1.

O/W

The C is cleared to 0.

Examples:

In the second example the sum is equal to 68.

Too large to fit into the six-bit cell.

Twos Complement Binary Representation

The unsigned binary representation works only for nonnegative integers.

So store a negative integers, we will have a two part cell.

One-bit sign to store the sign of the number.

Is called the sign bit.

1 for negative and 0 for positive.

The rest is to store the nonnegative number.

Is called the magnitude.

+ 5(dec) = 0 00101 (bin)

- 5 (dec) = 1 00101 (bin)

In decimal, when you add -5 to +5 you will get 0.

Using the previously mentioned representation WE WILL NOT GET 0.

It would be more convenient if the hardware of the CPU could add the numbers for +5 and -5 to get zero.

The positive number has a 0 sign bit and a magnitude as in the unsigned binary representation.

+5 will be 00 0101.

-5 will not be 10 0101

11 1011.

Under the rule of binary addition for a six-bit cell

The number 11 1011 is called the additive inverse of 00 0101

The operation of finding the additive inverse is called negation, NEG.

Negating a number is called taking its twos complement.

Steps for taking the twos complement of a number:

1. Finding the ones complement.

The binary number with all the 1s changed to 0s and all the 0s changed to 1s.

Is called the NOT operation.

2. Adding one to the ones complement.

Example:

Take the twos complement of +5

Solution:

+5(dec) = 00 0101 (bin).

1. Ones complement:

NOT 00 0101 = 11 1010

2. Adding one to the ones complement

Therefore,

-5 (dec) = 11 1011 (bin)

General rule:

The twos complement of a number is 1 plus its ones complement.

NEG x = 1 + NOT x.

Example:

Take the twos complement of -5.

Solution:

NOT 11 1011 = 00 0100

Therefore,

+5 (dec) = 00 0101 (bin)

Twos Complement Range:

Range of a four-bit cell system.

There are only three bits are reserved for magnitude.

The greatest unsigned number to be stored is 0 111 (+7).

The previous figure shows the two complement up to +7.

It automatically produces 1 in the sign bit of the negative numbers.

-5 is obtained from -6 by adding 1.

-6 is obtained from -7 by adding 1.

We can also obtain -7 by from -8 by adding one.

We can not also obtained -8 by from -9 by adding one,

Because -9 can not be represented by a four-digit cell.

The full range for four-bit cell for signed integers is:

1000 to 0111, or

-8 to +7.

A general rule:

Regardless of the number of bits in the cell,

The largest positive number is a single 0 followed by all 1s.

The negative number with the largest magnitude is a single 1 followed by all 0s.

Its magnitude is one greater than the magnitude of the largest positive integer.

The number -1(dec) is represented as all 1s

Example:

The range for six-bit two complement representation is

10 0000 to 01 1111, or

-32 to 31

Base conversion

To convert a negative number from decimal to binary is a two-step process.

1. Convert its magnitude from decimal to binary as in unsigned binary representation.

2. Negate it by taking the twos complement.

Example: for -7 (dec) in a 10-bit cell.

1. +7 (dec) = 00 0000 01111 (bin)

2. NOT 00 0000 0111 = 11 1111 1000

So -7 (dec) is 11 1111 1001 (bin)

To convert a number from binary to decimal in a computer that uses twos complement representation, always check the sign bit first.

If it is 0, the number is positive:

Convert as in unsigned representation.

If it is 1, the number is negative:

1. Make the number positive by negating it.

2. Convert it to decimal as in unsigned representation.

Example:

You have a 10 bit cell that contains 11 1101 1010. What decimal number does it represent?

Solution:

The sign is 1, therefore it is negative.

Negate the number:

NOT 11 1101 1010 = 00 0010 0101

00 0010 0110 (bin) = 38 (dec). Therefore,

11 1101 1010 (bin) = -38 (dec)

The Overflow Bit

The hardware does not make distinction between the two types of data representation

Unsigned and

Twos complement.

When adding the content of two memory cells, the CPU uses the rules for binary addition on the bit sequences, regardless of their types.

In unsigned representation, if the sum is out of range:

The hardware stores the incorrect result, and

Set the carry but (C) to 1.

Its up to the software to examine the C bit after the addition has been made, and take the appropriate action.

In the twos complement the C bit no longer indicates whether a sum is in range or out of range.

An overflow condition occurs when the result of an operation in out of range.

To flag this condition for signed numbers, the CPU contain another special character called the overflow bit, V.

When adding two numbers and the result is interpreted to twos complement,

If its out of range the V is set to 1.

O/W is set to cleared, set to 0.

Again its up to the software to check the V bit, and take the appropriate actions.

The software inspects the signs of the numbers and the sum.

If you add two positives and get a negative sum, or if you add two negatives and get a positive sum:

You have got an overflow.

It is not possible to get an overflow by adding a positive and a negative.

The Negative and Zero bits

The software tests the special bits to perform some operations:

C bit to detect overflow condition in unsigned integers.

V bit to detect overflow condition in signed integers.

There are also other bits that are used for similar purposes:

N bit to detect a negative result.

Z bit to detect a Zero result.

N bit:

N = 1 if the result is negative.

N = 0 O/W.

Z bit:

Z = 1 if the result is all zeros.

Z = 0 O/W

Representation across levels:

When you write a program in C++ and run on a seven-bit computer,

The values of type int are stored in twos complement representation.

When you add two integers for example:

i + j; where i = 8 and j = -2, the ISA level performs the operation as follows:

When you output like this:

cout