Ward 1 CS 160 Instruction Set Architecture Ward 2 CS 160 Background & Introduction Ward 3 CS 160 Computers and Programs • A simplified model of a computer consists of a processing unit (CPU) and a memory. • CPU can understand simple instructions: – read/write a memory location – add two numbers – compare numbers – etc. Ward 4 CS 160 Machine Code • An executable program is a sequence of these simple instructions. • The sequence is stored in memory (Von Neumann architecture). • The CPU processes the simple instructions sequentially. – Some instructions can tell the CPU to jump to a new place in memory to get the next instruction.
Transcript
Ward 1CS 160
Instruction Set Architecture
Ward 2CS 160
Background & Introduction
Ward 3CS 160
Computers and Programs
• A simplified model of a computer consists of a processing unit (CPU) and a memory.
• CPU can understand simple instructions:– read/write a memory location– add two numbers– compare numbers– etc.
Ward 4CS 160
Machine Code
• An executable program is a sequence of these simple instructions.
• The sequence is stored in memory (Von Neumann architecture).
• The CPU processes the simple instructions sequentially.– Some instructions can tell the CPU to jump
to a new place in memory to get the next instruction.
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Instructions
• Each instruction is stored in memory as a bunch of bits.
• The CPU decodes the bits to determine what should happen.
• For example, the instruction to add 2 numbers might look like this:
10100110
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Sample Program in Words
# Instruction1 Set memory[801] to hold 000000012 Set memory[802] to hold 000000003 If memory[802] = 10 jump to instruction #84 increment memory[802]5 set memory[803] to 2 times memory[801]6 put memory[803] in to memory[801]7 jump to instruction #38 print memory[801]
• Assembly Language is much easier to deal with than Machine Language, but you still need to know about all the instructions.
• People/Companies have developed languages that were independent of the specific machine language (i.e., portable).– More abstract representation of
instructions.
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High-Level Languages
• Many high-level languages have been developed.– Different ways of representing
computations.– Different languages for different needs:
• symbolic vs. numeric computation• human efficiency vs. program efficiency• portability• extensibility
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Examples of High Level Languages
• C• C++• Fortran• Java• Ada• Basic• Algo
Some High-Level Languages are “higher” than others.
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Sample Program In C
set memory[801] to hold 00000001set memory[802] to hold 00000000if memory[802] = 10 jump to instruction #8increment memory[802]set memory[803] to 2 times memory[801]put memory[803] in to memory[801]jump to instruction #3print memory[801]
x=1;i=0;while (i!=10) {
i++;x=x*2;
}
printf("%d",x);
}
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Compiler
C Program
int main() {int i=1;. . .
C Program
int main() {int i=1;. . .
MachineLanguageProgram
0100100110010100
MachineLanguageProgram
0100100110010100
C CompilerC Compiler
Created with text editor or development environment
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Many Different Compilers
• Sample C Compilers:– GNU gcc– Portland pgcc– Keil C– Intel Win32 C – Sun C– Fujitsu C– IBM AIX C– . . .
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Instruction Set Characteristics & Functions
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Elements of an Instruction
• Operation code (Op code)– Do this
• Source Operand(s) reference– To this
• Result Operand reference– Put the answer here
• Next Instruction Reference (rare)– When you have done that, do this...
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Instruction Cycle State Diagram(without Interrupts)
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Simple Instruction Format
• How many instructions (Opcodes) can we have in our Instruction Set?
• How much memory (or virtual memory) can we directly access in our system?
24 = 16
26 = 64
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Number of Addresses [1]
• 3 addresses– Operand 1, Operand 2, Result– a = b + c;– May be a fourth - next instruction (rare -
usually implicit)– Needs very long words to hold everything.
Why?– Typically indirect addressing using registers
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Number of Addresses [2]
• 2 addresses– One address doubles as operand and result– a = a + b– Reduces length of instruction– Requires some extra work
• Temporary storage to hold some results
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Number of Addresses [3]
• 1 address– Implicit second address– Usually a register (accumulator)– Common on early machines
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Number of Addresses [4]
• 0 (zero) addresses– All addresses implicit– Uses a stack– e.g. push a– push b– add– pop c
– c = a + b
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How Many Addresses
• More addresses– More complex (powerful?) instructions– More registers
• Inter-register operations are quicker
– Fewer instructions per program
• Fewer addresses– Less complex (powerful?) instructions– More instructions per program– Faster fetch/execution of instructions
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Types of Operand
• Addresses• Numbers
– Integer/floating point
• Characters– ASCII, etc.
• Logical Data– Bits or flags
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Operations
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Instructions: Types of Operation
• Data Transfer• Arithmetic• Logical• Conversion• I/O• Transfer of Control• System Control
• Data Access & Transfer • Arithmetic• Logical• Floating-Point • Conditional &
Unconditional Branch• Processor Control
Two different classifications
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Common Data Transfer Operations
• Specify– Source– Destination– Amount of data
• May be different instructions for different movements– e.g. IBM 370
• Or one instruction and different addresses– e.g. VAX
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Common Arithmetic Operations
• Add, Subtract, Multiply, Divide• Signed Integer• Floating point ?• May include
– Increment (a++)– Decrement (a--)– Negate (-a)
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Common Shift and Rotate Operations
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Common Logical Operations
• Bitwise operations• AND, OR, NOT
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Common Conversion Operations
• E.g. Binary to Decimal
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Common Input/Output Operations
• May be specific instructions• May be done using data movement
instructions (memory mapped)• May be done by a separate controller
(DMA)
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Common Transfer of Control Operations
• Branch– e.g. branch to x if result is zero
• Skip– e.g. increment and skip if zero
ISZ Register1Branch xxxxADD A
• Subroutine call– c.f. interrupt call
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Branch Instruction
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Nested Procedure Calls
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Use of Stack
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Common Systems Control Operations
• Privileged instructions• CPU needs to be in specific state
– Ring 0 on 80386+– Kernel mode
• For operating systems use
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Example Instruction Set
MIPS Instruction Set
• Early RISC Design• Design goals:
– Speed• Ensure one instruction can complete every
clock cycle
– Minimalistic• Contain the fewest possible instructions
necessary
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MIPS Instruction Set (Part I)
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MIPS Instruction Set (Part II)
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MIPS Floating-Point Instructions
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Aesthetics of Instruction Sets
• Elegance– Balanced– No frivolous or useless instructions
• Orthogonality– No unnecessary duplication– No overlap among instructions
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Prinicple of Orthogonality
The principle of orthogonality specifies that each instruction should perform a unique task without duplicating or overlapping the function of other instructions
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Typical Simple RISC Design
• Instructions designed to– Complete in one clock cycle
• Performs a basic computation
– Support restricted set of operations• Register operations• Load/Store operations
– Fixed instruction length
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Addressing Modes
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Addressing Modes
• Immediate• Direct• Register• Indirect
– Memory– Register
• Displacement/Indexed – various types • Stack
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Immediate Addressing
• Operand is part of instruction• Operand = address field• e.g. ADD 5
– Add 5 to contents of accumulator– 5 is operand
• No memory reference to fetch data• Fast• Limited range
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Immediate Addressing Diagram
OperandOpcode
Instruction
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Direct Addressing
• Address field contains address of operand• Effective address (EA) = address field (A)• e.g. ADD A
– Add contents of cell A to accumulator– Look in memory at address A for operand
• Single memory reference to access data• No additional calculations to work out
effective address• Limited address space
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Direct Addressing Diagram
Address AOpcode
Instruction
Memory
Operand
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Register Addressing (1)
• Operand is held in register named in address filed
• EA = R• Limited number of registers
– Very small address field needed – Shorter instructions– Faster instruction fetch
• Very limited address space– Number of registers much smaller than
memory
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Register Addressing (2)
• No memory access• Very fast execution• Large number of registers helps
performance– Requires good assembly programming or
compiler writing• Good (multiple) use of operands after in registers
– C programming • register int a;
• Compare: direct addressing
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Register Addressing Diagram
Register Address ROpcode
Instruction
Registers
Operand
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Memory Indirect Addressing [1]
• Memory cell pointed to by address field contains the address of (pointer to) the operand
• EA = (A)– Look in A, find address (A) and look there
for operand• e.g. ADD (A)
– Add contents of cell pointed to by contents of A to accumulator
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Memory Indirect Addressing [2]
• Large address space • 2n where n = word length• May be nested, multilevel, cascaded
– e.g. EA = (((A)))• Draw the diagram yourself
• Multiple memory accesses to find operand
• Hence slower
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Memory Indirect Addressing Diagram
Address AOpcode
Instruction
Memory
Operand
Pointer to operand
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Register Indirect Addressing
• Compare: indirect addressing• EA = (R)• Operand is in memory cell pointed to by
contents of register R• Large address space (2n)• One fewer memory access than indirect
addressing
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Register Indirect Addressing Diagram
Register Address ROpcode
Instruction
Memory
OperandPointer to Operand
Registers
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Displacement Addressing
• EA = A + (R)• Address field hold two values
– A = base value– R = register that holds displacement– or vice versa
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Displacement Addressing Diagram
Register ROpcode
Instruction
Memory
OperandPointer to Operand
Registers
Address A
+
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Relative Addressing
• A version of displacement addressing• R = Program counter, PC• EA = A + (PC)• i.e. get operand from A cells from
current location pointed to by PC• Compare: locality of reference & cache
usage
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Base-Register Addressing
• Version of displacement addressing• A holds displacement• R holds pointer to base address• R may be explicit or implicit• Useful for virtual memory and paging
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Indexed Addressing
• A = base• R = displacement• EA = A + R• Good for accessing arrays
– EA = A + R– R++
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Stack Addressing
• Operand is (implicitly) on top of stack• e.g.
– ADD Pop top two items from stackand add
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Types of Operands
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Implicit Encoding
• For a given opcode, the type of each operand is fixed
• More opcodes required
• Example– add_signed_immediate_to_register
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Examples of Implicit
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Explicit Encoding
• Operand specifies type and value
• Fewer opcodes required
• Example– Opcode is add, operands specify register
and immediate
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Examples of Explicit
R1 = R1 + R2
R1 = R1 + -93
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Combination
• Some processors provide hardware that can compute an operand value from multiple sources
• Typically, a sum
• Example– register-offset specifies register and
immediate value– Processor adds immediate value to
contents of register
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Example
R2 = R2-17 + R4+76
Useful when referencing a data aggregate such as C language struct
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Tradeoffs for Operand Types
• No single style of operands optimal for all purposes– All styles discussed have been implemented
• Tradeoff among– Ease of programming– Fewer instructions– Smaller instructions– Larger range of immediate values– Faster operand fetch and decode– Decreased hardware size
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Some Common ISAs• Alpha AXP (DEC Alpha) • ARM (Acorn RISC Machine) (Advanced RISC Machine now ARM
