Computers organizationComputers organization& &
Assembly LanguageAssembly Language
Cont Chapter 1Cont Chapter 1
THE 80x86 MICROPROCESSOR THE 80x86 MICROPROCESSOR( Management Memory )( Management Memory )
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Program SegmentsProgram Segments
Memory map of the IBM PC
80x86 Addressing Modes
Three Addressing ModelsThree Addressing Models
Flat modelFlat model- - The modern way of memory addressingThe modern way of memory addressing
- - All segment registers are loaded with 0All segment registers are loaded with 0
Segmented modelSegmented model- Segment registers are loaded differently- Segment registers are loaded differently
- The goal is to increase protection- The goal is to increase protection
Real-addressing modelReal-addressing model- Backward compatible with 8086- Backward compatible with 8086
- Each segment is 64Kbytes- Each segment is 64Kbytes
- Segments are laid out in 20-bit address space- Segments are laid out in 20-bit address space
Program SegmentsProgram SegmentsA program consists of four segments:A program consists of four segments:
The The Code SegmentCode Segment contains the contains the Assembly language instructions. Assembly language instructions. The The Data SegmentData Segment is used to store is used to store information (data) that needs to be information (data) that needs to be processed by the instructions in the processed by the instructions in the code segment. code segment. The The Stack SegmentStack Segment is used to store is used to store information temporarily. information temporarily. The The Extra SegmentExtra Segment is used to is used to temporarily segment to the above temporarily segment to the above three segments. three segments.
DataSegment
64 KB
CodeSegment
64 KB
ExtraSegment
64 KB
StackSegment
64 KB
1000 DS
2000 CS
4000 ES
3000 SS
10000
1FFFF20000
2FFFF30000
3FFFF40000
4FFFF
Logical address and physical address
In Intel literature concerning the 8086, there are three types of addresses mentioned frequently: the physical address, the offset address, and the logical address. The physical address is the 20-bit address that is actually put on the address pins of the 8086 microprocessorThis address can have a range of 00000H to FFFFFH for the 8086 and real-mode 286,386, and 486 CPUs. This is an actual physical location in RAM or ROM within the 1 megabyte memory range. The offset address is a location within a 64K-byte segment range. Therefore, an offset address can range from 0000H to FFFFH. The logical address consists of a segment value and an offset address.
Code segmentCode segmentTo execute a program, the 8086 fetches the To execute a program, the 8086 fetches the instructions from the code segment. instructions from the code segment.
The logical address of an instruction always The logical address of an instruction always consists of a CS (code segment) and an IP consists of a CS (code segment) and an IP (instruction pointer), shown in CS:IP format. (instruction pointer), shown in CS:IP format.
The physical address for the location of the The physical address for the location of the instruction is generated by shifting the CS left instruction is generated by shifting the CS left one hex digit and then adding it to the IP. IP one hex digit and then adding it to the IP. IP contains the offset address. contains the offset address.
The resulting 20-bit address is called the The resulting 20-bit address is called the physical address.physical address.
Code segmentCode segment
Assume values in Assume values in CS and IP as CS and IP as shown in the shown in the diagram. The offset diagram. The offset address is address is contained in IP; in contained in IP; in this case it is this case it is 95F3H. The logical 95F3H. The logical address is CS:IP, address is CS:IP, or 2500:95F3H. or 2500:95F3H.
The physical The physical address will be address will be 25000 + 95F3 = 25000 + 95F3 = 2E5F3H.2E5F3H.
0
CS
052 3F59
IP
0
+
Start with CS
052
3F59
0
0052
Shift left CS
Add IP
Physical Address F5E2 3
Example 1-1Example 1-1If CS = 24F6H and IP = 634AH, show:(a) The logical address(b) The offset address(c) The physical address(d) The lower range(e) The upper range of the code segment
Solution:(a) The logical address = 24F6:634A(b) The offset address = 634A(c) The physical address = 24F60 + 634A = 2B2AA (d) The lower range = 24F60 + 0000 = 24F60 (e) The upper range of the code segment
= 24F60 + FFFF = 34F5F
Logical address vs. physical address
Logical addressLogical address
CS : IPCS : IP
Machine languageMachine language
opcode and operandopcode and operand
Assembly languageAssembly language
mnemonics and operandmnemonics and operand
1132:01001132:0100
1132:01021132:0102
1132:01041132:0104
1132:01061132:0106
1132:01081132:0108
1132:010A1132:010A
1132:010C1132:010C
1132:010E1132:010E
1132:01101132:0110
1132:01121132:0112
80578057
86868686
82728272
89018901
88C788C7
839F839F
84208420
01000100
01090109
05351F05351F
MOV AL,57MOV AL,57
MOV DH,86MOV DH,86
MOV DL,72MOV DL,72
MOV CX,DXMOV CX,DX
MOV BH.ALMOV BH.AL
MOV BL,9FMOV BL,9F
MOV AH,20MOV AH,20
ADD AX,DXADD AX,DX
ADD CX,BXADD CX,BX
ADD AX,1F35ADD AX,1F35
Logical address
vs. physical address
Logical Logical addressaddress
Physical Physical addressaddress
Machine Code Machine Code ContentsContents
1132:01001132:0100
1132:01011132:0101
1132:01021132:0102
1132:01031132:0103
1132:01041132:0104
1132:01051132:0105
1132:01061132:0106
1132:01071132:0107
1132:01081132:0108
1132:01091132:0109
1132:010A1132:010A
1132:01081132:0108
1132:010C1132:010C
1132:01001132:0100
1132:010E1132:010E
1132:010F1132:010F
1132:01101132:0110
1132:01111132:0111
1132:01121132:0112
1132:01131132:0113
1132:01141132:0114
1142011420
1142111421
1142211422
1142311423
1142411424
1142511425
1142611426
1142711427
1142811428
1142911429
1142A1142A
1142B1142B
1142C1142C
1142011420
1142E1142E
1142F1142F
1143011430
1143111431
1143211432
1143311433
1143411434
B0B0
5757
B6B6
8686
B2B2
7272
8989
0101
8888
C7C7
8383
9F9F
8484
2020
0101
D0D0
0101
0909
0505
3535
1F1F
Data SegmentData SegmentAssume that a program is being written to add 5 Assume that a program is being written to add 5 bytes of data, such as 25H, 12H, 15H, 1FH, and 2BH, bytes of data, such as 25H, 12H, 15H, 1FH, and 2BH, where each byte represents a person's daily where each byte represents a person's daily overtime pay.overtime pay.One way to add them is as follows:One way to add them is as follows:
MOV AL, 00HMOV AL, 00H ;initialize AL;initialize ALADD AL, 25HADD AL, 25H ;add 25H to AL;add 25H to ALADD AL, 12HADD AL, 12H ;add 12H to AL;add 12H to ALADD AL, 15HADD AL, 15H ;add 1FH to AL;add 1FH to ALADD AL, 1FHADD AL, 1FH ;add 1FH to AL;add 1FH to ALADD AL, 2BHADD AL, 2BH ;add 2BH to AL;add 2BH to AL
In the program above, the data and code are mixed In the program above, the data and code are mixed together in the instructions.together in the instructions.
Data SegmentData SegmentIn 80x86 microprocessors, the area of memory set aside for data In 80x86 microprocessors, the area of memory set aside for data is called the data segment. is called the data segment. Code segment is associated with CS and IP, the data segment Code segment is associated with CS and IP, the data segment uses register DS and an offset value.uses register DS and an offset value.Assume that the offset for the data segment begins at 200H. The Assume that the offset for the data segment begins at 200H. The data is placed in memory locations:data is placed in memory locations:
DS:0200 = 25DS:0200 = 25DS:0201 = 12DS:0201 = 12DS:0202 = 15DS:0202 = 15DS:0203 = 1FDS:0203 = 1FDS:0204 = 28DS:0204 = 28
and the program can be rewritten as follows:and the program can be rewritten as follows:MOV AL, 0MOV AL, 0 ;clear AL;clear ALADD AL, [0200] ADD AL, [0200] ;add the contents of DS:200 to AL;add the contents of DS:200 to ALADD AL, [0201] ADD AL, [0201] ;add the contents of DS:201 to AL;add the contents of DS:201 to ALADD AL, [0202] ADD AL, [0202] add the contents of DS:202 to ALadd the contents of DS:202 to ALADD AL, [0203] ADD AL, [0203] ;add the contents of DS:203 to AL;add the contents of DS:203 to ALADD AL, [0204] ADD AL, [0204] ;add the contents of DS:204 to AL;add the contents of DS:204 to AL
Data SegmentData SegmentThis program will run with any set of data. Changing the data has This program will run with any set of data. Changing the data has no effect on the code. no effect on the code. If the data had to be stored at a different offset address, say If the data had to be stored at a different offset address, say 450H, the program would have to be rewritten. 450H, the program would have to be rewritten. One way to solve this problem would be to use a register to hold One way to solve this problem would be to use a register to hold the offset address. the offset address. The 8086/88 allows only the use of registers BX, SI, and DI as The 8086/88 allows only the use of registers BX, SI, and DI as offset registers for the data segment. offset registers for the data segment. In the following example, BX is used as a pointer:In the following example, BX is used as a pointer:MOVMOV AL, 0AL, 0 ;initialize AL;initialize ALMOV BX, 0200HMOV BX, 0200H ;BX points to the offset address of first ;BX points to the offset address of first bytebyteADDADD AL, [BX]AL, [BX] ;add the first byte to AL;add the first byte to ALINCINC BXBX ;increment BX to point to the next byte;increment BX to point to the next byteADDADD AL, [BX]AL, [BX] ;add the next byte to AL;add the next byte to ALINCINC BXBX ;increment the pointer;increment the pointerADDADD AL, [BX]AL, [BX] :add the next byte to AL:add the next byte to ALINCINC BXBX ;increment the pointer;increment the pointer
Example 1-2Example 1-2Assume that DS is 5000 and the offset is 1950. Assume that DS is 5000 and the offset is 1950. Calculate the physical address of the byte.Calculate the physical address of the byte.
Solution:The physical address will be 50000 + 1950 = 51950.
DSDS :: OffsetOffset
55 00 00 00 :: 11 99 55 00
Start with DSStart with DS 55 00 00 00
Shift DS leftShift DS left 55 00 00 00 00
Add offsetAdd offset 11 99 55 00
55 11 99 55 00
Example 1-3Example 1-3If DS = 7FA2H and the offset is 438E, (a) Calculate the physical address(b) Calculate the lower range(c) Calculate the upper range of the data segment(d) Show the logical address
Solution:
(a) The physical address = 7FA20 + 438E = 83DAE (b) The lower range = 7FA20 + 0000 = 7FA20 (c) The upper range of the code segment
= 7FA20 + FFFF = 8FA1F (d) The logical address = 7FA2 : 438E
Example 1-4Example 1-4
Assume that the DS register is 578C. To access a given byte of data at physical memory location 67F66. does the data segment cover the range where the data is located? If not what changes need to be made?
Solution:
No, since the range is 578C0 to 678BF, locatIon67F66 is not included in this range.To access that byte, DS must be changed so that its range will include that byte.
Little endian conventionLittle endian conventionPrevious examples used 8-bit or I-byte data.Previous examples used 8-bit or I-byte data.What happens when 16-bit data is used? For example:What happens when 16-bit data is used? For example:MOV AX, 35F3HMOV AX, 35F3H ;Ioad 35F3H into AX;Ioad 35F3H into AXMOV [1500], AXMOV [1500], AX ;copy the contents of AX to offset 1500H;copy the contents of AX to offset 1500HIn cases like this, the low byte goes to the low memory location and In cases like this, the low byte goes to the low memory location and the high byte goes to the high memory address. the high byte goes to the high memory address. In example above, memory location DS:1500 contains F3H and In example above, memory location DS:1500 contains F3H and memory location DS:1501 contains 35H.memory location DS:1501 contains 35H.
DS:1500 = F3 DS:1500 = F3 DS:1501 = 35DS:1501 = 35This convention is called This convention is called little endianlittle endian versus versus big endianbig endian. . In the big endian method, the high byte goes to the low address.In the big endian method, the high byte goes to the low address.In the little endian method, the high byte goes to the high address In the little endian method, the high byte goes to the high address and the low byte to the low address. and the low byte to the low address. All Intel microprocessors and many minicomputers, use the little All Intel microprocessors and many minicomputers, use the little endian convention. endian convention. Motorola microprocessors (used in the Macintosh), use the big Motorola microprocessors (used in the Macintosh), use the big endian convention. endian convention.
Example 1-5Example 1-5Assume memory locations with the following contents: Assume memory locations with the following contents: DS:6826 = 48 and DS:6827 = 22.DS:6826 = 48 and DS:6827 = 22.Show the contents of register BX in the instructionShow the contents of register BX in the instruction
MOV BX, [6826]MOV BX, [6826]Solution:Solution:
According to the little endian convention, register BL contain According to the little endian convention, register BL contain the value from the low offset address 6826 and register BH the the value from the low offset address 6826 and register BH the value from offset address 6827, giving BL = 48H and BH = 22H.value from offset address 6827, giving BL = 48H and BH = 22H.
DS:6827 = 48DS:6827 = 48 BHBH BLBL
DS:6827 = 22DS:6827 = 22 2222 4848
Memory map of the IBM PCFor a program to be executed on the PC, For a program to be executed on the PC, DOS must first load it into RAM. DOS must first load it into RAM. The 20-bit address of the 8088/86 allows a The 20-bit address of the 8088/86 allows a total of 1 megabyte (1024K bytes) of total of 1 megabyte (1024K bytes) of memory space with the address range memory space with the address range 00000 - FFFFF.00000 - FFFFF.During the design phase of the firstDuring the design phase of the firstIBM PC, engineers had to decide on the IBM PC, engineers had to decide on the allocation of the 1-megabyte memory space allocation of the 1-megabyte memory space to various sections of the PC. to various sections of the PC. This memory allocation is called a memoryThis memory allocation is called a memory map.map.In this 1 megabyte, 640Kbytes from In this 1 megabyte, 640Kbytes from addresses 00000 - 9FFFFH were set aside addresses 00000 - 9FFFFH were set aside for RAM. for RAM. The 128K bytes from A0000H to BFFFFH The 128K bytes from A0000H to BFFFFH were allocated for video memory. were allocated for video memory. The remaining 256K bytes from C0000H to The remaining 256K bytes from C0000H to FFFFFH were set aside for ROM.FFFFFH were set aside for ROM.
RAM640 KB
00000H
9FFFFH
Video Display RAM
128 KB
A0000H
BFFFFH
ROM256 KB
C0000H
FFFFFH
Stack SegmentStack SegmentThe The stack stack is a section of read/write memory (RAM) used by the is a section of read/write memory (RAM) used by the CPU to store information temporarily. CPU to store information temporarily. If the stack is a section of RAM, there must be registers inside If the stack is a section of RAM, there must be registers inside the CPU to point to it. the CPU to point to it. The two main registers used to access the stack are the SS The two main registers used to access the stack are the SS (stack segment) register and the SP (stack pointer) register. (stack segment) register and the SP (stack pointer) register. These registers must be loaded before any instructions These registers must be loaded before any instructions accessing the stack are used. accessing the stack are used. The storing of a CPU register in the stack is called a The storing of a CPU register in the stack is called a pushpush, , and and loading the contents of the stack into the CPU register is called loading the contents of the stack into the CPU register is called a a poppop.. In other words, a register is pushed onto the stack to store it In other words, a register is pushed onto the stack to store it and popped off the stack to retrieve it. and popped off the stack to retrieve it. In the 80x86, the stack pointer register (SP) points at the In the 80x86, the stack pointer register (SP) points at the current memory location used for the top of the stack and as current memory location used for the top of the stack and as data is pushed onto the stack it is decremented. data is pushed onto the stack it is decremented. It is incremented as data is popped off the stack into the CPU. It is incremented as data is popped off the stack into the CPU. When an instruction pushes or pops a general-purpose When an instruction pushes or pops a general-purpose register, it must be the entire 16-bit register. register, it must be the entire 16-bit register.
Stack SegmentStack Segment
Pushing onto1ne stackPushing onto1ne stack– Notice in Example 1-6 that as each PUSH is executed, the Notice in Example 1-6 that as each PUSH is executed, the
contents of the register arc saved on the stack and SP is contents of the register arc saved on the stack and SP is decremented by 2. For every byte of data saved on the decremented by 2. For every byte of data saved on the stack, SP is decremented once, and since push is saving stack, SP is decremented once, and since push is saving the contents of a 16-bit register, it is decremented twice. the contents of a 16-bit register, it is decremented twice.
– That is the reason that 24H, the contents of AH, is saved in That is the reason that 24H, the contents of AH, is saved in memory location with address 1235 and AL in location 1234.memory location with address 1235 and AL in location 1234.
popping the stackpopping the stack– Popping the contents of the stack back into the 80x86 CPU Popping the contents of the stack back into the 80x86 CPU
is the opposite process of pushing. is the opposite process of pushing. – With every pop, the top 2 by1es of the stack are copied to With every pop, the top 2 by1es of the stack are copied to
the register specified by the instruction and the stack the register specified by the instruction and the stack pointer is incremented twice. pointer is incremented twice.
– Although the data actually remains in memory, it is not Although the data actually remains in memory, it is not accessible since the stack pointer is beyond that point. accessible since the stack pointer is beyond that point.
Example 1-6Example 1-6Assume that SP=1236, AX=24B6, DI= 85C2, and DX=5F93. Show Assume that SP=1236, AX=24B6, DI= 85C2, and DX=5F93. Show the contents of the stack as each of the following instructions is the contents of the stack as each of the following instructions is executed:executed:
PUSH AXPUSH AXPUSH DIPUSH DIPUSH DXPUSH DX
SS:1230 93 SS:1231 5F SS:1232 C2 C2 SS:1233 85 85 SS:1234 B6 B6 B6 SS:1235 24 24 24 SS:1236
START SP = 1236
After PUSH AX
SP = 1234
After PUSH DI
SP = 1232
After PUSH DX SP = 1230
Example 1-7Example 1-7Assuming that the stack is as shown below, and SP = 18FA, show the contents of the stack and registers as each of the following instructions is executed:
POP CXPOP DXPOP BX
SS:18FA 23 SS:18FB 14 SS:18FC 6B 6B SS:18FD 2C 2C SS:18FE 91 91 91 SS:18FF F6 F6 F6 SS:1900
START SP = 18FA
After POP CX
SP = 18FC CX = 1423
After POP DX
SP = 18FE DX = 2C6B
After POP BX
SP = 1900 BX = F691
Example 1-8Example 1-8If SS = 3500H and the SP is FFFEH, (a) Calculate the physical address of the stack(b) Calculate the lower range(c) Calculate the upper range of the stack segment(d) Show the logical address of the stack
Solution:
(a) The physical address = 35000 + FFFE = 44FFE (b) The lower range = 35000 + 0000 = 35000 (c) The upper range of the code segment
= 35000 + FFFF = 44FFF (d) The logical address = 3500 : FFFE
Example 1-9Example 1-9
What is the range of physical addresses if CS=FF59 ?
SolutionThe low range is FF590 (FF590 + 0000). The range goes to FFFFF and wraps around, from 00000 to 0FS8F (FF590 + FFFF = 0F58F), which is illustrated below.
0F58F
00000
FF590
FFFFF
OverlappingIn calculating the physical address, it is possible that two segments can overlap, which is desirable in some circumstances.
80x86 Addressing Modes
The CPU can access operands (data) in various ways, called addressing modes. The number of addressing modes is determined when the microprocessor is designed and cannot be changed. The 80x86 provides a total of seven distinct
addressing modes:1. register2. immediate3. direct4. register indirect5. based relative6. indexed relative7. based indexed relative
Register addressing modeThe register addressing mode involves the use of registers to hold the data to be manipulated. Memory is not accessed when this addressing mode is executed; therefore, it is relatively fast.
MOV BX,DX ;copy the contents of OX into BXMOV ES,AX ;copy the contents of AX into ESADD AL,BH ;add the contents of BH to contents of
AL
It should be noted that the source and destination registers must match in size. In other words coding "MOV CL,AX" will give an error.
Immediate addressing mode
In the immediate addressing mode, the source operand is a constant. The operand comes immediately after the opcode. For this reason, this addressing mode executes quickly. Immediate addressing mode can be used to load information into any of the registers except the segment registers and flag registers. Examples:
MOV AX,2550H ;move 2550H into AXMOV CX,625 ;Ioad the decimal 625 into CXMOV BL,40H ;Ioad 40H into BL
Direct addressing modeIn the direct addressing mode the data is in some memory location(s) and the address of the data in memory comes immediately after the instruction. This address is the offset address and one can calculate the physical address by shifting left the DS register and adding it to the offset as follows:
MOV DL, [2400] ;move contents of DS:2400H into DL
In this case the physical address is calculated by combining the contents of offset location 2400 with DS, the data segment register.
Example 1-15Find the physical address of the memory location and its contents after the execution of the following, assuming that DS = 1512H.
MOV AL, 99HMOV [3518], AL
Solution:First AL is initialized to 99H, then in line two, the contents of AL are moved to logical address DS:3518 which is 1512:3518.Shifting DS left and adding it to the offset gives the physical address of 18638H (15120H + 3518H = 18638H). That means after the execution of the second instruction, the memory location with address 18638H will contain the value 99H.
Register indirect addressing mode
In the register indirect addressing mode, the address of the memory location where the operand resides is held by a register.
The registers used for this purpose are SI, DI, and BX. If these three registers are used as pointers, that is, if they hold the offset of the memory location, they must be combined with DS in order to generate the 20-bit physical address.
MOV AL, [BX] ;moves into AL the contents of the memory location pointed to by DS:BX.
MOV CL, [SI] ;move contents of DS:SI into CL
MOV [DI], AH ;move contents of AH into DS:DI
Example 1-16Assume that DS = 1120, SI = 2498, and AX = 17FE. Show the contents of memory locations after the execution of
MOV [SI], AXSolution:
The contents of AX are moved into memory locations with logical address DS:SI and DS:SI + 1.The physical address starts at DS (shifted left) + SI = 13698. According to the little endian convention, low address 13698H contains FE, the low byte, and high address 13699H will contain 17, the high byte.
Based relative addressing mode
In the based relative addressing mode, base registers BX and BP, as well as a displacement value, are used to calculate what is called the effective address. The default segments used for the calculation of the physical address (PA) are DS for BX and SS for BP.
MOV CX, [BX] + 10 ;move DS:BX+10 and DS:BX+10+1 into CX;PA = DS (shifted left) + BX + 10
Alternative coding are MOV CX, [BX+l0]
or MOV CX, 10 [BX]In the case of the BP register,
MOV AL, [BP] + 5 ;PA = SS (shifted left) + BP + 5
Indexed relative addressing mode
The indexed relative addressing mode works the same as the based relative addressing mode, except that registers DI and SI hold the offset address.
Examples:
MOV DX, [SI] + 5 ;PA = DS (shifted left) + SI + 5
MOV CL, [DI] + 20 ;PA = DS (shifted left) + DI + 20
Example 1-17Example 1-17Assume that DS=4500, SS=2000, BX=2100, SI=1486, Assume that DS=4500, SS=2000, BX=2100, SI=1486, DI=8500, BP=7814, and AX=2512. Show the exact DI=8500, BP=7814, and AX=2512. Show the exact physical memory location where AX is stored in each physical memory location where AX is stored in each of the following. All values are in Hex.of the following. All values are in Hex.
(a) MOV [BX]+20, AX(a) MOV [BX]+20, AX (b) MOV [SI]+10, AX(b) MOV [SI]+10, AX
(c) MOV [DI]+4, AX(c) MOV [DI]+4, AX (d) MOV [BP]+12, AX(d) MOV [BP]+12, AX
Solution:Solution:
In each case PA = segment register (shifted left) + In each case PA = segment register (shifted left) + offset register + displacementoffset register + displacement
(a) DS:BX+20(a) DS:BX+20 location 47120=(12) and 47121=(25)location 47120=(12) and 47121=(25)
(b) DS:SI+10(b) DS:SI+10 location 46496=(12) and 46497=(25)location 46496=(12) and 46497=(25)
(c) DS:DI+4(c) DS:DI+4 location 4D504=(12) and 4D505(25)location 4D504=(12) and 4D505(25)
(d) SS:BP+12(d) SS:BP+12 location 27826=(12) and 27827=(25)location 27826=(12) and 27827=(25)
Based indexed addressing Based indexed addressing modemode
By combining based and indexed addressing modes. a new By combining based and indexed addressing modes. a new addressing mode is derived caned the based indexed addressing mode is derived caned the based indexed addressing mode. addressing mode. In this mode. one base register and one index register are used.In this mode. one base register and one index register are used.
MOV CL, [BX][DI]+8MOV CL, [BX][DI]+8 ;PA = DS (Shifted left) + BX + DI + ;PA = DS (Shifted left) + BX + DI + 88MOV CH, [BX][SI]+20MOV CH, [BX][SI]+20 ;PA = DS (shifted left) + BX + SI + 20;PA = DS (shifted left) + BX + SI + 20MOV AH, [BP][DI]+12MOV AH, [BP][DI]+12 ;PA = SS (shifted left) + BP + DI + 12;PA = SS (shifted left) + BP + DI + 12MOV AH, [BP][SI]+29MOV AH, [BP][SI]+29 ;PA = SS (Shifted left) + BP + SI + 29;PA = SS (Shifted left) + BP + SI + 29
The coding of the instructions above can vary; for example, the The coding of the instructions above can vary; for example, the last example could have been writtenlast example could have been writtenMOV AH, [BP+SI+29]MOV AH, [BP+SI+29]
ororMOV AH, [SI+BP+29]MOV AH, [SI+BP+29] ;the register order does not matter.;the register order does not matter.
Note that Note that MOV CL, [SI][DI] + displacementMOV CL, [SI][DI] + displacement is illegal.is illegal.
Default SegmentDefault SegmentThe following table provides a summary of the offset registers that can be used The following table provides a summary of the offset registers that can be used with the four segment registers of the 80x86. with the four segment registers of the 80x86.
Offset registers for various segments.Offset registers for various segments.
Segment register: CS DS ES SS
Offset register(s) IP SI, DI, BX SI, DI, BX SP, BP
Segment overridesSegment overridesThe 80x86 CPU allows the program to override the default The 80x86 CPU allows the program to override the default segment and use any segment register. segment and use any segment register. To do that, specify the segment in the code. To do that, specify the segment in the code. For example, in For example, in "MOV AL,[B X]""MOV AL,[B X]" , the physical address of the , the physical address of the operand to be moved into AL is DS:BX.operand to be moved into AL is DS:BX.To override that default, specify the desired segment in the To override that default, specify the desired segment in the instruction as instruction as "MOV AL, ES:[BX]"."MOV AL, ES:[BX]".
Instruction Segment Used Default Segment
MOV AX, CS:[BP] CS:BP SS:BP
MOV DX, SS:[SI] SS:SI DS:SI
MOV AX, DS:[BP] DS:BP SS:BP
MOV CX, ES:[BX]+12 ES:BX+12 DS:BX+12
MOV SS:[BX][DI]+32, AX SS:BX+DI+32 DS:BX+DI+32
The EndThe End
