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Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions...

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Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories Joint work with: Jan-Willem Maessen Sun Microsystems Laboratories
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Page 1: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

Copyright 2008 Sun Microsystems, Inc

Better Expressiveness for HTM using

Split Hardware Transactions

Yossi Lev Brown University & Sun Microsystems Laboratories

Joint work with:

Jan-Willem MaessenSun Microsystems Laboratories

Page 2: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

Hardware Transactional Memory (HTM)

• Fast, often supports Strong Atomicity

• Restrictions– Resource limitations: bounded size– Expressiveness limitations

• No true closed/open nesting No “nesting constructs”: or-else, retry, etc.

• No debugging support

• No long transactions (context switch, timer interrupts)

Page 3: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

This Work

• True closed nesting of transactions

• Pause a transaction & Inspect its read/write setsDebugging, Open Nesting

• Better survive long transactions

Improve expressiveness of best effort HTMusing simple software support

Page 4: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

How? Segmentation

• Introduce Split Hardware Transaction (SpHT)

– A split transaction consists of multiple segments

– Each segment executed by its own hardware transaction

– using minimal software support combine all to one atomic operation

Our goal is to overcome expressiveness limitations

Not to overcome resource limitations

Get strong atomicityIf supported by HTM

Page 5: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

The SpHT Algorithm• Each segment is executed by a hw transaction.

• Defer Writes: log in a write-set Isolation: split transaction’s partial state not exposed

when committing segment’s hw transaction

• Log Reads, and validate them at segment’s beginningConsistency:

address read by any segment changes current hw transaction fails.

• Copy back by last hw transaction: write-set shared memoryAtomicity: last hw transaction runs all reads & writes of split transaction.

Hardware: conflict detection. Guarantees atomicity.Software: read/write tracking. Enhances flexibility.

Page 6: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

SpHT for Closed Nesting

• SpHT_Begin begins a (nested) transaction, starting its first segment

• SpHT_Commitends a (nested) transaction, ending its last segment

• SpHT_Pausepauses a transaction, ending its current segment

• SpHT_Resumeresumes a transaction, starting a new segment

• SpHT_Read / SpHT_Writeread/write ops, checking & updating the read/write sets

Page 7: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

• Segmentation for Closed Nesting– End a segment before a nested transaction,

Begins a new one after it.

atomic { a++ atomic { foo() } b++

}

Page 8: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

• Segmentation for Closed Nesting– End a segment before a nested transaction,

Begins a new one after it.

SpHT begin()

SpHT_write(&a,1+SpHT_read(&a)) SpHT_pause() SpHT_begin() foo() SpHT_commit() SpHT_resume() SpHT_write(&b,1+SpHT_read(&b)) SpHT_commit()

atomic { a++ atomic { foo() } b++

}

Page 9: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

• Two ways a segment’s execution may fail– HW transaction aborts:

SpHT begin()

SpHT_write(&a,1+SpHT_read(&a)) SpHT_pause() SpHT_begin() foo() SpHT_commit() SpHT_resume() SpHT_write(&b,1+SpHT_read(&b)) SpHT_commit()

atomic { a++ atomic { foo() } b++

}

Page 10: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

SpHT begin()

SpHT_write(&a,1+SpHT_read(&a)) SpHT_pause() SpHT_begin() foo() SpHT_commit() SpHT_resume() SpHT_write(&b,1+SpHT_read(&b)) SpHT_commit()

atomic { a++ atomic { foo() } b++

}

• Two ways a segment’s execution may fail– HW transaction aborts: control returns to beginning of segment

Page 11: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

SpHT begin()

SpHT_write(&a,1+SpHT_read(&a)) SpHT_pause() SpHT_begin() foo() SpHT_commit() SpHT_resume() SpHT_write(&b,1+SpHT_read(&b)) SpHT_commit()

atomic { a++ atomic { foo() } b++

}

• Two ways a segment’s execution may fail– HW transaction aborts: control returns to beginning of segment– Validation failure: retry the enclosing transaction

Page 12: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

• Two ways a segment’s execution may fail– HW transaction aborts: control returns to beginning of segment– Validation failure: retry the enclosing transaction

use exceptions for non-local control transfer

while (true) {SpHT begin()try { SpHT_write(&a,1+SpHT_read(&a)) SpHT_pause() while (true) { SpHT_begin() try { foo() } catch SpHT_invalid { continue } SpHT_commit() break } SpHT_resume() SpHT_write(&b,1+SpHT_read(&b))} catch SpHT_invalid { continue } SpHT_commit()break}

atomic { a++ atomic { foo() } b++

}

Page 13: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

• SpHT Operations Implementation:

while (true) {SpHT begin()try { SpHT_write(&a,1+SpHT_read(&a)) SpHT_pause() while (true) { SpHT_begin() try { foo() } catch SpHT_invalid { continue } SpHT_commit() break } SpHT_resume() SpHT_write(&b,1+SpHT_read(&b))} catch SpHT_invalid { continue } SpHT_commit()break}

atomic { a++ atomic { foo() } b++

}

Page 14: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

• SpHT Operations Implementation:– HW Interface: HTBegin, HTCommit

• HTBegin returns true when transaction begins, false when it fails

while (!HTBegin()) { ; } if (!SpHT validate()) HTCommit() throw SpHT_invalid

while (!HTBegin()) { ; } if (!SpHT validate()) HTCommit() throw SpHT_invalid

while (true) {SpHT begin()try { SpHT_write(&a,1+SpHT_read(&a)) SpHT_pause() while (true) { SpHT_begin() try { foo() } catch SpHT_invalid { continue } SpHT_commit() break } SpHT_resume() SpHT_write(&b,1+SpHT_read(&b))} catch SpHT_invalid { continue } SpHT_commit()break}

atomic { a++ atomic { foo() } b++

}

Page 15: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

• SpHT Operations Implementation:– HW Interface: HTBegin, HTCommit

• HTBegin returns true when transaction begins, false when it fails

while (!HTBegin()) { ; } if (!SpHT validate()) HTCommit() throw SpHT_invalid

while (!HTBegin()) { ; } if (!SpHT validate()) HTCommit() throw SpHT_invalid

if (outermost) copy-back()HTCommit()

while (true) {SpHT begin()try { SpHT_write(&a,1+SpHT_read(&a)) SpHT_pause() while (true) { SpHT_begin() try { foo() } catch SpHT_invalid { continue } SpHT_commit() break } SpHT_resume() SpHT_write(&b,1+SpHT_read(&b))} catch SpHT_invalid { continue } SpHT_commit()break}

atomic { a++ atomic { foo() } b++

}

HTCommit()

Page 16: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

What about the state of the Read/Write Sets ?

while (!HTBegin()) { ; } if (!SpHT validate()) HTCommit() throw SpHT_invalid

while (!HTBegin()) { ; } if (!SpHT validate()) HTCommit() throw SpHT_invalid

if (outermost) copy-back()HTCommit()

while (true) {SpHT begin()try { SpHT_write(&a,1+SpHT_read(&a)) SpHT_pause() while (true) { SpHT_begin() try { foo() } catch SpHT_invalid { continue } SpHT_commit() break } SpHT_resume() SpHT_write(&b,1+SpHT_read(&b))} catch SpHT_invalid { continue } SpHT_commit()break}

atomic { a++ atomic { foo() } b++

}

HTCommit()

Page 17: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

• Stack of Read/Write Set states– Manipulated by SpHT_Push, SpHT_Pop, and SpHT_Restore

• Maintain the stack invariant:Top-stack state is the beginning state of innermost transaction.

while (!HTBegin()) { ; } if (!SpHT validate()) HTCommit() throw SpHT_invalid

while (!HTBegin()) { ; } if (!SpHT validate()) HTCommit() throw SpHT_invalid

if (outermost) copy-back()HTCommit()

while (true) {SpHT begin()try { SpHT_write(&a,1+SpHT_read(&a)) SpHT_pause() while (true) { SpHT_begin() try { foo() } catch SpHT_invalid { continue } SpHT_commit() break } SpHT_resume() SpHT_write(&b,1+SpHT_read(&b))} catch SpHT_invalid { continue } SpHT_commit()break}

atomic { a++ atomic { foo() } b++

}

HTCommit()

Page 18: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

• Stack of Read/Write Set states– Manipulated by SpHT_Push, SpHT_Pop, and SpHT_Restore

• Maintain the stack invariant:Top-stack state is the beginning state of innermost transaction.

while (!HTBegin()) { ; } if (!SpHT validate()) HTCommit() throw SpHT_invalid

SpHT_pop()while (!HTBegin()) { ; } if (!SpHT validate()) HTCommit() throw SpHT_invalid

if (outermost) copy-back()HTCommit()

while (true) {SpHT begin()try { SpHT_write(&a,1+SpHT_read(&a)) SpHT_pause() while (true) { SpHT_begin() try { foo() } catch SpHT_invalid { continue } SpHT_commit() break } SpHT_resume() SpHT_write(&b,1+SpHT_read(&b))} catch SpHT_invalid { continue } SpHT_commit()break}

atomic { a++ atomic { foo() } b++

}

HTCommit()SpHT_push()

Page 19: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

while (!HTBegin()) { ; } if (!SpHT validate()) HTCommit() SpHT_pop() SpHT_restore() throw SpHT_invalid

SpHT_pop()while (!HTBegin()) { ; } if (!SpHT validate()) HTCommit() SpHT_restore() throw SpHT_invalid

if (outermost) copy-back()HTCommit()

while (true) {SpHT begin()try { SpHT_write(&a,1+SpHT_read(&a)) SpHT_pause() while (true) { SpHT_begin() try { foo() } catch SpHT_invalid { continue } SpHT_commit() break } SpHT_resume() SpHT_write(&b,1+SpHT_read(&b))} catch SpHT_invalid { continue } SpHT_commit()break}

• Stack of Read/Write Set states– Manipulated by SpHT_Push, SpHT_Pop, and SpHT_Restore

• Maintain the stack invariant:Top-stack state is the beginning state of innermost transaction.

atomic { a++ atomic { foo() } b++

}

HTCommit()SpHT_push()

Page 20: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

Additional Notes

• Support nesting constructsorElse, user level abort, retry, etc.

• Integrate with HyTM or PhTM

– Run concurrently as is with HW transactions

– Also with SW transactionswith same overhead like HyTM

Page 21: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

Optimizations

• Exploit HTM features– Non-transactional access

during a HW transaction– Use reported conflict address

to avoid validation

• Avoid validation on every segment

• Roll back multiple levels

Page 22: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

One important question:

Are we faster than STM?

Page 23: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

Evaluation

• SpHT Prototype in C++– Local read/write sets: Arrays, fast lookup for write set– No stack mechanism at this point

• Can retry current segment• Is not likely to change the answer

• Simulated HTM support: variant of LogTM

• Compared TL2, SpHT, and pure HTM.• Benchmark: RBTree, 10% Ins, 10% Del, 80% lookup

How much benefit do we get byhandling conflicts in hardware?

Page 24: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

Results

0

500000

1000000

1500000

2000000

2500000

3000000

3500000

4000000

4500000

5000000

0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30

Threads

Th

rou

gh

pu

t (o

p/s

ec)

htm

spht

tl2

Page 25: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

Experiments with Nesting

• In the paper:– Used hand-coded contrived example

– Compared• No Nesting• Closed Nesting• Open Nesting• Try-Atomic

Page 26: Copyright 2008 Sun Microsystems, Inc Better Expressiveness for HTM using Split Hardware Transactions Yossi Lev Brown University & Sun Microsystems Laboratories.

Summary• Split Hardware Transactions

– Hardware: handle conflicts– Software: read/write tracking

– Segmentation:One atomic operation, multiple HW Transactions

More flexibility with best-effort HTM– Closed and Open Nesting– Debugging Support– Long Transactions


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