22Cost Per Wafer
Cost per wafer is perhaps the most widelyused cost metric in the semiconductor indus-try. Its value lies in the ability to combinelarge quantities of cost data and obtain oneindicator of operating cost that can be used tocompare different pieces of equipment, differ-ent processes, alternative materials, etc. Costper wafer can also be used as a benchmarkingmetric (see Chapter 4, Fab Benchmarking). Itcan further be used to estimate a fair price forfoundry-produced wafers.
Information from the SemiconductorIndustry Association in the U.S. indicatesthat average cost per wafer has increased by3X over the last 15 years (Figure 2-1).Although the cost of labor, materials andcapital expenditures per wafer haveincreased, the real cost of manufacturingsemiconductor chips continues to decreasebecause the number of transistors that can beplaced on a wafer has grown faster thanmanufacturing costs, as shown in Figure 2-2.
As discussed in Chapter 1, this ever-increas-ing cost per wafer is offset by the ability toshrink feature size by 30 percent eachdevice generation, thereby decreasing themanufacturing cost per transistor. Theeffective price of DRAMs, measured in costper bit, falls by 30 percent per year. Risingmanufacturing cost is further offset by man-ufacturersÕ ability to continually increasedevice yields, transition to larger waferssizes and increase the productivity of fab
equipment and operations. By continuallydecreasing or controlling cost per wafer, ICmanufacturers can increase profitability.
Cost per wafer at the fab level can be simplycomputed using the total cost of manufactur-ing divided by the total number of yieldedwafers produced. Cost per wafer at theequipment level is typically computed Òfromthe ground-upÓ using the cost of equipmentdepreciation, cost of direct labor, mainte-nance and materials, cost of energy and otherfacilities as well as building depreciationcosts.
Cost per wafer first enjoyed widespread useseveral years following the introduction ofcost-of-ownership modeling by SEMAT-ECH, the consortium of semiconductor man-ufacturers in the U.S. Cost per wafer is oftenused to compare the cost-of-ownership per-formance of competing pieces of equipment.It is also used by semiconductor manufactur-ers for benchmarking purposes, and toassess the cost of making process modifica-tions and adopting new processes.Importantly, however, one of the most criti-cal components in cost-of-ownership calcu-lations is the yield of the given process step.Because yield influences cost so dramaticallyand because yield is very difficult to deter-mine on a step-by-step basis, most COO cal-culations assume identical yields from oneprocess tool to another. For more discussionon COO see Chapter 4, Fab Benchmarking.
INTEGRATED CIRCUIT ENGINEERING CORPORATION 2-1
2 Cost Per Wafer
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION2-2
Mfg Labor = $275(37.6%)
Mfg Cost ofGoods Sold = $432
(59.1%)
Non-LaborMfg = $157
(21.5%)
S, G&A = $158(21.6%)
R&D = $74(10.1%)
Depreciation = $67(9.2%) Mfg Labor = $273
(11.5%)
Mfg Cost ofGoods Sold = $1,268
(53.4%)
Non-LaborMfg = $994
(41.9%)
S, G&A = $374(15.8%)
R&D = $257(10.8%)
Depreciation = $247(10.4%)
Taxes & Other = $230
(9.7%)
1980Total = $731/150mm Wafer
1995Total = $2,375/150mm Wafer
Source: SIA
*North American firms only
21075A
Figure 2-1. Total Cost Per Wafer Start (1980 Versus 1995*)
Figure 2-2. How Decreasing Cost Per Bit Compensates for Increasing Manufacturing Cost
19831982 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 19951
10
100
1,000
Source: SIA 22726
Ind
ex (
1982
= 1
00)
Year
DRAMPrice Per Bit
ManufacturingCost Per Wafer
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION 2-3
Operating Costs
Fab operating costs can be divided into fixedcosts and variable costs. Fixed costs includeequipment depreciation, R&D, overhead,and general and administrative costs. Themost important variable cost is the cost ofsales (manufacturing cost of goods sold),which includes the cost of consumables,spare parts, materials (including cleanroomgarments, etc.), labor, production control,and facilities (operating power for the plant,deionized water systems, etc.). The trend ofincreasing manufacturing cost of goods soldis shown in Figure 2-3. This cost of manu-facturing wafers, without consideringincreasing depreciation costs, rises at anaverage rate of 5-6 percent per year.
Operating costs are often defined for waferprocessing alone as assembly and final test-ing of devices are commonly performed at adifferent manufacturing sites, often inSoutheast Asian countries where labor costsare low by North American, Japanese, andEuropean standards. In rough terms, ICmanufacturing costs can be divided intothree categories consisting of:
¥ 10-15 percent due to labor cost,¥ 35-40 percent due to materials costs
(including starting wafer cost), and¥ 40-50 percent for capital costs[1]
150m
m E
qu
ival
ent
Waf
er
400
500
600
700
800
900
1,000
1,100
1,200
1,300
199519941993199219911990198919881987198619851984198319821981198019791978
Source: SIA 22727
Annual TrendGrowth = 5.6%
Mean
Figure 2-3. Manufacturing Cost of Goods Sold (Less Depreciation) Per Wafer Start
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION2-4
Beyond these broad categories, operatingcosts are typically broken down into fourmain components:
¥ Manufacturing cost of devices sold (allcosts directly allocated to production, lessdepreciation),
¥ Selling, general and administrativeexpenses,
¥ Research and development costs, and¥ Depreciation expenses.
As shown in Figure 2-1, manufacturing costof goods sold in 1995 accounted for over 53percent of the total cost per wafer start formerchant IC producers in the U.S.[2] Cost perwafer for IC manufacturers has increasedfrom 1980Õs level of around $730 per 150mmequivalent wafer to 1995Õs level of nearly$2,400 per 150mm wafer. In other words, thecost per wafer has risen by over a factor ofthree in a fifteen year period. In addition, theportion of manufacturing costs due to laborexpenses has dropped dramatically.Interestingly, the dollar amount companieshad to devote to labor was almost exactly thesame in 1995 as it was in 1980.
These expenditures can also be viewed rela-tive to annual semiconductor industry sales.In other words, the rates of increase inexpenditures for manufacturing, R&D,depreciation, and S, G&A expenses can becompared to the rate of annual increases inoverall semiconductor industry revenues.Shown in Figure 2-4 are year-to-year valuesfor R&D, depreciation expenses, manufac-turing costs, S, G&A costs, and semiconduc-tor sales, normalized to 1978 values. Longterm, depreciation and R&D costs have risenmuch more dramatically than manufactur-ing costs, semiconductor sales, and S, G&Aexpenditures. Between 1978 and 1995,depreciation outlays increased by a factor of17; R&D costs increased by a factor of 14;
manufacturing costs and S, G&A costsincreased by almost a factor of 9 each; andsales by U.S.-based merchant semiconductorfirms increased by a factor of 12. As can begleaned from this illustration, during theindustryÕs most difficult period in the mid-1980s, R&D and depreciation expendituresremained high while the sales index (annualsemiconductor sales) dipped too low to sup-port these expenditures.
In the most recent expansionary cyclebetween 1993 and 1996, the focus on increas-ing expenditures for equipment and newfabs has increased dramatically. However, asshown in Figure 2-5, depreciation expensesas a percent of sales appear to be stabilizing,despite a long-term average increase of 10-15percent per year.
The following sections briefly discusses thecost components for manufacturing costs,depreciation, and R&D costs. Selling, gen-eral and administrative costs will not be cov-ered as these expenditures vary a great dealfrom one company to the next, and vary littlefrom year to year for a given company.
R&D and Depreciation Costs
As mentioned previously, due to theextremely high pace of technological innova-tion in this industry, necessary investmentfor R&D, new fabs, and equipment can be ashigh as 25-30 percent of sales. In fact, thepercentage of sales that must be reinvestedfor R&D in the semiconductor industry sur-passes that needed in nearly every otherhigh technology industry (Figure 2-6).Interestingly enough, the key industries thatsemiconductors feedÑcomputers, consumerelectronics, communications, and automo-tiveÑeach requires lower investment todevelop than the chips that run them.
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION 2-5
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
11.0
12.0
13.0
14.0
15.0
16.0
17.0
18.0
199519941993199219911990198919881987198619851984198319821981198019791978
Source: SIA 19783B
Mfg. Cost ofGoods Sold
S, G&A
Depreciation
R&D
Note: U.S. merchant semiconductor manufacturers only.Year
Ind
ex:
1978
=-
1.0
Sales Index
Figure 2-4. Annual Expenditures for Major Cost Components
4
6
8
10
12
14
16
199519941993199219911990198919881987198619851984198319821981198019791978
Year
19784BSource: SIA
Dep
reci
atio
n a
s a
Per
cen
t o
f S
ales
Rev
enu
e
Median
Mean
Note: U.S. merchant semiconductor manufacturers only.
Figure 2-5. Depreciation Expenses Rise More Rapidly Than IC Revenues
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION2-6
In addition, as technology developmentbecomes more expensive, it becomes moredifficult to get a timely return on investment.Generally, IC manufacturers invest 10-15percent of sales each year in R&D. Figure 2-7 shows R&D expenditures both in billionsof dollars and as a percentage of sales rev-enues for merchant IC manufacturers in theUS. While this percentage appears to havedeclined over the 1992-1995 period, R&Doutlays rose dramatically at an averageannual rate of 18 percent over the period.
The most important components in develop-ment costs are equipment costs and labor, asillustrated in Figure 2-8. One of the mostimportant strategies used by semiconductorcompanies to control these costs is the for-mation of strategic partnerships for bothtechnology development and in some cases,fab ownership.
Also shown back in Chapter 1, the top 10companies accounted for 55 percent of allcapital spending in the semiconductor
0 2 4 6 8 10 12 14
������������������������������������������������������
Electrical Products
General Manufacturing
Telecommunications
Automotive
Chemicals
Aerospace and Defense
Office Equipment(Excluding Computers)
Instruments
Electronics
Computers
Health Care
Computer Communications
Semiconductors
Software and Services
R&D as a Percent of Sales19781ASource: Business Week
Figure 2-6. R&D For Semiconductors Exceed Most Other High Technology Industries
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION 2-7
industry in 1996, and 83 percent of all spend-ing is performed by 25 companies.Worldwide, SEMI and SEAJ estimate that63.5 percent of capital spending goes towardwafer processing equipment, 21 percenttoward testing equipment, nearly 10 percentto assembly equipment and nearly 6 percent
to facility related equipment (i.e., computers,automation, etc.). These numbers equate to1996 market sizes of $26.6 billion for waferprocessing equipment, $8.8 billion for testingequipment, $4 billion for assembly equip-ment and $2.5 billion for facility equipment.
Bill
ion
s o
f D
olla
rs
Per
cen
t o
f S
ales
Rev
enu
es
6.0
8.0
10.0
12.0
14.0
16.0
18.0
1995199419931992199119901989198819871986198519841983198219811980197919780.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Year
Source: SIA 22728
Percentage of Sales
Billions of Dollars
Annual TrendGrowth = 14.7%
Figure 2-7. Semiconductor R&D Expenditures
Equipment31%
Labor 26%
Other (Including Travel)8%
Consumables(Gases and Chemicals)
16%
Facilities and Property19%
19977ASource: Intel/EE Times
Figure 2-8. Breakdown of Semiconductor Technology Development Costs
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION2-8
Depreciation schedules vary from one coun-try to another. Semiconductor firms in theU.S. have attempted to change 5-year depre-ciation schedules on semiconductor process-ing equipment to 3 years to better reflect therapid rate of technological obsolescence infabs today. Despite bipartisan support in theU.S. House of Representatives and Senate,the bill to change these depreciation sched-ules did not pass. However, some progresswas made in 1997 as a bill was passed toraise R&D tax credit for basic research from 8percent to 11 percent. The bill also allows a 6percent manufacturers investment credit forcleanrooms built by IC manufacturers andsemiconductor equipment companies.Figure 2-9 shows depreciation schedules fora fab facility in the U.S.
Within the fab area, the photolithographycell is the most expensive (Figure 2-10), asleading-edge steppers and step-and-scanmachines for 0.25um processing are pricedbetween $5-$7 million each. In addition, theinvestment for advanced reticles is risingrapidly (Figure 2-11). Beyond lithographycosts, the next most expensive is diffusionprocesses, followed by etching, thin filmdeposition, and ion implantation. Trendsindicate a long-term increase in number ofCVD, sputtering, and etching tools in the fab,principally driven by an increasing numberof metal layers in advanced logic devices(currently at 5-6 levels for 64-bit MPUs), andthe introduction of chemical mechanical pol-ishing tools for global planarization. Manysources estimate that back-end wafer pro-cessing (all processing of films above thesubstrate level) accounts for more than 50percent of overall cost per wafer.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
100%
104%
108%
112%
117%
122%
127%
132%
137%
142%
148%
154%
160%
167%
173%
180%
98%
97%
97%
97%
97%
96%
95%
94%
93%
91%
90%
89%
87%
85%
83%
81%
89%
79%
70%
62%
55%
49%
44%
39%
35%
31%
28%
25%
22%
20%
20%
20%
67%
46%
29%
16%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
98%
94%
90%
86%
82%
79%
76%
74%
72%
69%
67%
65%
64%
62%
61%
60%
Year inService
LandFab
BuildingCleanroomEquipment
WaferProcessingEquipment
Officeand Utility
Source: Oregon Department of Revenue 1994-1995 Electronics Trend and Depreciation Schedules
22729
Figure 2-9. Depreciation Schedules Projected Appraised Value of Investmentas Percentage of Original Cost
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION 2-9
Long-term increases in depreciation andR&D expenditures continually challenge thecost-effectiveness of IC manufacturing. Onemetric used to examine overall cost effective-ness is asset turnover rate. Figure 2-12shows that in the years preceding 1980,every dollar of net fixed assets generatedgreater than $3.00 in sales revenue. By 1987,asset turnover rate had fallen by 50 percent.However, recent trends indicate that asset
turnover rates are stabilizing. However, fur-ther deterioration in the rate may affect thefinancial future of the industry. Once again,by making facilities and operations morecost effective, margins can be preserved andthe rate of technological advancement cancontinue at its rapid pace. Astoundingly, theaverage employee of a merchant IC manu-facturer in the U.S. is supported by $120,000in net fixed assets (Figure 2-13).
Photolithography32%
Diffusion22%
Etch18%
Thin Films16%
Implant12%
Source: Microlithography World 21070
Figure 2-10. Relative Costs of Semiconductor Manufacturing Areas
1,000
100
10
1
0.1
Semiconductor Market
Mask Market
1977 1980 1985 1990 1995 2000
Year
Bill
ion
s o
f D
olla
rs
Source: Wafer News/Rose Assoc. 22693
Figure 2-11. Growing Investment in Reticles and Masks
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION2-10
1.5
2.0
2.5
3.0
3.5
4.0
199519941993199219911990198919881987198619851984198319821981198019791978
Net
Fix
ed A
sset
s/S
ales
($)
Year
Source: SIA 22730
Median
Mean
Figure 2-12. Net Fixed Assets Rise Faster Than Industry Revenues
$1,0
00 P
er E
mp
loye
e
Year
0
20
40
60
80
100
120
140
199519941993199219911990198919881987198619851984198319821981198019791978
Source: SIA 22731
Median
Mean
Figure 2-13. Net Fixed Assets Per Employee
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION 2-11
The Cost of Labor
As semiconductor fabs become more auto-mated and reliable, labor costs typically rep-resent a smaller portion of total waferprocessing costs. As shown back in Figure 2-1, total labor costs typically constitute 11.5percent of overall cost per wafer for U.S.firms. Figure 2-14 shows how the total laborrate (including wages, salaries, payroll taxes,etc.) as a percent of sales for U.S. firms hasdropped dramatically over the last severalyears and the divergence between the meanand median lines indicates that larger firmsspend much less on labor than smaller ICmanufacturers, which is expected. Figure 2-15 gives a sampling of salaries and wagesearned by different individuals working inor around the fab.
By 1996, labor rate differences between theU.S. and Japan had diminished due tochanging standards in Japan and the chang-ing value of the yen (Figure 2-16). Thesemiconductor industry has become a trulyglobal industry with fabs now emerging inall regions of the world. Regions that haverecently attracted fabs include China,Malaysia, Thailand, India, and EasternEurope. These countries offer the labor costadvantages that Japan once enjoyed overthe U.S. It comes as no surprise that theseregions, home to many assembly houses,are now being used for wafer processing.Such developing regions offer enormousgrowth potential, as evidenced in thegrowth of exports in developing regions rel-ative to export growth in developed regions(Figure 2-17).
20
25
30
35
40
45
50
19941993199219911990198919881987198619851984198319821981198019791978
Median
Mean
Per
cen
t o
f S
ales
Rev
enu
es
Year
*Includes wages, salaries, retirement expenses, incentive compensation, payroll taxes**North American firms only
Source: SIA 21072
Figure 2-14. Total Labor Expenses* as a Percent of Sales Revenues**
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION2-12
Semiconductor (Dollars/Hour)
Operator Wafer Fab I
Operator Wafer Fab II
Operator Wafer Fab III
Semiconductor Specialist
Semiconductor Line Mech.
Semiconductor (Thousands of Dollars/Year)
Process Engineer I
Process Engineer II
Process Engineer III
Process Technician
Sr. Process Technician
QA Technician I
QA Technician II
QA Technician III
QA Engineer
Elec. Management (Thousands of Dollars/Year)
Process Development Manager
QA Manager
MIS Manager
R & D Manager
HR Manager
Compensation Manager
Emp. Relations Manager
Gen. Accounting Manager
Facilities Manager
Office Manager
Production Manager
Other Technical (Thousands of Dollars/Year)
Test Engineer
CAD Operator I
Clerical (Thousands of Dollars/Year)
Accounting Clerk I
Receptionist
Secretary
Executive Secretary
Administrative Assistant
Data Entry Operator
6.30
7.24
8.24
9.49
13.72
30.8
35.8
44.3
20.3
25.5
18.2
20.6
24.3
33.8
53.6
47.4
49.6
60.1
43.6
47.4
50.4
43.4
43.2
31.0
41.1
34.5
20.5
15.7
16.6
21.5
24.9
24.8
17.0
9.98
10.55
12.69
14.78
19.72
47.5
56.1
68.7
31.4
38.7
27.1
30.9
36.7
51.0
81.6
74.4
78.4
94.8
68.2
71.6
80.8
68.2
68.6
47.4
64.7
52.8
30.5
23.4
23.9
31.6
36.9
37.3
24.3
Minimum50th
Percentile
MaximumAverage
Source: American Electronics Assoc.
Definitions – Minimum 50th Percentile: The minimum salary range whichis higher than 50% of all minimum ranges.Maximum Average: The average of the maximumsalary ranges reported.
21076
Figure 2-15. Typical Industry Salary Ranges in U.S., West Coast
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION 2-13
COSTFACTOR
1996U.S. WAFER FAB
DIRECT LABOR RATE
JAPANESE WAFER FAB DIRECTLABOR RATE
1985 - 1986* 1996**
HOURLY RATE
FRINGE RATE
TOTAL
LABOR COST PERWAFER TO PROBE(1.5 HOURS)
$11.80
35%
$15.93
$23.90
$5.50
40%
$7.70
$11.55
$11.21
40%
$15.69
$23.54
* 205 ¥ = $1.00**108¥ = $1.00
12030JSource: ICE
Figure 2-16. U.S. and Japanese 1995 IC Facility Direct Labor Costs
0
20
40
60
80
100
120
140
160
180
200
220
IndustrializedEconomies
WorldDevelopingEconomies
Per
cen
tag
e o
f E
xpo
rts
Source: Wall Street Journal/DRI/McGraw Hill 22701
69.6
94.2
217.1
Figure 2-17. Real Growth of Exports in the World, 1995-1996
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION2-14
Worldwide, the semiconductor industryemploys roughly between 750,000 and a mil-lion people (Figure 2-18). Of these, approxi-mately 260,000 are employed by NorthAmerican merchant semiconductor manu-facturers. Figure 2-19 shows the cyclical pat-terns in North American on-shore andoff-shore employment levels in response tochanging market condition. As shown,employment levels have increased signifi-cantly between 1992 and 1995, despite con-tinual advances in labor productivity. In1995, approximately 70 percent of the NorthAmerican wages were disbursed to employ-ees in North America, and the off-shoreemployee earns approximately one-third thesalary of the employee based in NorthAmerica, reflecting the semi-skilled labor atoff-shore assembly operations as opposed tothe base of highly-skilled and professionalworkers at North American facilities. Thispay differential is narrowing slowly (Figure2-20) as off-shore wages steadily increase.
Device Cost Modeling
Several years ago ICE developed a simplifiedcost model to examine manufacturing costs.The model estimate a company's grossmargin and revenues for a given devicebased on the ASP for the devices at the time,and a calculation of device factory cost basedon design rules, type of device, equipmentcost, wafer size used, defect density esti-mates, etc. Among these assumptions, defectdensity is the most critical. Through fabbenchmarking studies and cost modeling,ICE developed the wafer cost estimatesshown in Figure 2-21.
Figures 2-22 and 2-23 show cost modelresults for a Pentium microprocessor and16M and 64M DRAM devices in first quarter1997. As shown, the advanced-generationPentium device yields a significant grossmargin as little competition exists in thismarketplace. As the advanced-generationPentiums mature and are replaced by thePentium Pro device, Intel will continue tolower the price of this processor more dra-matically and improve yields more quicklyto preserve margins.
The margins on DRAM devices, however,have dramatically declined in the past year,forcing important changes in the 16MDRAM market and the adoption of 64Mtechnology. At least some DRAM manufac-turers are accelerating their transition to 64Mproduction due to the slim profit margins of16M devices, as illustrated in Figure 2-23. Atthe same time, manufacturers are rapidlyshrinking the die size of 16M devices fromtypical levels of 80mm2 to as small as 60mm2to preserve yields and margins.
0
200
400
600
800
1,000
1,200
2000*199519901987
Year
Source: Electronic Business Today 22689
* Projected
Em
plo
yees
(T
ho
usa
nd
s)
520 510
725
1,100
Figure 2-18. Worldwide SemiconductorEmployment
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION 2-15
90
100
110
120
130
140
150
199519941993199219911990198919881987198619851984198319821981198019791978
Source: SIA 22732
1,00
0 E
mp
loye
es
Year
North AmericaOffshore
Figure 2-19. North America and Offshore Employment Levels
0
10
20
30
40
50
60
70
199519941993199219911990198919881987198619851984198319821981198019791978
Source: SIA 22733
$1,0
00 P
er E
mp
loye
e
Year
Annual GrowthTrend = 10.8%
North American
Worldwide Average
Offshore
Figure 2-20. Labor Expenses Per Employee
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION2-16
DRAM, MPU and ASIC ManufacturingCosts
The semiconductor industry has tradition-ally been driven by the needs of the DRAMmanufacturers because these companies arethe single largest consumers of semiconduc-tor equipment and materials, and becauseDRAM devices, until recently, were the tech-nology drivers. In recent years, microproces-sors have become the technology driver asIntel has speeded its transitions to smallerfeature sizes faster than the transitions in the
DRAM device sector. In addition, the manu-facturing technology using multilevel metal-ization designs of 5 layers or more is drivenby needs of the microprocessor supplier. Theindustry therefore has two very strong seg-ments, DRAMs and microprocessors, drivingthe designs of process equipment, facilities,automation and factory management.
DRAM manufacturers produce ICs in highvolume, thereby driving the development ofequipment that delivers the highest through-put possible, while meeting processing
FeatureSize (µm)
WaferSize (mm) CMOS
14-16 Masks
AdvancedCMOS
18-20 Masks
AdvancedBiCMOS22 Masks
Bipolar8-10 Masks
Bipolar14-16 Masks
AdvancedBipolar
22 Masks
Process Technology
1.5
1.0
0.8
0.5
0.35
125
125/150
150/200
150/200
200
170
—/310
390/—
525/—
—
—
—
600/990
700/1,140
1,415
360
—/575
660/
900/1,400
1,800
210
—
—
—
—
245
270/—
—
—
—
360
—/575
660/—
900/—
—
20279ASource: ICE
—
Figure 2-21. Whole Wafer Cost Before Probe ($)
Tested Wafer Cost
Die Size
Total Dice Available
Probe Yield
Number Of Good Dice
Package Cost
Assembly Yield
Final Test Cost
Final Test Yield
Factory Cost
ASP (1,000)
Approx. Revenue/Wafer Start
Revenue/Sq In. Started
Gross Margin
$1,890 (200mm epi wafer)
135,000 sq mils (90mm2)
292
37% (at 1.2 defects/cm )
108
$25.75 (296-pin CPGA)
99%
$35.00
70%
$112.41
$350
$26,195
$542
68%
2
14448G
BiCMOS MPU (0.35µ)
Source: ICE
Figure 2-22. Pentium (166MHz P54CS) Cost Analysis (3Q96)
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION 2-17
requirements that vary little within a givenfacility. For instance, a fab may be producing1M DRAMs and 4M DRAMs, while runningpilot line production and design of 16M and64M DRAMs, respectively. In addition, dif-ferent versions of the same generation maybe produced, for instance, for 3.3V and 5.0Voperation, or 4x4 and 1x16 bit cell configura-tions. Due to the small differences in pro-cessing requirements for these devices,generally two generations of equipment arefound in DRAM fabs. High-volume produc-tion also means that production lots of 24wafers at a time are almost always run, andengineers have the luxury of dedicatingprocess tools to certain processes, therebyimproving processing results.
At the other extreme are ASIC manufactur-ers. ASIC production means that lot sizesvary from one to twenty-four wafers; everylot has a different mask set; wafers are pro-duced in small volume; the product line con-tains several generations of equipment; and
the fab must be constructed to be veryresponsive to changes. ASICs are also moredifficult to analyze than memory devices.Memories are highly testable structures andyield learning is only performed once for aproduct that will be manufactured for 8-10years. ROI typically takes 2-3 years for eachnew generation of DRAMs. For ASICs, thereis very little time for yield learning and relia-bility studies. The delivered design must be"fool-proof," negating the need for failureanalysis and yield analysis. Acceptable yieldfrom the time manufacturing is started is aprerequisite for ROI over a few months, andthe guarantee that delivery dates are met.For these reasons, simulation plays a largerole in device and process development forASICs, whereas process simulation for mem-ories is not traditionally performed, andpilot runs suffice. In general, ASIC manufac-turing also drives the development of com-puter aided design and factory controlsoftware, and packaging technology, due tolarger chip sizes of varying dimensions.
Tested Wafer Cost
Die Size
Total Dice Available
Probe Yield
Number Of Good Dice
Package Cost
Assembly Yield
Final Test Cost
Final Test Yield
Factory Cost
ASP
Approx. Revenue/Wafer Start
Revenue/Sq In. Started
Gross Margin
$1,180 (200mm)
84,000 sq mils (54mm2)
476
80% (at 0.5 defects/cm2)
380
$0.40
99%
$0.60
95%
$4.36
$7.75
$2,770
$55
44%
16912G
$1,485 (200mm)
232,500 sq mils (150mm2)
162
40% (at 0.7 defects/cm2)
65
$0.50
99%
$1.20
85%
$29.15
$55.00
$3,008
$60
47%
16M DRAM (0.35µ) 64M DRAM (0.35µ)
Source: ICE
Figure 2-23. 16M and 64M DRAM Cost Analysis
Cost Per Wafer
INTEGRATED CIRCUIT ENGINEERING CORPORATION2-18
Figure 2-24 shows further differencesbetween DRAM and ASIC manufacturing.The high-volume DRAM manufacturinglines suffer little from reconfiguration andcapacity additions relative to ASIC fabs. Thecost benefits due to automated scheduling,and wafer and mask tracking for ASICs out-weigh the same benefits to the DRAM man-ufacturer. However, too much automationcan inhibit flexibility. In addition, equip-ment reliability, mean time to repair (MTTR),and the importance of being able to quicklymake real-time process changes, are muchmore important to the ASIC manufacturer.Development equipment must be extremelycomparable to manufacturing equipment asyield ramp-up for ASICs must be minimized.
As far as manufacturing cycle time and workin process (WIP) are concerned, the fab with agreater number of different products beingprocessed at once (greater variability) willreach higher levels of WIP and longer cycletimes, faster (Figure 2-25). Achieving lowcycle time in the presence of variabilityrequires either flexible equipment or idle time.
Other Key Cost Trends
In addition to product yield, cycle time, laborcosts, and equipment productivity, impor-tant components in cost per wafer includethe cost of equipment maintenance, testwafers, and consumables. Although dis-cussing every cost components in detail isbeyond the scope of this book, some high-lights provides insight into their importance:
¥ Contracted maintenance costs varybetween nothing ($0) for the first twoyears, to up to $400,000 per tool per year,depending on the equipment supplier andterms of the contract.
¥ Equipment installation, including toolhook-up and the running of test wafers tofull qualification, typically adds 35 percentto the price of the tool.
¥ The cost of cleaning gases for single-wafertools is significantly higher than for batchtools. In-situ cleaning procedures also con-tribute significantly to tool downtime.
Cost of Reconfiguration
Cost of Capacity Additions
Automated Downloading
Wafer/Mask Tracking
Scheduling
Reliability
MTTR
Defect Free
Real Time Process Change
Dev. Eqpt. = Mfg. Eqpt.
Modularity
Benefits Due to ComputerIntegrated Manufacturing
Important EquipmentCharacteristics
High
High
High
High
High
High
High
Medium
High
High
Low
Medium
Low
Low
Low
Medium
Medium
High
Medium
Medium
ASICMeasureIssues DRAM
Source: Motorola 19775
Figure 2-24. Relative Fab Characteristics
Cost Per Wafer
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¥ Test wafer cost rises dramatically at the200mm level as manufacturers use primepolished wafers, rather than reclaimedwafers, for process monitoring.
¥ Studies indicate that some fabs are spend-ing $1 million or more a month on testwafers, which does not include the cost oflost productivity when tools are runningthese wafers[3].
Conclusions
A companyÕs ability to drive down cost perwafer requires an understanding of the costcomponents. Cost competitiveness isabsolutely essential regardless of devicemarket due to the true globalization oftodayÕs semiconductor market.
References
1. J. Smits, et.al., ÒLogistics in Fab Design,ÓFuture Fab International, p. 101.
2. 1978-1995 Industry Data Book,Semiconductor Industry Association
3. S. Billat, "Process Control: Covering Allof the Bases," Semiconductor International,Sept. 1993, p. 78.
WIP
or
Cyc
le T
ime
ProcessTime
Loading Capacity
Manufacturing withLow Variability
Manufacturing withHigh Variability
Source: TI 19754
Figure 2-25. The Effect of Variability on WIP and Cycle Time
Cost Per Wafer
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