Creating a interconnection P.-J.Chuang I highly reliable modified gamma network using a balance approach* Indexing terms: Disjoint paths, F oult tolerance, Gamma interconnection networks, Routing algorithms, Terminal reliability Abstract: An redundant paths is multiprocessor systems tolerate faults by alternative paths. network (GIN) source (S) to a and the multiple pairs share a singe stages, yielding To enhance the modified GIN is (BGIN), whose c stages exhibit a unique balance feat the BGIN is able paths between any can tolerate any increasing hardwar performance, the E terminal reliability modified GINS. intc:rconnection network with desirable for high-performance owing to its ability to routing requests through ‘The gamma interconnection proirides a unique path from any destination (D) when S equals D paths between certain (S, 0) common route for many unsz.tisfactory terminal reliability. terriinal reliability of the GIN, a proposed, the Balanced GIN mnecting patterns between balance feature. Due to the Ire of its connecting patterns, to provide multiple disjoint sommunication pair and thus arbitrary single fault. Without e complexity or degrading GIN demonstrates enhanced when compared with other 1 Introduction 1 With the advance of multiprocessors has years. In the design of interconnect role as it governs the An example of such a interconnection netwo in a multiprocessor to modules together, usir.g bar switches of fixed MIN with redundant routed over alternative and to build a high-pe with enhanced reliabil The gamma intercor type of MIN. Though VLSI technology, research on received much attention in recent development of multiprocessors, the .on networks plays an important performance of the whole system. network design is the multistage :k (MIN). The MIN is employed connect processors and memory multiple stages of small cross- size. It is desirable to set up a paths (so that requests can be paths) to achieve fault tolerance rformance multiprocessor system .ty. nection network (GIN) [l] is one able to offer multiple paths from ~~ 0 IEE, 1998 ZEE Proceedings online no. Paper first received 11th 1997 The author is with the University, Tmsui, Taipei * A preliminary version of tk ISMM Intemational Confen and Systems, October 1995. any source to most destinations, the GIN provides a unique path between a source S and a destination D when S equals D, and the multiple paths existing between certain (S, D) pairs share a single common route for many stages before starting to fork (i.e. they are not disjoint), cutting down the network’s ability to tolerate faults. Research has been carried out to enhance the GIN’s ability to tolerate faults so as to achieve a new network with high reliability. For instance, both the extra stage gamma network [2] and the PM22I interconnection network [3] try adding an extra stage to the GIN to build up multiple paths between every (S, D) pair, but have generated higher hardware complexity. The monogamma interconnec- tion network (MGIN) [4] is able to provide multiple paths between each source-destination pair with hard- ware complexity no more than that of the GIN, but it fails to guarantee reliable communication because its multiple paths are not necessarily disjoint so that when an internal switch fails, certain source-destination pairs may not be able to communicate with each other. For improvement, we consider altering the GIN’s interconnecting patterns between stages to obtain mul- tiple disjoint paths between every (S, 0) pair. Such a modified network is referred to as a Balanced Gamma Interconnection Network (BGIN) as it exhibits a bal- ance feature of the connecting patterns between stages. Being able to provide totally disjoint paths from any source to any destination without increasing hardware complexity, the BGIN can tolerate any arbitrary single fault and thus provides much enhanced terminal relia- bility. 1!)981702 September 1996 and in revised form 4th August Depi.rtment of Electrical Engineering, Tamkang is paper was presented at the 7th IASTEDi nce on Parallel and Distributed Computing Hsien, Taiwan 25137 2 Proposed network A GIN of size N = 2” (denoted by GIN,) consists of n + 1 stages; each stage involves N switches [1]. Every switch at intermediate stages is a 3 x 3 crossbar, while the two at the first and last stages are of sizes 1 x 3 and 3 x 1. The N sources are numbered from 0 to N - 1, as are the N switches at each stage and the N destinations. The stages are numbered from 0 to n. Connecting patterns between stages are based on the plus-min~s-2~ functions, namely, the jth switch at stage i (0 5 i < n) is connected to three switches at stage i + 1 according to the three functions: J;p(j) = j + 2’(modN), Jm(j) = j - 2l(modN), and f,”(j) = j (which, respectively, define the lower, upper, and straight connections originating from switch j at stage z). For a GIN,, it is easy to derive that the connecting patterns between stages can be ordered as 2O, 2l, 22, ..., 2n-1 for the lower connections and - 2O, - 2*, - 22, ..., ~ 2n-1 for the upper 21 IEE Proc.-Comput. Digit. Tech.] Vol. 145, No. 1, January 1998
Transcript
Creating a interconnection
P.-J.Chuang I
highly reliable modified gamma network using a balance approach*
Abstract: An redundant paths is multiprocessor systems tolerate faults by alternative paths. network (GIN) source (S) to a and the multiple pairs share a singe stages, yielding To enhance the modified GIN is (BGIN), whose c stages exhibit a unique balance feat the BGIN is able paths between any can tolerate any increasing hardwar performance, the E terminal reliability modified GINS.
intc:rconnection network with desirable for high-performance
owing to its ability to routing requests through
‘The gamma interconnection proirides a unique path from any destination (D) when S equals D
paths between certain (S, 0) common route for many
unsz.tisfactory terminal reliability. terriinal reliability of the GIN, a
proposed, the Balanced GIN mnecting patterns between
balance feature. Due to the Ire of its connecting patterns, to provide multiple disjoint sommunication pair and thus
arbitrary single fault. Without e complexity or degrading GIN demonstrates enhanced when compared with other
1 Introduction 1 With the advance of multiprocessors has years. In the design of interconnect role as it governs the An example of such a interconnection netwo in a multiprocessor to modules together, usir.g bar switches of fixed MIN with redundant routed over alternative and to build a high-pe with enhanced reliabil
The gamma intercor type of MIN. Though
VLSI technology, research on received much attention in recent
development of multiprocessors, the .on networks plays an important
performance of the whole system. network design is the multistage :k (MIN). The MIN is employed connect processors and memory
multiple stages of small cross- size. It is desirable to set up a paths (so that requests can be paths) to achieve fault tolerance
rformance multiprocessor system .ty. nection network (GIN) [l] is one able to offer multiple paths from
~~
0 IEE, 1998 ZEE Proceedings online no. Paper first received 11th 1997 The author is with the University, Tmsui, Taipei * A preliminary version of tk ISMM Intemational Confen and Systems, October 1995.
any source to most destinations, the GIN provides a unique path between a source S and a destination D when S equals D, and the multiple paths existing between certain (S , D) pairs share a single common route for many stages before starting to fork (i.e. they are not disjoint), cutting down the network’s ability to tolerate faults. Research has been carried out to enhance the GIN’s ability to tolerate faults so as to achieve a new network with high reliability. For instance, both the extra stage gamma network [2] and the PM22I interconnection network [3] try adding an extra stage to the GIN to build up multiple paths between every (S, D) pair, but have generated higher hardware complexity. The monogamma interconnec- tion network (MGIN) [4] is able to provide multiple paths between each source-destination pair with hard- ware complexity no more than that of the GIN, but it fails to guarantee reliable communication because its multiple paths are not necessarily disjoint so that when an internal switch fails, certain source-destination pairs may not be able to communicate with each other.
For improvement, we consider altering the GIN’s interconnecting patterns between stages to obtain mul- tiple disjoint paths between every (S, 0) pair. Such a modified network is referred to as a Balanced Gamma Interconnection Network (BGIN) as it exhibits a bal- ance feature of the connecting patterns between stages. Being able to provide totally disjoint paths from any source to any destination without increasing hardware complexity, the BGIN can tolerate any arbitrary single fault and thus provides much enhanced terminal relia- bility.
1!)981702 September 1996 and in revised form 4th August
Depi.rtment of Electrical Engineering, Tamkang
is paper was presented at the 7th IASTEDi nce on Parallel and Distributed Computing
Hsien, Taiwan 25137
2 Proposed network
A GIN of size N = 2” (denoted by GIN,) consists of n + 1 stages; each stage involves N switches [1]. Every switch at intermediate stages is a 3 x 3 crossbar, while the two at the first and last stages are of sizes 1 x 3 and 3 x 1. The N sources are numbered from 0 to N - 1, as are the N switches at each stage and the N destinations. The stages are numbered from 0 to n. Connecting patterns between stages are based on the plus-min~s-2~ functions, namely, the jth switch at stage i (0 5 i < n) is connected to three switches at stage i + 1 according to the three functions: J;p(j) = j + 2’(modN), J m ( j ) = j - 2l(modN), and f,”(j) = j (which, respectively, define the lower, upper, and straight connections originating from switch j at stage z). For a GIN,, it is easy to derive that the connecting patterns between stages can be ordered as 2O, 2l, 22, ..., 2n-1 for the lower connections and - 2O, - 2*, - 22, ..., ~ 2n-1 for the upper
connections. (A GIN of size 16 is depicted in Fig. 1 for reference.)
stage 0 1 2 3 4
Fig. 1 Gamma interconnection network of size I6 Bold lines indicate alternative paths between (1, 0)
A request from any source S in a GIN, can be routed to its destination D under the guidance of an n- digit tag T which represents the difference (modulo N) between D and S, i.e. T = D - S(modN). Each tag digit can be 1, 0 or -1. Digit di is used at stage i in such a way that the lower (or upper) connection is taken when di equals 1 (or -l), and the straight connection is taken whe-n d, is 0. (For convenience, -1 is hereafter denoted by 1.) The GIN makes use of the binary fully redun- dant number system to represent each tag; a tag T # 0 has multiple representations, corresponding to multiple paths. For a given N = 2", there are 3" different tag representations since the tag consists of IZ digits. The tag values fall within the range -(N - 1) to ( N - l), and the values (i - N) and i are equivalent. (For instance, five possible pathSAfrom source I to destination 0 with tags 0001, 001 1, 01 11, 11 11 and 11 1 I are illustrated in Fig. 1.) The numbers of alternative paths in a GIN4 are listed in Table 1. As can be seen, there is a unique path for tag= 0; for certain tag values (N/2, N/4 and 3N/4, for example), alternative paths are few and they are not
disjoint. (This fact holds for any sized GIN and tends to lower the netwozk's reliability.) This happens, we suspect, because of the unbalanced spans among the stages. The span for stage i here refers to the vertical distance between the two destination switches at stage i + 1 along the upper and lower connections originating from any switch at stage i, e.g. the span for stage i in the GIN is 2i+1. For GINS, the unbalanced spans (start- ing small for stage 0 and growing larger for later stages owing to their connecting patterns) allow the alterna- tive paths for any tag to pass at most two switches at each stage and hence bring about the above unfavoura- ble consequence. To balance the spans, we enlarge those for early stages and make those for later stages grow evenly by changing the order of connecting pat- terns for the upper connections into -2n-1, -2n-2, -P3, ..., -2O (that is, the reversed order of the GIN'S) while keeping that of the straight and lower connections unchanged. Owing to the reversed orders between the upper and lower connections, the spans among all stages are much more balanced because when the lower connection from a certain stage has a smaller 'vertical hop', the upper connection from this stage would have a bigger 'vertical hop', and vice versa. Such an altera- tion in the connecting patterns not only helps create multiple paths for each source-destination pair but also makes the alternative paths distribute more evenly among all tags (as shown in Table 1, where the number of alternative paths in a GIN4 and MGIN4 is also pro- vided for comparison). Because of the balance feature, the new network is called the Balanced Gamma Inter- connection Network or BGIN. The balance idea helps generate more independent and separated alternative paths that are very apt to become disjoint. As Table 2 demonstrates, multiple disjoint paths can be found for every tag in a BGIN,; but there are no disjoint paths for several tags in a GIN4 or MGIN,. (The existence of disjoint paths between any source-destination pair in the BGIN is proved in the following Section.)
The stages of a BGIN, are numbered from 0 to n and the connecting patterns between stages are based on the pl~s-2~-minus-2"" functions, namely, the jth switch at stage i (0 I i < n) is connected to three switches at stage i + 1 according to the three functions:
f p ( i ) = j + 2"mod N), fm(i) = j - 2"-'-'(mod N), and AJ(i) = j , which, respectively, define the lower, upper and straight connections originating from switch j at stage i. A BGIN, is depicted in Fig. 2 for illustration.
Each request in a BGIN, also carries a routing tag of n digits as in a GIN,. The weight of every tag digit is
Table 1: Number of alternative paths for every tag in a network of size 16
The total number of paths amounts to 34 = 81 in every network
Table 2: Maximum number of disjoint paths for every tag in a network of size 16
28
Tag 0 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5
GIN, 0 2 0 2 0 2 0 2 0 2 0 2 0 2 0 2
MGlN4 3 2 2 2 2 0 0 0 2 0 0 0 2 2 2 2
BGIN4 3 2 3 2 3 2 3 2 2 2 3 2 3 2 3 2
IEE Proc -Comput Digit Tech, Vol 145, No I , January 1998
determined by the ith tag digit di has the has the weight 2i(mod is represented by means dant number system. request is routed th roqh the lower (or upper) the straight connection is exactly the same in part.
stage 0 3 4
Fig.2
connecting patterns. Specifically, :he weight -2n-1-i(mod N) if di is 1; it 10 if di equals 1. That is, the tag
of a 'modified' binary redun- Digit di is used at stage i when a
a BGIN: the request takes connection for di = 1 (or i) and
for di = 0. Routing complexity ii BGIN as in its GIN counter-
) rows of switches in a s of switches in Fig. 2
bricated in one single i of the GIN housed nect to = 2 x min
locate outside the y the connections ting at stage i + 1
is the minimum function. ge i + 1 need to connect <
ide the chip, con- . Thus the total number of
connections for r and r destinations. It is then modified GIN with connect-
p functions, the total per chip is 2r f 2 x Z; Through evaluation, b
later Sections).
3 Proof of the existence of multiple disjoint paths
Observing the alternative paths in a BGIN,, we have the following lemma. Lemma 1. Among the alternative paths in a BGIN, each with an n-digit tag dn-ldn-2 ... dldo of value 6, there exist two paths with
d o = { i and 1 if 6 = Y - 1 - 1
Proof. The lemma will be proved case by case. Case 1. 6 = 2"-': Two paths with tag 000 ... O i (do = i) and tag 100 ... 0 (do = 0) can be found. Case 2; 6 = 2n-' 1: Two paths with tag io0 ... O i (do = 1) and tag 1100 ... 01 (do = 1) can be found. Case 3. Otherwise. One path with do = 0 can be found for the following 6s.
(1) 0 I 6 5 2n ~ 2 and 6 is even: the path found is with the remaining n - 1 tag digits dn-ldn-2 ... dl being from 000 ... 0 to 111 ... 1.
(2) 1 I 6s 2"' - 3 and 6 is odd: the path found is with dn-l = 1 and the remaining n - 2 tag digits dn-2dn-3 ... dl being from 000 ... 01 to 111 ... 1.
remainiqg n - 1 tag digits dn-ldn-2 ... dl being from 111 ... 1 to 100 ... 0 (i.e. the value from -(2"-l - 1) to -1, which is equivalent to the value from 2"-' + 1 to 2" - 1).
Another path with do = 1 can be found for the fol- lowing 6s.
(1) 1 5 6 I 2" - 1 and 6 is odd: the path found is with the remaining n - 1 tag digits d,_,d,, ... dl being from 000 ... 0 to 111 ... 1.
(2) 0 I 6 5 2"-' - 2 and 6 is even: the path found is with dn-l = 1 and the remaining n - 2 tag digits dn-2dn-3 ... dl being from 000 ... 0 to 111 ... 1.
(3) 2"-' + 2 I 6 I 2" - 1: the path found is with the remaining n - 1 tag digits dn-ldn-2 ... d, being from 111 ... 1 to 0100 ... 0 (i.e. the value from -(2,-l - 1) to -2, which is equivalent to the value from 2"' + 1 to 2" -
The lemma is thus proved. Among all possible paths from S to D in a BGIN,,
let A denote the set of paths that use the upper or straight connections from switches at stage 0, i.e. do = 1 or 0, and C2 denote the set of paths that use the lower connections from switches at stage 0, i.e. do = 1. We have the following lemma. Lemma 2. Consider the paths from S to D in a BGIN,. Any path in A and any path in Q have no internal switches in common. Proof. Let switch j be referred to as an even (odd) switch if j is even (odd). As mentioned, the lower, upper and straight connections from switch j at stage i in a BGIN, are defined by functions LJ'('j) = j + 2"mod N), L*(i) = j - 2n-1-i(mod N), and fl('j) = j . We observe that an even (odd) switch at stage 0 connects an even (odd) switch at stage 1 when an upper or a straight connection is taken or connects an odd (even) switch at stage 1 when a lower connection is taken. In addition, from stage 1 on, an even (odd) switch can reach only even (odd) internal switches at later stages, regardless of what connections are used. Consequently, when S is even (odd), the paths in A which use only the upper or
i and 0 if 6 = 2"-l
0 and 1 otherwise
(3) 2"' + 1 I 6 c: 2" - 1: the path found is with
2).
IEE Proc-Comput. Digit. Tech.] Vol. 14S, No. I , January 1998 29
the straight connections from switches at stage 0 can reach only even (odd) internal switches, whereas the paths in C2 which use only the lower connections from switches at stage 0 can reach only odd (even) internal switches. The fact that any paths in A and any paths in LR have no internal switches in common is thus proved.
The subsequent theorem characterises a BGIN, able to tolerate any arbitrary single fault. Theorem. Consider the alternative paths in a BGIN,. There exist at least two disjoint paths (paths with no internal switch in common) between any source-desti- nation pair. Proof Two cases are to be considered. Case 1. 6 # 2,-l: according to lemma 1 and the defini- tion of A and Q, it is easy to see that there exists at least one path in A and one in LR. As stated in lemma 2, any path in A and any path in C2 have no internal switches in common, indicating there exist at least two disjoint paths between any pair of source and destina- tion for the case. Case 2. 6 = 2n-1: it is e3sy to verify that two disjoint paths with tag 000 ... 01 and tag 100 ... 0 exist in this case. The theorem is thus proved.
The proof of the theorem reinforces the fact that our BGIN has totally disjoint paths for every (S, 0) pair and is able to tolerate any arbitrary single fault accord- ingly.
4 Terminal reliability evaluation
Terminal reliability between a source-destination pair in a MIN is the probability that at least one path exists for communication between the pair. For any tag in the GIN, all the alternative paths may be represented by a simple ladder diagram [l], but it is not the case with the BGIN. The alternative paths in a BGIN no longer constitute a simple structure, making the deriva- tion of an exact expression for the terminal reliability fairly complicated.
Among the established algorithms for evaluating ter- minal reliability, CAREL, a path enumeration method, demonstrates the best efficiency as claimed in [5]. When CAREL is applied to evaluating the terminal reliability of a MIN, path information for a tag in the MIN should be given and a path is represented by a Boolean product of switches along the path. A Boolean tech- nique is utilised to convert the sum-of-products expres- sion into an equivalent sum-of-disjoint-products (SDP) expression, and then the switches are replaced by their reliabilities. Terminal reliability resulting from the arithmetic sum of products is therefore obtained. To be specific, if F, represents a path, the sum-of-products expression F can be given by F = u,"=~ F, where n denotes the number of paths between a source-destina- tion pair in a MIN, and the equivalent SDP expression F(disjoint) will be generated by
For this, CAREL uses Boolean algebraic concepts to define four operators - COMpare, REDuce, CoMBine and GENerate. That is, to obtain the equivalent SDP expression, CAREL needs to apply the four operators to each term above, involving a rather complicated procedure. To simplify it, instead of obtaining F(dis- joint) from the n terms in eqn. 1, we look for F(disjoint)
_- -- - F1 + F z F + F ~ F ~ F2+*-.fF,F1F2...Fn-1 (1)
30
to obtain terminal unreliability first. Terminal unrelia- bility between a source-destination pair is, by our defi- nition, the probability that no paths exist between the pair. It can be gained from F with only one term
F1 FZ F3 . . F, To gather terminal unreliability, the equivalent SDP expression F(disjoint) is pursued and the switches in it are replaced by their reliabilities. Thus we have termi- nal unreliability (resulting from the arithmetic sum of products) and hence terminal reliability (from 1 - ter- minal unreliability). To generate the final disjoint terms F(disjoint) from F , we need to -_- apply only one opera- tion on only one term, that is, Fl F2F3 ... z. The only operation employed is similar to the CoMBine opera- tion in CAREL which uses six Boolean algebraic for- mula to convert a Boolean product term into the equivalent SDP form.
--_ -
0.3 I
In n
0 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 tag
Terminal unreliabilities for various networks of size 16 Fig.3 In each case. 1st column = GIN 2nd column = MGIN
3rd column = REGIN 4th column = BGIN
In evaluating terminal reliabilities for any MINs, our new approach [6] involves a much simpler procedure, and easier programming. It has been programmed to evaluate GINs for their terminal reliabilities and the values obtained are the same as those resulting from the formula adopted by [l], assuring the correctness of our method and its implementation. This simple approach has been employed to calculate terminal reli- abilities for BGIN4 and BGIN6, with results plotted in Figs. 3 and 4. (Note that instead of terminal reliabili- ties, terminal unreliabilities versus tags are plotted in the figures for more informative presentation. Terminal reliability can be easily obtained by 1 - terminal unreli- ability, that is, high/low unreliability in the Figures reflects low/high reliability. The reliability of a 3 x 3 switch is assumed to be 0.9; the 1 x 3 and 3 x 1 switches at stage 0 and n are faultfree.) For easy com- parison, the results for GINs, MGINs and REGINs [7] of system sizes 16 and 64 are also plotted in both Fig- ures. The REGIN is another modified GIN, also built by altering the connecting patterns of a GIN to create disjoint paths, but only the one type adopted here has multiple disjoint paths between every source-destina- tion pair and thus has the highest terminal reliability for every tag among REGINs. As can be seen from the Figures, our BGIN enjoys a much improved and very stable terminal reliability as expected, while the reliabil- ity values for both the GIN and MGIN are not only low but relatively unstable. To give an example, when the tags are 8 and 32 (= N/2), respectively, in size 16 and size 64 networks, the GIN experiences the lowest
IEE Proc -Comput Digtt Tech, Vol 145, No I , January 1998
reliability values (as bility values for the thanks to the existenc: for the REGIN, in bility values than bot1 its overall terminal of the BGIN except work, where the REGIN ity values (which the REGIN has 0r.e BGIN, e.g. three for BGIN). It is also worth MGIN has the same tag = 32 in MGIN6) in both MGIN4 and REGIN, due to the on these tags for the multiple disjoint p a t h nal reliability. The fact much better terminal MGIN but even more REGIN should be interest: the existence the presence of its terns.
IEE Proc -Comput Digit Tecz
vihen the tag is 0), while the relia- BGIN remain remarkably high, of its multiple disjoint paths. As
almost all cases, it has higher relia- the GIN and MGIN. However,
rcliability remains lower than that c m certain tags for the size 16 net-
enjoys slightly higher reliabil- happens on the rare occasions when
more disjoint path than the the REGIN with only two for the
noting that, on certain tags, the (e.g. when tag = 8 in MGIN4 and or even higher (e.g. when tag = 0 MGIN6) reliability values than the
existence of no fewer disjoint paths MGIN, assuring once again that
are critical in enhancing termi- that our BGIN shows not only
reliability than both the GIN and stable higher values than the
attributed to two focal points of of its multiple disjoint paths and
By modifying the connecting patterns between stages of GINS, we propose a new interconnection network which is able to obtain multiple disjoint paths between any source-destination pair. The new network exhibits a balance feature of its connecting patterns and is called a balanced gamma interconnection network (BGIN). The unique balance feature helps to generate more independent and separated alternative paths that are very likely to become disjoint.
In fact, thanks to the existence of totally disjoint paths between any communication pair and to its unique balanced connecting patterns, our BGIN exhib- its higher terminal reliability in most cases when com- pared with the GIN, MGIN and REGIN. Routing complexity is the same for the BGIN and its GIN counterpart. If several rows of switching elements are fabricated in one chip using VLSI technology, our BGIN is found to have the same hardware complexity as the GIN. That is, without increasing any hardware complexity, our BGIN is able to guarantee the exist- ence of multiple disjoint paths between any sourcedes- tination pair, giving notably enhanced terminal reliability. Performance evaluation has been under-
31
taken as in 171. It is found through simulation that 7 References BGINs deliver iirtually identical performance to GINS, indicating that altering the interconnecting patterns between GIN stages leads to no performance loss but rather a significant and stable gain in terminal reliabil- ity. Additionally, since reversing the order of the upper connections of the GIN enables the BGIN to achieve an improved and stable terminal reliability, we believe the same result can also be realised by reversing the order of the lower connections of’ the GIN.
6 Acknowledgment
This work was supported in part by the National Sci- ence Council, Taiwan, under Grant No. NSC82-0102- E-032-028-T and NSC86-222l-E-032-01OR.
1
2
3
4
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PARKER, D.S., and RAGHAVENDRA, C.S.: ‘The gamma net- work’, IEEE Trans. Comput., Apr. 1984, C-3, (4), pp. 367-373 LEE, K.Y., and HEGAZY, W.: ‘The extra stage gamma net- work’.Proceedinns of 13th international svmnosium on Conzouter
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architecture, Juni 1986, pp. 175-182 LEE, K.Y., and YOON, H.: ‘The PM22I interconnection net- work‘, IEEE Trans., Feb. 1989, C-3$ (2), pp. 302-307 RAGHAVENDRA, C.S., and PARKER, D.S.: ‘Reliability anal- ysis of an interconnection network’. Proceedings of 4th interna- tioual conference on Distributed computing systems, May 1984, pp. 461471 SOH, S., and RAI, S.: ‘CAREL: computer aided reliability evalu- ator for distributed computing networks’, IEEE Trans., Parallel Distrib. Syst., Apr. 1991, 2, (2), pp. 199-213 CHUANG, P.-J., and KUO, C.-L.: ‘A simple approach to the evaluation of multistage interconnection network reliability’. Pro- ceedings of 37th Midwest svmnosium on Circuits and svstems. , I
Aug. fi94, pp. 313-316 TZENG, N.-F., CHUANG, P.-J., and WU, C.-H.: ‘Creating dis- ioint Daths in ramma interconnection networks’. ZEEE Trans. ”Comput., Oct. 1893, 42, (lo), pp. 1247-1252
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