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CS 325: CS Hardware and SoftwareOrganization and Architecture

Sequential Circuits 1

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Outline•Sequential Circuits Overview•Clock Signals•Classification of Sequential Circuits• Latches/Flip Flops•S-R Latch•S-R Flip Flop•D Flip Flop• J-K Flip Flop

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Sequential Circuits•Unlike Combinational Circuits, Sequential Circuits have some form of inherent “Memory” •They are able to take into account their previous input state, as well as their current input state.

•Output of Sequential Circuits based on three states:•Present input state•Previous input state•And/Or previous output state

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Combinational Circuits•Combinational circuits implement the essential functions of a digital computer.•Adders, subtractors, Boolean functions, inverters, decoders

•However, they provide no memory or state information

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Sequential Circuits•Sequential Circuits stay fixed in their current state until the next clock cycle signal changes in one of the states.•Clock:• A circuit that emits a series of pulses with precise pulse width (how

long the pulse lasts) and interval (how long until the next pulse).• Number of pulses per second is the Clock Frequency, commonly

between 1 and 4 billion pulses per second (1 – 4 GHz).• Clock frequency is controlled by a crystal oscillator.• Time between edges of 2 consecutive pulses is the clock cycle time.• Clock frequency = 1 / clock cycle time

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Sequential Circuit Representation

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Sequential Circuits

•“Sequential” means actions occur one after the other.•In sequential circuits, the clock signal determines when actions occur.•In the same way that gates are the building blocks of combinational circuits, latches and flip-flops are the building blocks of sequential circuits.•Latches and flip-flops are circuit elements whose output depends on current inputs and previous input and output states.

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Classification of Sequential Circuits

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Classification of Sequential Circuits

•Event Driven: Asynchronous circuits that change state immediately when enabled.•Ex: Latch

•Clock Driven: Synchronous circuits that are synchronized to a specific clock signal.•EX: Flip-Flop

•Pulse Driven: Combination of Event and Clock driven sequential circuits that responds to triggering pulses.

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Latch•Circuit that has two inputs and one output.•Input: SET•When SET = 1, output of the latch is 1.

•Input: RESET•When RESET = 1, output of the latch is 0.

•Latches remember input states.•If SET is activated, the output goes and stays high, even if SET returns to 0.•If RESET is activated, the output goes and stays low, even if RESET returns to 0.

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Latch•Exist in one of two states.•Absence of input, remains in that state.•Can function as 1-Bit memory.•Has two output states, which are always complements of each other.•Generally expressed as and .

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S–R Latch•Asynchronous•Two inputs: Set, Reset•Has feedback so output Q not determined by just the 2 inputs.•Two stable states for R = S = 0.•0 or 1 depending on Q

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S–R Latch•Two stable states:

S momentarily set to 1 R momentarily set to 1 Q = 1 Q = 0

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S–R Latch Memory•Q is the value of the bit.•Setting S = 1 (R remains 0) sets the value of Q to 1.• State is stable even if S is returned to 0.

•Setting R = 1 (S remains 0) sets the value of Q to 0.• State is stable even if R is returned to 0.

State Q = 1

State Q = 0Block Diagram for the S-R Latch

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S–R Latch Definition

State Table Simplified State TableCurrent Inputs Current State Next State

S R Qn Qn+1

0 0 0 0

0 0 1 1

0 1 0 0

0 1 1 0

1 0 0 11 0 1 11 1 0 X1 1 1 X

S R Qn+1

0 0 Qn

0 1 0

1 0 1

1 1 X

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Flip-Flop•Clock Driven•Same logic as the Latch, but synchronized by clock pulse

input.•Only changes state when a control signal (clock) goes from high to low, or low to high.

•Common types of flip-flops•S-R flip-flop•D flip-flop• J-K flip-flop

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Clocked S-R Latch (S-R Flip-Flop)

•Synchronous sequential circuit•Based on clock pulse

•Events in a computer are typically synchronized to a clock pulse, so that changes occur only when a clock pulse changes state.

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Clocked S-R Flip-FlopCurrent Inputs Current State Next State

CLK S R Qn Qn+1

0 0 0 0 01 0 0 0 00 0 0 1 11 0 0 1 00 0 1 0 01 0 1 0 00 0 1 1 11 0 1 1 00 1 0 0 01 1 0 0 10 1 0 1 11 1 0 1 10 1 1 0 X1 1 1 0 X0 1 1 1 X1 1 1 1 X

CLK S R Qn+1

0 0 0 Qn

0 0 1 0

1 1 0 1

1 1 1 X

Simplified State Table

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S-R Flip-Flop Block Diagram

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Problem with the S-R Flip-Flop

•S = R = 1 can exist.•Creates unstable output state, Q = •Must be voided.

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D Flip-Flop•Synchronous sequential circuit• Based on clock pulse

•Disadvantage of S-R Flip-Flop: Set and Rest can both be set to logical “1”, resulting in (not allowed).•D Flip-Flop fixes this issue by requiring only one input D,

which is connected to S, and is connected to R.

D Qn+1

0 0

1 1

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D Flip-Flop•Sometimes referred to as the data flip-flop•Storage for 1 bit of data

•Output is always equal to the most recent value applied to the input.•The D flip-flop remembers and produces the last input• (binary data storage)

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D Flip-Flop Block Diagram

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D Flip-Flop Uses•One main use of a D Flip-Flop is as a Frequency Divider.• If the output on a D Flip-Flop is connected directly to the D input

giving the device closed loop “feedback”, successive clock pulses will make the D Flip-Flop “toggle” once every two clock cycles.

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D Flip-Flop Uses•Parallel Registers – Essential element of the CPU• Digital circuit used within the CPU to store data• Consists of a set of 1-bit memories (D Flip-Flops) that can be read

or written simultaneously.

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D Flip-Flop Uses•Shift Registers – Essential element of the CPU• Accepts and transfers information serially.• 5-bit example below accepts data at the D input of the leftmost D

Flip-Flop.• Data propagates to the right with each clock pulse.

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J-K Flip-Flop•Synchronous sequential circuit• Based on clock pulse

•The J-K Flip Flop is the most widely used of all flip-flop designs.• The sequential operation is exactly the same as for the S-R Flip Flop.• The difference is the J-K Flip Flop has no invalid or forbidden input

states.

J K Qn+1

0 0 Qn

0 1 0

1 0 1

1 1

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J-K Flip-Flop Block Diagram

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J-K Flip-Flop Uses•Counters – Essential element of the CPU (Program counter)• Ripple counter (shown below) – change that occurs begins on the left J-K Flip-

Flop and “ripples” to the right• Q0 (LSB), Q1(MSB)

• Output of the counter:• 0000, 0001, 0010, 0011, …., 1110, 1111, 0000, 0001, ….