CS35101 Ch3.Part1 1 Steinfadt SP08 KSU
CS 35101Computer Architecture
Spring 2008
Chapter 3 Part 1 (3.1-3.3)
Taken from Mary Jane Irwin (www.cse.psu.edu/~mji)and Kevin Schaffer
[adapted from D. Patterson slides]
CS35101 Ch3.Part1 2 Steinfadt SP08 KSU
Head’s Up Last week’s material
Addressing modes; Assemblers, linkers and loaders
This week’s material MIPS arithmetic and ALU design
- Reading assignment – PH 3.1-3.5 Reminders
Project 1 is due Thursday, Feb 21st (by 11:55pm) Exam 1 is Thursday, Feb 21st
CS35101 Ch3.Part1 3 Steinfadt SP08 KSU
Architects write the checks that the design engineershave to cash. If the amount is too high, the wholeproject goes bankrupt.
Design engineers must constantly juggle manyconflicting demands: schedule, performance, powerdissipation, features, testing, documentation, trainingand hiring.
The Pentium Chronicles, Colwell, pg. 64 & 63
CS35101 Ch3.Part1 4 Steinfadt SP08 KSU
Data Types
Integers Unsigned integers Signed integers
Real numbers Floating-point numbers Fixed-point numbers
Strings
CS35101 Ch3.Part1 5 Steinfadt SP08 KSU
Machine Number Representation Bits are just bits (have no inherent meaning)
conventions define the relationships between bits andnumbers
Binary numbers (base 2) - integers0000 → 0001 → 0010 → 0011 → 0100 → 0101 → . . . in decimal from 0 to 2n-1 for n bits
Of course, it gets more complicated storage locations (e.g., register file words) are finite, so
have to worry about overflow (i.e., when the number istoo big to fit into 32 bits)
have to be able to represent negative numbers, e.g., howdo we specify -8 in
addi $sp, $sp, -8 #$sp = $sp - 8
CS35101 Ch3.Part1 6 Steinfadt SP08 KSU
Unsigned Integers Each bit bi has value bi × 2i
Count from right to left starting at zero Leftmost is most significant bit (MSB) Rightmost is least significant bit (LSB)
To convert from binary to decimal, sum those valuestogether
Repeated division by two can convert decimal to binary; theremainders form the binary number from right to left
CS35101 Ch3.Part1 7 Steinfadt SP08 KSU
Unsigned Integers At least lg n bits are
required to represent aninteger n
With k bits you canrepresent integers from 0 to2k – 1
7111
6110
5101
4100
3011
2010
1001
0000
ValueRepresentation
CS35101 Ch3.Part1 8 Steinfadt SP08 KSU
Signed Integers Many ways to encode signed integers
Signed-magnitude Biased One's complement Two's complement
In practice, two's complement is the mostcommonly used
CS35101 Ch3.Part1 9 Steinfadt SP08 KSU
Signed-Magnitude Explicit sign bit Remaining bits encode
unsigned magnitude Two representations for
zero (+0 and -0) Addition and subtraction
are more complicated
-3111
-2110
-1101
-0100
+3011
+2010
+1001
+0000
ValueRepresentation
CS35101 Ch3.Part1 10 Steinfadt SP08 KSU
Biased Add a bias to the signed
number in order to make itunsigned
Subtract the bias to returnthe original value
Typically the bias is 2k-1 fora k-bit representation
3111
2110
1101
0100
-1011
-2010
-3001
-4000
ValueRepresentation
CS35101 Ch3.Part1 11 Steinfadt SP08 KSU
Two's Complement Most significant bit has a
negative weight To negate: invert bits and
add one Implicit sign bit One negative number that
has no positive Handles overflow well
-1111
-2110
-3101
-4100
+3011
+2010
+1001
0000
ValueRepresentation
CS35101 Ch3.Part1 12 Steinfadt SP08 KSU
Possible Representations
1000 = -8
0111 = +70111 = +70111 = +70110 = +60110 = +60110 = +60101 = +50101 = +50101 = +50100 = +40100 = +40100 = +40011 = +30011 = +30011 = +30010 = +20010 = +20010 = +20001 = +10001 = +10001 = +10000 = +00000 = 00000 = +01111 = -01000 = -01110 = -11111 = -11001 = -11101 = -21110 = -21010 = -21100 = -31101 = -31011 = -31011 = -41100 = -41100 = -41010 = -51011 = -51101 = -51001 = -61010 = -61110 = -61000 = -71001= -71111 = -7
One’s Comp.Two’s Comp.Sign Mag. Issues:
balance
number of zeros
ease of operations
Which one is best?Why?
CS35101 Ch3.Part1 13 Steinfadt SP08 KSU
32-bit signed numbers (2’s complement):
0000 0000 0000 0000 0000 0000 0000 0000two = 0ten0000 0000 0000 0000 0000 0000 0000 0001two = + 1ten0000 0000 0000 0000 0000 0000 0000 0010two = + 2ten...
0111 1111 1111 1111 1111 1111 1111 1110two = + 2,147,483,646ten0111 1111 1111 1111 1111 1111 1111 1111two = + 2,147,483,647ten1000 0000 0000 0000 0000 0000 0000 0000two = – 2,147,483,648ten1000 0000 0000 0000 0000 0000 0000 0001two = – 2,147,483,647ten1000 0000 0000 0000 0000 0000 0000 0010two = – 2,147,483,646ten...
1111 1111 1111 1111 1111 1111 1111 1101two = – 3ten1111 1111 1111 1111 1111 1111 1111 1110two = – 2ten1111 1111 1111 1111 1111 1111 1111 1111two = – 1ten
What if the bit string represented addresses? need operations that also deal with only positive (unsigned)
integers
maxint
minint
MIPS Representations
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Negating a two's complement number –complement all the bits and then add a 1 remember: “negate” and “invert” are quite different!
Converting n-bit numbers into numbers with morethan n bits: MIPS 16-bit immediate gets converted to 32 bits for
arithmetic sign extend - copy the most significant bit (the sign bit)
into the other bits0010 -> 0000 00101010 -> 1111 1010
sign extension versus zero extend (lb vs. lbu)
Two's Complement Operations
CS35101 Ch3.Part1 15 Steinfadt SP08 KSU
Zero/Sign Extension Extension takes a number represented in m bits
and converts it to n bits (m < n) while preservingits value MIPS Load byte sign extends lb $s1, 100($s2) MIPS Load half word sign extends lh $s1, 100($s2)
For unsigned numbers just add zeros to the left(zero extension) lbu $s1, 100($s2)#C programs use forASCII almost exclusive of lb
lhu $s1, 100($s2)
For two's complement signed numbers, replicatethe sign bit (sign extension)
CS35101 Ch3.Part1 16 Steinfadt SP08 KSU
Design the MIPS Arithmetic Logic Unit (ALU) Must support the Arithmetic/Logic
operations of the ISAadd, addi, addiu, addusub, subumult, multu, div, divusqrtand, andi, nor, or, ori, xor, xoribeq, bne, slt, slti, sltiu, sltu
32
32
32
m (operation)
result
A
B
ALU
4
zero ovf
11
With special handling for sign extend – addi, addiu, slti, sltiu zero extend – andi, ori, xori overflow detection – add, addi, sub
CS35101 Ch3.Part1 17 Steinfadt SP08 KSU
MIPS Arithmetic and Logic Instructions
R-type:
I-Type:
31 25 20 15 5 0
op Rs Rt Rd funct
op Rs Rt Immed 16
Type op funct
ADDI 001000 xx
ADDIU 001001 xx
SLTI 001010 xx
SLTIU 001011 xx
ANDI 001100 xx
ORI 001101 xx
XORI 001110 xx
LUI 001111 xx
Type op funct
ADD 000000 100000
ADDU 000000 100001
SUB 000000 100010
SUBU 000000 100011
AND 000000 100100
OR 000000 100101
XOR 000000 100110
NOR 000000 100111
Type op funct
000000 101000
000000 101001
SLT 000000 101010
SLTU 000000 101011
000000 101100
CS35101 Ch3.Part1 18 Steinfadt SP08 KSU
Design Trick: Divide & Conquer Break the problem into simpler problems, solve
them and glue together the solution Example: assume the immediates have been
taken care of before the ALU now down to 10 operations can encode in 4 bits
0 add
1 addu
2 sub
3 subu
4 and
5 or
6 xor
7 nor
a slt
b sltu
CS35101 Ch3.Part1 19 Steinfadt SP08 KSU
Just like in grade school (carry/borrow 1s) 0111 0111 0110+ 0110 - 0110 - 0101
Two's complement operations are easy do subtraction by negating and then adding
0111 → 0111- 0110 → + 1010
Overflow (result too large for finite computer word) e.g., adding two n-bit numbers does not yield an n-bit number
0111+ 0001
Addition & Subtraction
CS35101 Ch3.Part1 21 Steinfadt SP08 KSU
Building a 1-bit Binary Adder
1 bitFullAdder
A
BS
carry_in
carry_out
S = A xor B xor carry_in carry_out = A&B | A&carry_in | B&carry_in (majority function)
How can we use it to build a 32-bit adder?
How can we modify it easily to build an adder/subtractor?
1111101011011011000101110100101010000000Scarry_outcarry_inBA
CS35101 Ch3.Part1 22 Steinfadt SP08 KSU
Building 32-bit Adder
1-bitFA
A0
B0S0
c0=carry_in
c1
1-bitFA
A1
B1S1
c2
1-bitFA
A2
B2S2
c3
c32=carry_out
1-bitFA
A31
B31S31
c31
. . .
Just connect the carry-out ofthe least significant bit FA tothe carry-in of the next leastsignificant bit and connect . . .
Ripple Carry Adder (RCA) advantage: simple logic, so small
(low cost)
disadvantage: slow and lots ofglitching (so lots of energyconsumption)
CS35101 Ch3.Part1 23 Steinfadt SP08 KSU
A 32-bit Ripple Carry Adder/Subtractor
Remember 2’scomplement is just
complement all the bits
add a 1 in the leastsignificant bit
A 0111 → 0111B - 0110 → +
1-bitFA S0
c0=carry_in
c1
1-bitFA S1
c2
1-bitFA S2
c3
c32=carry_out
1-bitFA S31
c31
. . .
A0
A1
A2
A31
B0
B1
B2
B31
add/sub
B0
control(0=add,1=sub) B0 if control = 0,
!B0 if control = 1
CS35101 Ch3.Part1 25 Steinfadt SP08 KSU
Overflow Detection and Effects Overflow: the result is too large to represent in the
number of bits allocated When adding operands with different signs, overflow
cannot occur! Overflow occurs when adding two positives yields a negative or, adding two negatives gives a positive or, subtract a negative from a positive gives a negative or, subtract a positive from a negative gives a positive
On overflow, an exception (interrupt) occurs Control jumps to predefined address for exception Interrupted address (address of instruction causing the
overflow) is saved for possible resumption Don't always want to detect (interrupt on) overflow
CS35101 Ch3.Part1 26 Steinfadt SP08 KSU
New MIPS Instructions
$s1 = Mem($s2+25)lhu $s1, 25($s2)25ld half unsignedCond.Branch(I & Rformat) if ($s2<6) $s1=1
else $s1=0
sltiu $s1, $s2, 6bset on less thanimm unsigned
if ($s2<$s3) $s1=1else $s1=0
sltu $s1, $s2, $s30 and 2bset on less thanunsigned
$s1 = Mem($s2+25)lbu $s1, 25($s2)24ld byteunsigned
$s1 = $s2 + 6addiu $s1, $s2, 69addimm.unsigned
0 and 230 and 21Op Code
DataTransfer
$s1 = $s2 - $s3subu $s1, $s2, $s3sub unsigned$s1 = $s2 + $s3addu $s1, $s2, $s3add unsignedArithmetic
(R & Iformat)
MeaningExampleInstrCategory
Sign extend – addiu, addiu, slti, sltiu Zero extend – andi, ori, xori Overflow detected – add, addi, sub