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CS184a: Computer Architecture (Structure and Organization). Day 16: February 14, 2003 Interconnect 6: MoT. Previously. HSRA/BFT – natural hierarchical network Switches scale O(N) Mesh – natural 2D network Switches scale W (N p+0.5 ). Today. Good Mesh properties HSRA vs. Mesh MoT - PowerPoint PPT Presentation
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Caltech CS184 Winter2003 -- DeHon 1 CS184a: Computer Architecture (Structure and Organization) Day 16: February 14, 2003 Interconnect 6: MoT
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Page 1: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon1

CS184a:Computer Architecture

(Structure and Organization)

Day 16: February 14, 2003

Interconnect 6: MoT

Page 2: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon2

Previously

• HSRA/BFT – natural hierarchical network– Switches scale O(N)

• Mesh – natural 2D network– Switches scale (Np+0.5)

Page 3: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon3

Today

• Good Mesh properties

• HSRA vs. Mesh

• MoT

• Grand unified network theory – MoT vs. HSRA– MoT vs. Mesh

Page 4: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon4

Mesh1. Wire delay can be Manhattan Distance

2. Network provides Manhattan Distance route from source to sink

Page 5: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon5

HSRA/BFT

• Physical locality does not imply logical closeness

Page 6: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon6

HSRA/BFT

• Physical locality does not imply logical closeness

• May have to route twice the Manhattan distance

Page 7: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon7

Tree Shortcuts

• Add to make physically local things also logically local

• Now wire delay always proportional to Manhattan distance

• May still be 2 longer wires

Page 8: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon8

BFT/HSRA ~ 1D

• Essentially one-dimensional tree – Laid out well in 2D

Page 9: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon9

Consider Full Population Tree

ToM

Tree ofMeshes

Page 10: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon10

Can Fold Up

Page 11: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon11

Gives Uniform Channels

Works nicely p=0.5

Channels log(N)

[Greenberg and Leiserson, Appl. Math Lett. v1n2p171, 1988]

Page 12: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon12

Gives Uniform Channels

(and add shortcuts)

Page 13: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon13

How wide are channels?

Np

cNw )(

...

4

)8/()4/()2/()(

N

NwNw

N

NwNwW

...211 2222

ppp

p

N

cW N

Page 14: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon14

How wide are channels?

...211 2222

ppp

p

N

cW N

...11 222212215.0 pppp

NcW

22 21

5.0

1

11 p

pp

NcW

Page 15: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon15

How wide are channels?

• A constant factor wider than lower bound!

• P=2/3 ~8

• P=3/4 ~5.5

22

21

5.0

1

1p

pp

NcW

Page 16: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon16

Implications

• Tree never requires more than constant factor more wires than mesh– Even w/ the non-minimal

length routes– Even w/out shortcuts

• Mesh global route upper bound channel width is O(Np-0.5)– Can always use fold-

squash tree as the route

Page 17: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon17

MoT

Page 18: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon18

Recall: Mesh Switches• Switches per switchbox:

– 6w/Lseg

• Switches into network: – (K+1) w

• Switches per PE: – 6w/Lseg + Fc(K+1) w

– w = cNp-0.5

– Total Np-0.5

• Total Switches: N*(Sw/PE) Np+0.5 > N

Page 19: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon19

Recall: Mesh Switches

• Switches per PE: – 6w/Lseg + Fc(K+1) w

– w = cNp-0.5

– Total Np-0.5

• Not change for

– Any constant Fc

– Any constant Lseg

Page 20: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon20

Mesh of Trees

• Hierarchical Mesh

• Build Tree in each column

[Leighton/FOCS 1981]

Page 21: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon21

Mesh of Trees

• Hierarchical Mesh

• Build Tree in each column

• …and each row

[Leighton/FOCS 1981]

Page 22: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon22

Mesh of Trees

• More natural 2D structure

• Maybe match 2D structure better?– Don’t have to route

out of way

Page 23: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon23

Support P

P=0.5P=0.75

Page 24: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon24

MoT Parameterization

• Support C with additional trees

C=1

C=2

Page 25: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon25

Mesh of Trees• Logic Blocks

– Only connect at leaves of tree

• Connect to the C trees (4C)

Page 26: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon26

Switches

• Total Tree switches– 2 C (switches/tree)

• Sw/Tree:

...5.0

21

2 222

25.0 p

Np

25.1

1

1

2 p

N

Page 27: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon27

Switches

• Total Tree switches– 2 C (switches/tree)

• Sw/Tree:

2

5.11

1

2 p

N

)(1 2

5.1 NNC

esTreeSwitch p

Page 28: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon28

Switches

• Only connect to leaves of tree

• C(K+1) switches per leaf

• Total switches Leaf + Tree O(N)

Page 29: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon29

Wires

• Design: O(Np) in top level• Total wire width of channels: O(Np)

– Another geometric sum

• No detail route guarantee (at present)

Page 30: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon30

Empirical Results

• Benchmark: Toronto 20

• Compare to Lseg=1, Lseg=4

– CLMA ~ 8K LUTs

• Mesh(Lseg=4): w=14 122 switches

• MoT(p=0.67): C=4 89 switches

– Benchmark wide: 10% less• CLMA largest• Asymptotic advantage

Page 31: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon31

Shortcuts

• Strict Tree– Same problem with physically far, logically close

Page 32: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon32

Shortcuts

• Empirical– Shortcuts reduce C– But net increase in total switches

Page 33: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon33

Staggering• With multiple Trees

– Offset relative to each other– Avoids worst-case discrete breaks– One reason don’t benefit from shortcuts

Page 34: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon34

Flattening • Can use arity other than two

Page 35: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon35

MoT Parameters

• Shortcuts

• Staggering

• Corner Turns

• Arity

• Flattening

Page 36: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon36

MoT Layout

Main issue is layout 1D trees in multilayer metal

Page 37: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon37

Row/Column Layout

Page 38: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon38

Row/Column Layout

Page 39: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon39

Composite Logic Block Tile

Page 40: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon40

P=0.75 Row/Column Layout

Page 41: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon41

P=0.75 Row/Column Layout

Page 42: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon42

MoT Layout

• Easily laid out in Multiple metal layers– Minimal O(Np-0.5) layers

• Contain constant switching area per LB– Even with p>0.5

Page 43: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon43

Relation?

Page 44: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon44

How Related?

• What lessons translate amongst networks?

• Once understand design space– Get closer together

• Ideally– One big network design we can

parameterize

Page 45: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon45

MoT HSRA (P=0.5)

Page 46: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon46

MoTHSRA (p=0.75)

Page 47: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon47

MoT HSRA

• A C MoT maps directly onto a 2C HSRA– Same p’s

• HSRA can route anything MoT can

Page 48: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon48

HSRA MoT

• Decompose and look at rows

• Add homogeneous, upper-level corner turns

Page 49: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon49

HSRAMoT

Page 50: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon50

HSRAMoT

Page 51: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon51

HSRAMoT

Page 52: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon52

HSRAMoT

• HSRA + HSRAT = MoT w/ H-UL-CT– Same C, P– H-UL-CT: Homogeneous, Upper-Level, Corner Turns

Page 53: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon53

HSRAMoT (p=0.75)

Page 54: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon54

HSRAMoT (p=0.75)• Can organize HSRA as MoT

• P>0.5 MoT layout– Tells us how to layout p>0.5 HSRA

Page 55: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon55

MoT vs. Mesh• MoT has Geometric Segment Lengths

• Mesh has flat connections

• MoT must climb tree– Parameterize w/ flattening

• MoT has O(Np-0.5) less switches

Page 56: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon56

MoT vs. Mesh

• Wires– Asymptotically the same (p>0.5)– Cases where Mesh requires constant less– Cases where require same number

Page 57: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon57

Admin

• Monday = President’s Day Holiday– No Class– (CS Systems down for Maintenance)– Assignment due Wed. as a result

Page 58: CS184a: Computer Architecture (Structure and Organization)

Caltech CS184 Winter2003 -- DeHon58

Big Ideas

• Networks driven by same wiring requirements– Have similar wiring asymptotes

• Can bound– Network differences– Worst-case mesh global routing

• Hierarchy structure allows to save switches– O(N) vs. (Np+0.5)


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