Current Source & Bias Circuits Current Source & Bias Circuits
CSE 577 Spring 2011
Insoo Kim, Kyusun Choi
Mixed Signal CHIP Design Lab.
Department of Computer Science & Engineering
The Pennsylvania State University
IntroductionIntroduction
� Required Features of Current Source
� High Rout
� Wide Operation Range
� Constant Current Source
� Low PVT (Process, Voltage, Temperature) Sensitivity
� Required Features of Bias Circuit
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� Required Features of Bias Circuit
� Low Rout
� Low PVT Sensitivity
Current SourceCurrent Source
• Basic Current Source
• Wilson Current Mirror
• Cascode Current Mirror
Ideal vs. Actual Current SourceIdeal vs. Actual Current Source
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Simple NMOS Current SourceSimple NMOS Current Source
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What’s the bad feature of this?
Cascode Current SourceCascode Current Source
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What’s the bad feature of this?
Basic Current MirrorBasic Current Mirror
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What’s the bad feature of this?
Wilson Current MirrorWilson Current Mirror
11
)/(
)/(
LW
LWI
g
gII ref
mrefout ⋅=⋅=•
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What’s the drawback of this circuit?
22 )/( LWgm
Cascode Current MirrorCascode Current Mirror
But, it still has limited output swing problem.
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Wide Swing Cascode Current MirrorWide Swing Cascode Current Mirror
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Bias CircuitsBias Circuits
• Self Bias Circuits
• PTAT Bias Circuits
• Band gap Reference
Power Supply Dependency of Current SourcePower Supply Dependency of Current Source
Consideration Factors
- VDD
- Channel Length Modulation
- Transistor Mismatch
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How do we generate Iref independent
of the supply voltage?
Self Biasing CircuitSelf Biasing Circuit
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What’s the advantage of these circuits?
What’s the problem of these circuits?
What’s role of Rs?
Improved Self Biasing CircuitImproved Self Biasing Circuit
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Improved Circuit eliminating
Body Effect
Improved Circuit with Start-up Circuit
* This Circuit is practical only if
A Simple Temperature Compensation ConceptA Simple Temperature Compensation Concept
M1(Ids)
0℃℃℃℃
90℃℃℃℃
ZTC
(Zero Temperature Coefficient)
Negative TC Positive TC
VDD VDD
vvr0
M1
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M1(Vgs)
Self Bias Circuit
R1
1. R1 is a conductor which has positive TC
2. M1 has negative TC below ZTC point
(Semiconductor)
3. If we control Vr0 below ZTC point, Vr0 become less
sensitive to temperature due to opposite TC of M1
and R1
Case Study (I) Case Study (I) –– Self Bias Circuit in DRAMSelf Bias Circuit in DRAM
ⓐ ⓑ
starter
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For Temp.
Compensation pmos diode
ⓑ
ⓐ
vref
Vext
What’s the drawback of these circuits?
Case Study (II) Case Study (II) –– Self Bias Circuit in DRAMSelf Bias Circuit in DRAM
Voltage Buffer
starter For Temp.
Compensation
ⓐvr1
Why does this circuit need the voltage buffer?
Why are PMOS current mirrors stacked in the reference bias circuit?
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ⓐ
VBE Referenced CMOS SelfVBE Referenced CMOS Self--bias Circuitbias Circuit
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How do we fabricate BJT in CMOS
Process Technology?* Temperature Sensitivity ~ - 4000 ppm/C
Realization of pnp BJT in CMOS TechnologyRealization of pnp BJT in CMOS Technology
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Vth Referenced CMOS SelfVth Referenced CMOS Self--Bias CircuitBias Circuit
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Thermal Voltage Referenced CMOS SelfThermal Voltage Referenced CMOS Self--Bias CircuitBias Circuit
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Thermal Voltage Referenced CMOS SelfThermal Voltage Referenced CMOS Self--Bias CircuitBias Circuit
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* Temp.
Sensitivity ~
+3300 ppm/C
CMOS Band gap ReferenceCMOS Band gap Reference
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What’s the problem?
(cont’d) CMOS Band gap Reference(cont’d) CMOS Band gap Reference
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Actual Implementation of CMOS Band Gap Reference
Actual Implementation of CMOS Band gap ReferenceActual Implementation of CMOS Band gap Reference
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Design Lab. Design Lab. –– Self Bias Circuit with Temp. CompensationSelf Bias Circuit with Temp. Compensation
� Schematics
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(a) Basic Schematic (b) actual implementation
* AMIS 0.5um Tech
Design Lab. Design Lab. –– Self Bias Circuit with Temp. CompensationSelf Bias Circuit with Temp. Compensation
� Simulation Results
VDDVr0b
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Vr0 (a)
Vr0 (b)
Design Lab. Design Lab. –– Self Bias Circuit with Temp. CompensationSelf Bias Circuit with Temp. Compensation
� Simulation Results – Temp. Compensation
(a)
(b)
(a)
90C
25C
-10C -10C
25C
90C
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Vr0 Current
(b) (b)
Design Lab. Design Lab. –– Self Bias Circuit with Temp. CompensationSelf Bias Circuit with Temp. Compensation
� Zero Temperature Coefficient Point
90C
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0.82V
90C
25C
-10C
ReferencesReferences
� Joongho Choi, “CMOS analog IC Design,” IDEC Lecture
Note, Mar. 1999.
� B. Razavi, “Design of Analog CMOS Integrated Circuits,”
McGraw-Hill, 2001.
� Hongjun Park, “CMOS Analog Integrated Circuits
Design,” Sigma Press, 1999.
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