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Curs I to ICT Complet

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    Introduction to Information and

    Communication Technology (ICT)

    Prof. dr.ing. Marius Guran

    FILS 2010/2011

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    1.Introduction

    Basic notions : -Computer system definition ( Structure, Function ) -Computer organization ( top-down approach: major components, CPU, Control Unit,..) Computer architecture

    Computer functions : data processing, data storage, data movement,control Functional view of the computer Computer generations based on : *hardware & technology *software

    Instruction cycle considering IAS structure ( ALU, Control Unit, MM,I/O ) Instruction set for IAS ( symbolic representation ) Program execution (the role of Compiler, Assembler,Link-editor,

    Loader)

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    2.The Central Processing Unit ( CPU )

    Instruction content required by the CPU for execution:

    -Operation code

    -Source operand reference

    -Result operand reference

    -Next instruction reference

    Data on which operate computer instructins : addresses, numbers,characters, logical data

    Common addressing technics :..

    CPU structure and organization, defined by the activity it must do

    ( fetch instr., interpret instr., fetch data, process data, write data )

    The instruction cycle with interrupts The Control Unit ( CU )..: decomposition of the programm

    The structure of microprogrammed CU.

    The performance enhencement : innovations ( cache memory,pipelining, multiple processing and parallel org., RISC arch. )

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    3.Computer Memory System ( CMS )

    The definition of CMS : Key characteristics of CMS : Location, Capacity, Performance (

    access time, transfer rate, cycle time ), Unit of transfer, Accessmethod, Phisical type..., Cost.

    The memory hierarchy : how much?, how expensive?, how fast?, inconnection with key characteristics ( Registers, Cache Memory, Main

    Memory, Magnetic Disks and Tapes, Optical Memory, ..) Semiconductor MM ( types, category, write mechanism, volatility ) The MM organization : 2D, 2 1/2D (one-bit-per-chip organization ) Error detection and correction in CMS Cache memory organization Auxiliary storage : magnetic disks and tapes, solid-state devices,

    mass-storage devices, optical storage technology Back-up storage

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    4.Input / Output Unit ( I/O )

    I/O module definition., and functions : control and timing, CPUcommunication, external devices communication, data buffering, errordetection and correction

    Exemples of I/O devices and key characteristics.

    I/O module general stucture

    The main techniques for I/O operations -with programmed I/O

    -with interrupt-driven I/O

    -direct memory access ( DMA )

    I/O channels and processors :

    -selector channel

    -multiplexor channel

    -communication channel

    The external interface, and standards

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    5.Computer Interconnection Structure (CIS)

    The definition for CIS ; computer like a network..

    The types of interconnections and exchanges that are needed :

    -for MM :R, W, Address, Data

    -for CPU : Instructions, Data, Control signals, Interrupts

    -for I/O module : R, W, Internal data, External data, Interr. The types of transfers : MM to CPU, CPU to MM, I/O to CPU, CPU to

    I/O, I/O to or from MM

    The Central Switch structure and Bus Structure

    Typical structure and architecture for BUS :

    -address lines

    -data lines

    -control lines

    The elements of bus design : type, method of arbitration, timing,

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    6.File organization and data bases

    Basic definitions : - file, -record, -field Types of file organization : 1.Sequential..; sequential retrieval and access 2.Indexed.; index; sequential or random access 3.Direct or relative file organization.; sequential or random

    access Maintaining data in files : adding, changing, deleting. Data base( DB ) and data base management system( DBMS ) : -fileoriented systems.( independent files..) -DB oriented systems.( multiple related files) and DBMS Types of DB organization :

    -Relational DB -Hierarchical DB -Networked DB The features of DBMS DB administration.

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    7.System software (SS) and applicationsoftware (AS)

    The definitions for application and system software

    The connection between USER, AS, SS, and Computer Hard..

    System software.

    Operating systems(OS); types of OS :

    -single programming OS

    -multiprogramming OS

    -multiprocessing OS.

    -virtual machine OS.

    The functions of OS :allocating system resources, monitoringsystem activities, executing different utilities...

    Application software : on the market(general) AS, on request AS

    The Information Systems and the development life cycle(SDLC)

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    8.Data communications

    Basic components of the communication channels

    Transmission media for communication channels : twisted pair wire,coaxial cable, fiber optics, microwaves, satellites and earth stations.

    Characteristics of the communication channels

    Types of signals used in data transmission

    Transmission modes and directions of transmission

    Glogal systems for mobile communicatios( GSM )

    Communication equipments and communication software

    The concept OSI for interconnection of open systems..

    Computer networks :

    -Wide area networks( WAN )

    -Local area networks( LAN )

    Internet and network services.Intranets/Extranets

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    9. References

    1.Patterson D.A., Hennessy J.L.:Organizarea si proiectarea calculatoarelor. Ed.ALL,Bucuresti, 2002. 2002.Versiunea in l.engleza: Computer Architecture-AQuantative Approach- Ed. Morgan Kaufmann Publ., San Mateo, CA, 1999.

    2.Stallings William : Computer organization and Architecture Principles of Structure andFunctions. Ed.MacMillan Publ.Comp., N.Y.,2000.

    3 Shelly G.B., Cashman Th. J., Waggoner G.A., : Computer Concepts.

    Ed. Boyd & Fraser Publ. Comp., N.Y., 1998.

    4.Orilia L.S. : Computers and Information.McGraww-Hill Book Comp., N.Y.,1996.

    5.Oancea Bogdan : Bazele informaticii. Ed. Economica, Bucuresti, 2004.

    6.* * * CCNA Basics (CISCO Certified Network Associate Basics).Ed. ALL, Bucuresti,2005. (www.all.ro).

    7.* * * : Setul de carti ECDL (European Computer Driving Licence). Ed. ALL, 2004.

    8.Guran Marius : Sisteme informatice Infrastructura informationala si de comunicatii inmanagementul intreprinderilor moderne(Cap.8 si Cap.9).Ed. AGIR, 2008.

    9.Tanenbaum A. : Organizarea structurata a calculatoarelor. Ed.Computer Press Agora,

    Bucuresti, 2005.10.Guran Marius :Sructuri de calcul pentru aplicatii industriale.Ed.Printeh, 2001

    11.Guran Marius:Sisteme de productie integrate asistate de calculator.Ed. Tehnica,1966

    12.* * * Microprocesoare INTEL(hardware si software):

    http://www.intel.com/Assets/PDF/manual/248966.pdf

    13.* * * PC Architecture: www.karbosguide.com

    http://www.all.ro/http://www.intel.com/Assets/PDF/manual/248966.pdfhttp://www.karbosguide.com/http://www.karbosguide.com/http://www.intel.com/Assets/PDF/manual/248966.pdfhttp://www.all.ro/
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    PENTIUM Architecture with two executionunits( FP, FLP )

    Superscalar structure with 2 execution units Pipelined execution for FLP, detected in the prefetch

    fase Branch prediction for pipelining computing

    RISC ( Reduced Instruction Set Computing ) First level Cache Memory ( for instructions and data ),

    using write-back only with Data cache and write-throughwith Code/instruction Cache

    256 bits connection between Code Cache and prefetch

    buffers.. 32 bits processors with 64 bits interface, for

    compatibility 64 bits connection between Data Cache and FLP unit

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    64-bit Interface Bus

    InstructionCodeCache

    Memory

    DataCache

    Memory

    Integer

    ALU

    PipelinedFloating

    PointUnit

    MULDIVADD

    Integer

    ALU

    Prefetch Buffers

    Register Set

    Branch prediction

    32bits

    32bits

    32bits

    256bits

    32bits

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    Alpha ARCHITECTURE

    CPU Module : DECchip 21064 microprocessor ( superscalar dualinstruction issue, superpipelined, data and instruction cache, clockgenerator, integer and FLP registers, transl. buffers ), CPU controllogic, second-level cache, and serial line interface for diagnostics(7)

    System Module : 10-layer board for CPU Module, up to eight SIMM

    two TURBOchannel option cards, and Integral I/O subsystem

    Memory : up to 8 SIMMs

    I/O System : TURBOchannel bus with DMA and parity checking,andIntegral I/Osubsystem that contains I/O controllers andassocited

    connectors (1-SCSI, 2-Ethernet LAN, 3-ISDN, 4-Audio, 5-SerialCommunications 0-3

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    CPUModule

    SystemModule

    SIMM 3

    SIMM 2

    SIMM 1

    SIMM 0

    Integral I/O

    1

    2

    3

    4

    5

    TURBOchannel 6

    7

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    Corporate Business Server Architecture( HP 9ooo Model T500 )

    Up to12/24 processor modules, each module consists of a CPUchip, I-cache and D-cache ( bandwidth up to 520 Mbytes/sec. )

    Up to 8 Memory Modules ( >256MB each)

    Up to 4 Dual Bus Converters for linking HP Precision Buses, each

    with up to 14 slots for different devices or LAN connections ( >128devices..)

    Processor-Memory Bus, with multiprocessor bus protocol

    Service Processor Bus

    Scan Bus, for scan-test each of the VLSI chips and tranceiver group

    selectively, used as a fault analysis tool Service Processor, for improvement in system hardware availability

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    A model of a stored program computer

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