1
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Figure 1. Functional Block Diagram
Device Features
Figure 2. Package Type
24-lead 4x4 mm QFN
• Small 24-Pin 4 x 4 mm QFN Package
• Integrate DSA to Amp Functionality
• Wide Power supply range of +2.7 to +5.5V(DSA)
• Single Fixed +5V supply(Amp)
• 5-4000MHz Broadband Performance
• 19.1dB Gain at 1.9GHz
• 5.7dB Noise Figure at max gain setting at 1.9GHz
• 18.6dBm P1dB at 1.9GHz
• 32.2dBm OIP3 at 1.9GHz
• No matching circuit needed
• Attenuation: 0.5 dB steps to 31.5 dB
• Safe attenuation state transitions
• Monotonicity: 0.5 dB up to 4 GHz
• High attenuation accuracy(DSA to Amp)
±(0.15 + 5% x Atten) @ 1.9GHz
• 1.8V control logic compatible
• Programming modes - Direct Parallel - Latched Parallel - Serial
• Unique power-up state selection
Application
• 3G/4G Wireless infrastructure and other high performance RF application
• Microwave and Satellite Radio
• General purpose Wireless
Product Description
The BVA518B is a digitally controlled variable gain amplifier (DVGA) is featuring high linearity using the voltage 5V supply with a broadband frequency range of 5 to 4000 MHz. The BVA518B integrates a high performance digital step attenuator and high performance InGaP/GaAs HBT MMIC amplifier. Amplifier is internally matched to 50 Ohms and uses a patented temperature compensation circuit to provide stable current over the operating temperature range without the need for external components and a patented over voltage protection circuit to protect a internal device. The BVA518B is designed for high linearity gain block applications that require excellent gain flatness and designed for use in 3G/4G wireless infrastructure and other high performance RF applications Both stages are internally matched to 50 Ohms and It is easy to use with no external matching components required A serial output port enables cascading with other serial controlled devices. An integrated digital control interface supports both serial and paral-lel programming of the attenuation, including the capability to pro-gram an initial attenuation state at power-up. Covering a 31.5 dB attenuation range in 0.5 dB steps. The BVA518B is targeted for use in wireless infrastructure, point-to-point, or can be used for any general purpose wireless application.
1GND
D1
6-Bit
Digital Step
Attenuator
2
3
4
5
6
7 8 1110 12
13
14
15
16
17
18
192021222324
9
D0
D5
GND
LE
GN
D
GN
D
AM
PIN
RF
1
SE
RIN
CL
OC
K
PUP1
PUP2
VDD
GND
GND
VS
S/G
ND
RF
2
P/S
D4
D3
D2
AMPOUT
Gain Block
AMPLIFIER
2
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
1 Device performance _ measured on a BeRex Evaluation board at 25°C, 50 Ω system, VDD=+5V, measure on Evaluation Board (DSA to AMP)
2OIP3 _ measured with two tones at an output of 7dBm per tone separated by 1 MHz.
Table 1. Electrical Specifications1
Parameter Condition Min Typ Max Unit
Operational Frequency Range 5 4000 MHz
Gain Attenuation = 0dB, at 1900MHz 19.1 dB
Attenuation Control range 0.5dB Step 31.5 dB
Attenuation Step 0.5 dB
Attenuation Accuracy
40MHz — 1GHz
Any bit or bit combination
±(0.15 + 3% of atten setting)
dB
>1GHz — 2.2GHz ±(0.15 + 5% of atten setting)
>2.2GHz — 3GHz ±(0.15 + 8% of atten setting)
>3GHz — 4GHz ±(0.15 + 15% of atten setting)
Return loss 1GHz — 2.2GHz Attenuation = 0dB
15.9 17.2
dB (input or output port) >2.2GHz — 4GHz 9.7 12.2
Output Power for 1dB Compression Attenuation = 0dB , at 1900MHz 18.6 dBm
Output Third Order Intercept Point2
Attenuation = 0dB, at 1900MHz
32.2 dBm two tones at an output of 7 dBm per tone separated by 1 MHz.
Noise Figure Attenuation = 0dB, at 1900MHz 5.7 dB
Switching time 50% CTRL to 90% or 10% RF 500 800 ns
Supply voltage DSA 2.7 5.5 V
AMP 5 V
Supply Current 63 73 83 mA
Control Interface Serial / parallel mode 6 Bit
Control Voltage Digital input high 1.17 3.6 V
Digital input low -0.3 0.6 V
Impedance 50 Ω
3
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Table 2. Typical RF Performance1
Table 3. Absolute Maximum Ratings
Operation of this device above any of these parameters may result in permanent damage.
Parameter Condition Min Typ Max Unit
Supply Voltage(VDD) 6 V
Supply Current Amp 160 mA
Digital input voltage -0.3 3.6 V
Maximum input power Amp/DSA +23/+30 dBm
Operating Temperature -40 105
Storage Temperature -55 150
Junction Temperature 150
1 Device performance _ measured on a BeRex evaluation board at 25°C, VDD=+5V,50 Ω system. measure on Evaluation Board. (DSA to AMP)
2 70MHz measured with application circuit. refer to table 16. 3 OIP3 _ measured with two tones at an output of 7 dBm per tone separated by 1 MHz.
Parameter Frequency Unit
702 900 1900 2140 2700 MHz
Gain 23.0 21.0 19.1 18.6 17.0 dB
S11 -12.3 -19.1 -16.5 -16.6 -13.5 dB
S22 -8.3 -16.1 -18.1 -17.0 -18.7 dB
OIP33 34.2 35.5 32.2 31.5 29.5 dBm
P1dB 17.3 19.8 18.6 18.2 17.1 dBm
Noise Figure 6.0 5.0 5.3 5.7 5.8 dB
4
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Table 4. Pin Description
Figure 3. Pin Configuration(Top View)
Note: 1. RF pins 10 and 21 must be at 0V DC. The RF pins do not require DC blocking capacitors for proper Operation if the 0V DC requirement is met
2. Connect VssEXT (pin 19, VssEXT = GND) to enable internal negative voltage generator
Pin Pin name Description
1,5,7,9,17,18 GND Ground, These pins must be connected to ground
2 D1 Parallel Control Voltage Inputs, Attenuation control bit 1dB
3 D0 Parallel Control Voltage Inputs, Attenuation control bit 0.5dB
4 D5 Parallel Control Voltage Inputs, Attenuation control bit 16dB
6 AMPOUT RF Gain block Amplifier output Port
8 AMPIN RF Gain block Amplifier input Port
10 RF11 RF1 port (Digital Step Attenuator RF Input)
This pin can also be used as an output because the design is bidirectional. RF1 is dc-coupled and matched to 50 Ω
11 SERIN Serial interface data input
12 Clock Serial interface clock input
13 LE Latch Enable input
14 PUP1 Power-Up State Selection Bits. These pins set the attenuation value at power-up (see Table 11). There is no internal pull-up or pull- down
15 PUP2 resistor on these pins; therefore, they must always be kept at a valid logic level (VCTLH or VCTLL) and not be left floating
16 VDD DSA Power Supply (nominal 3.3V)
19 VSS/GND2 External VSS negative voltage control or ground
Do not want to use negative voltage supply, These pins must be connected to ground (GND, Default setting is GND)
20 P/S Parallel/Serial Mode Select. For parallel mode operation, set this pin to low. For serial mode operation, set this pin to High.
21 RF21 RF2 port (Attenuator RF Output.)
This pin can also be used as an input because the design is bidirectional. RF2 is dc-coupled and matched to 50 Ω.
22 D4 Parallel Control Voltage Inputs, Attenuation control bit 8dB
23 D3 Parallel Control Voltage Inputs, Attenuation control bit 4dB
24 D2 Parallel Control Voltage Inputs, Attenuation control bit 2dB
EXPOSE PAD GND Exposed pad: The exposed pad must be connected to ground for proper operation
1GND
Exposed Pad
2
3
4
5
D1
D0
D5
GND
6AMPOUT
7GN
D
8 9 10
11
AM
PIN
GN
D
RF1
SERIN
12
Clo
ck
18 GND
17
16
15
14
GND
VDD
PUP2
PUP1
13 LE
24
D2
23
22
21
20
D3
D4
RF2 P/S
19
VSS/G
ND
5
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Programming Options
BVA518B can be programmed using either the parallel or serial inter-face, which is selectable via P/S pin(Pin20). Serial mode is selected by floating P/S or pulling it to a voltage logic high and parallel mode is selected by setting P/S to logic low Serial Control Mode
The serial interface is a 6 bit shift register to shift in the data MSB (D5) first. When serial programming is used, all the parallel control input pins (2,3,4,22,23,24) must be grounded (Max Gain state). It is controlled by three CMOS-compatible signals: SERIN, Clock, and Latch Enable (LE).
Figure 4. Serial Mode Resister Timing Diagram
Table 5. 6-Bit Serial Word Sequence
D5 Attenuation 16dB Control Bit
D4 Attenuation 8dB Control Bit
D3 Attenuation 4dB Control Bit
D2 Attenuation 2dB Control Bit
D1 Attenuation 1dB Control Bit
D0 Attenuation 0.5dB Control Bit
The BVA518B has a 3-wire serial peripheral interface (SPI): serial data input (Data), clock (CLK), and latch enable (LE). The serial control inter-face is activated when P/S is set to HIGH. In serial mode, the 6-bit Data is clocked MSB first on the rising CLK edges into the shift register and then LE must be toggled High to latch the new attenuation state into the device. LE must be set to low to clock new 6-bit data into the shift register because CLK is masked to prevent the attenuator value from changing if LE is kept High (see Figure 4 and Table 8).
Table 7. Serial Interface Timing Specifications
Table 8. Truth Table for Serial Control Word Table 6. Mode Selection
P/S Control Mode
LOW Parallel
HIGH Serial
Symbol Parameter Min Typ Max Unit
fClk Serial data clock frequency 10 MHz
tSCK Minimum serial period 70
tSS Serial Data setup time 10
tSH Serial Data hold time 10
tLN LE setup time 10
tLEW Minimum LE pulse width 30
tLES Minimum LE pulse spacing 600
Digital Control Input
Attenuation D5 D4 D3 D2 D1 D0
(MSB) (LSB) (dB)
LOW LOW LOW LOW LOW LOW 0 (Reference)
LOW LOW LOW LOW LOW HIGH 0.5
LOW LOW LOW LOW HIGH LOW 1
LOW LOW LOW HIGH LOW LOW 2
LOW LOW HIGH LOW LOW LOW 4
LOW HIGH LOW LOW LOW LOW 8
HIGH LOW LOW LOW LOW LOW 16
HIGH HIGH HIGH HIGH HIGH HIGH 31.5
D5X X D[5:0]NEXT WORD XD4 D3 D2 D1 D0
X
tSH
tSStSCK
tLNtLEW
tLES
MSB[FIRST IN]
LSB[LAST IN]
P/S
SERIAL IN
CLK
LE
6
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Figure 5. Latched Parallel Mode Timing Diagram
Parallel Control Mode
The BVA518B has six digital control inputs, D0 (LSB) to D5 (MSB), to select the desired attenuation state in parallel mode, as shown in Table 9. The parallel control interface is activated when P/S is set to low. There are two modes of parallel operation: direct parallel and latched parallel Direct Parallel Mode The LE pin must be kept LOW. The attenuation state is changed by the control voltage inputs (D0 to D5) directly. This mode is ideal for man-ual control of the attenuator. In this mode the device will immediate-ly react to any voltage changes to the parallel control pins [pins 2, 3, 4, 22,23, 24]. Use direct parallel mode for the fastest settling time. Latched Parallel Mode The LE pin must be kept low when changing the control voltage inputs (D0 to D5) to set the attenuation state. When the desired state is set, LE must be toggled LOW to transfer the 6-bit data to the bypass switches of the attenuator array, and then toggled low to latch the change into the device until the next desired attenuation change (see Figure 5 and Table 9).
Table 10. Parallel Interface Timing Specifications
Symbol Parameter Min Typ Max Unit
tLEW Minimum LE pulse width 10 ns
tPH Data hold time from LE 10 ns
tPS Data setup time to LE 10 ns
X
tPHtPS
P/S
Parallel IN
LE
XD[5:0]
PARALLELCONTROL
tLEW
X
D0 D1 D2 D3 D4 D5 Attenuation State LE P/S
LOW LOW LOW LOW LOW LOW Reference Loss HIGH LOW
HIGH LOW LOW LOW LOW LOW 0.5dB HIGH LOW
LOW HIGH LOW LOW LOW LOW 1dB HIGH LOW
LOW LOW HIGH LOW LOW LOW 2dB HIGH LOW
LOW LOW LOW HIGH LOW LOW 4dB HIGH LOW
LOW LOW LOW LOW HIGH LOW 8dB HIGH LOW
LOW LOW LOW LOW LOW HIGH 16dB HIGH LOW
HIGH HIGH HIGH HIGH HIGH HIGH 31.5dB HIGH LOW
Table 9. Truth Table for the Parallel Control Word
Table 11. PUP Truth Table for Parallel Control Mode
Power-UP Interface The BVA518B uses the PUP1 and PUP2 control voltage inputs to set the attenuation value to a known value at power-up before the initial control data word is provided in parallel mode. Power-up Control for Parallel Mode (P/S=LOW) When the attenuator powers up with LE set to low, the state of PUP1 and PUP2 determines the power-up state of the device per the truth table shown in Table 11. Power-up Control for Serial Mode (P/S=HIGH) When the attenuator powers up in Serial mode, the six digital control inputs are set to whatever data is present on the six parallel data inputs (D0 to D5, Refer to Table 12). This allows any one of the 64 attenuation settings to be specified as the power-up state.
Attenuation state P/S LE PUP1 PUP2
31.5 dB LOW LOW HIGH HIGH
16 dB LOW LOW HIGH LOW
8 dB LOW LOW LOW HIGH
Reference Loss LOW LOW LOW LOW
Defined by C0.5-C16 LOW HIGH Don’t Care Don’t Care
Attenuation State P/S D0 D1 D2 D3 D4 D5
Reference Loss HIGH LOW LOW LOW LOW LOW LOW
0.5dB HIGH HIGH LOW LOW LOW LOW LOW
1dB HIGH LOW HIGH LOW LOW LOW LOW
2dB HIGH LOW LOW HIGH LOW LOW LOW
4dB HIGH LOW LOW LOW HIGH LOW LOW
8dB HIGH LOW LOW LOW LOW HIGH LOW
16dB HIGH LOW LOW LOW LOW LOW HIGH
20dB HIGH LOW LOW LOW HIGH LOW HIGH
24dB HIGH LOW LOW LOW LOW HIGH HIGH
31.5dB HIGH HIGH HIGH HIGH HIGH HIGH HIGH
Table 12. PUP Truth Table for Serial Control Mode
7
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Table 13. Typical RF Performance(500~4000MHz)
Application Circuit
Values
Freq. RF Circuit
500MHz ~ 4000MHz
C6/C4 100pF
L1(1005 Chip Ind) 33nH
Table 14. 500~4000MHz RF Application Circuit
parameter Frequency Unit
500 900 1900 2140 2700 MHz
Gain 21.4 21.0 19.1 18.6 17.0 dB
S11 -13.7 -19.1 -16.5 -16.6 -13.5 dB
S22 -13.7 -16.1 -18.1 -17.0 -18.7 dB
OIP31 35.4 35.5 32.2 31.5 29.5 dBm
P1dB 19.8 19.8 18.6 18.2 17.1 dBm
N.F 5.0 5.0 5.3 5.7 5.8 dB
Figure 6. Gain vs. Frequency over Temperature (Max Gain State)
Figure 8. Input Return Loss vs. Frequency over Major Attenuation States
Figure 7. Gain vs. Frequency over Major Attenuation States
Figure 9. Input Return Loss vs. Frequency over Temperature (Min1,Max Gain State)
1 OIP3 _ measured with two tones at an output of 7 dBm per tone separated by 1 MHz.
* 1Min Gain was measured in the state is set with attenuation 31.5dB.
U1_AmpC6
L1
C4
C2C3 C1
U1_DSA
Typical Performance Data @ 25°and VDD = 5V unless otherwise noted and Application Circuit refer to Table 14
Typical RF Performance Plot - BVA518B EVK - PCB (Application Circuit:500~4000MHz)
0
5
10
15
20
25
500 1,000 1,500 2,000 2,500 3,000 3,500 4,000
Gai
n [
dB]
Frequency [MHz]
+25˚C
-40˚C
+105˚C
-40
-30
-20
-10
0
10
20
30
500 1,000 1,500 2,000 2,500 3,000 3,500 4,000
Gai
n [
dB]
Frequency [MHz]
0.5dB 1dB
2dB 4dB
8dB 16dB
31.5dB
-60
-50
-40
-30
-20
-10
0
500 1,000 1,500 2,000 2,500 3,000 3,500 4,000
Inp
ut
Re
turn
Lo
ss [
dB
]
Frequency [MHz]
0dB 0.5dB
1dB 2dB
4dB 8dB
16dB 31.5dB-60
-50
-40
-30
-20
-10
0
500 1,000 1,500 2,000 2,500 3,000 3,500 4,000
Inpu
t R
etur
n Lo
ss [
dB]
Frequency [MHz]
+25˚C @Max Gain
+25˚C @Min Gain
-40˚C @Max Gain
-40˚C @Min Gain
+105˚C @Max Gain
+105˚C @Min Gain
8
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Figure 10. Output Return Loss vs. Frequency over Major Attenuation States
Figure 11. Output Return Loss vs. Frequency over Temperature (Min1, Max Gain State)
Figure 12. Attenuation Error vs Frequency over Major Attenuation Steps
Figure 14. 0.5dB Step Attenuation vs Attenuation Setting over Major Frequency (Max Gain State)
Figure 13. Attenuation Error vs Attenuation Setting over Major Frequency (Max Gain State)
Figure 15. Attenuation Error at 900MHz vs Temperature Over All Attenuation States
* 1Min Gain was measured in the state is set with attenuation 31.5dB.
Typical Performance Data @ 25°and VDD = 5V unless otherwise noted and Application Circuit refer to Table 14
Typical RF Performance Plot - BVA518B EVK - PCB (Application Circuit:500~4000MHz)
-50
-40
-30
-20
-10
0
500 1,000 1,500 2,000 2,500 3,000 3,500 4,000
Ou
tpu
t R
etu
rn L
oss
[d
B]
Frequency [MHz]
0dB 0.5dB1dB 2dB4dB 8dB16dB 31.5dB
-50
-40
-30
-20
-10
0
500 1,000 1,500 2,000 2,500 3,000 3,500 4,000
Ou
tpu
t R
etu
rn L
oss
[d
B]
Frequency [MHz]
+25˚C @Max Gain
+25˚C @Min Gain
-40˚C @Max Gain
-40˚C @Min Gain
+105˚C @Max Gain
+105˚C @Min Gain
-6
-5.5
-5
-4.5
-4
-3.5
-3
-2.5
-2
-1.5
-1
-0.5
0
0.5
1
500 1,000 1,500 2,000 2,500 3,000 3,500 4,000
Att
enu
atio
n E
rro
r [d
B]
Frequency [MHz]
0.5dB 1dB
2dB 4dB
8dB 16dB
31.5dB
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
0 5 10 15 20 25 30
Att
en
ua
tio
n E
rro
r [d
B]
Attenuation Setting [dB]
500MHz
900MHz
1.9GHz
2.14GHz
2.65GHz
-0.5
-0.3
-0.1
0.1
0.3
0.5
0 5 10 15 20 25 30
Att
en
ua
tio
n E
rro
r [d
B]
Attenuation Setting [dB]
500MHz
900MHz
1.9GHz
2.14GHz
2.65GHz-3
-2
-1
0
1
2
3
0 5 10 15 20 25 30
Att
en
ua
tio
n E
rro
r [d
B]
Attenuation Setting [dB]
+25˚C
-40˚C
+105˚C
UPPER LIMIT
LOWER LIMIT
9
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Figure 16. Attenuation Error at 1.9GHz vs Temperature Over All Attenuation States
Figure 17. Attenuation Error at 2.14GHz vs Temperature Over All Attenuation States
Typical Performance Data @ 25°and VDD = 5V unless otherwise noted and Application Circuit refer to Table 14
Typical RF Performance Plot - BVA518B EVK - PCB (Application Circuit:500~4000MHz)
Figure 18. Attenuation Error at 2.7GHz vs Temperature Over All Attenuation States
Figure 20. P1dB vs. Frequency Over Temperature (Max Gain State)
Figure 19. Noise Figure vs. Frequency Over Temperature (Max Gain State)
Figure 21. Device Performance Pin-Pout-Gain @900MHz
0
2
4
6
8
10
12
14
16
18
20
22
24
500 1,000 1,500 2,000 2,500 3,000 3,500 4,000
P1dB
[dB
m]
Frequency [MHz]
+25˚C
-40˚C
+105˚C
0
1
2
3
4
5
6
7
8
9
10
500 1,000 1,500 2,000 2,500 3,000 3,500 4,000
NF
[dB]
Frequency [MHz]
+25˚C
-40˚C
+105˚C
13
14
15
16
17
18
19
20
21
22
23
24
0
2
4
6
8
10
12
14
16
18
20
22
-14 -12 -10 -8 -6 -4 -2 0 2
Gai
n [
dB
]
Po
ut
[dB
m]
Pin [dBm]
Pout
Gain
-3
-2
-1
0
1
2
3
0 5 10 15 20 25 30
Att
en
ua
tio
n E
rro
r [d
B]
Attenuation Setting [dB]
+25˚C
-40˚C
+105˚C
UPPER LIMIT
LOWER LIMIT-3
-2
-1
0
1
2
3
0 5 10 15 20 25 30
Att
en
ua
tio
n E
rro
r [d
B]
Attenuation Setting [dB]
+25˚C
-40˚C
+105˚C
UPPER LIMIT
LOWER LIMIT
-3
-2
-1
0
1
2
3
0 5 10 15 20 25 30
Att
en
ua
tio
n E
rro
r [d
B]
Attenuation Setting [dB]
+25˚C
-40˚C
+105˚C
UPPER LIMIT
LOWER LIMIT
10
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Figure 22. Device Performance Pin-Pout-Gain @1900MHz Figure 23. Device Performance Pin-Pout-Gain @2140MHz
Figure 24. Device Performance Pin-Pout-Gain @2700MHz
Figure 26. OIP3 vs. Frequency Over Temperature (15.5dB Atteuation State)
Figure 25. OIP3 vs. Frequency Over Temperature (Max Gain State)
Figure 27. OIP3 vs Output Power @900MHz over Temperature (Max Gain State)
* 1Min Gain was measured in the state is set with attenuation 31.5dB.
Typical Performance Data @ 25°and VDD = 5V unless otherwise noted and Application Circuit refer to Table 14
Typical RF Performance Plot - BVA518B EVK - PCB (Application Circuit:500~4000MHz)
0
5
10
15
20
25
30
35
40
500 1,000 1,500 2,000 2,500 3,000 3,500 4,000
OIP
3 [
dB
m]
Frequency [MHz]
+25˚C
-40˚C
+105˚C
0
5
10
15
20
25
30
35
40
-3 -2 -1 0 1 2 3 4 5 6 7 8 9 10
OIP
3 [
dB
m]
Po / tone [dBm]
+25˚C
-40˚C
+105˚C
11
12
13
14
15
16
17
18
19
20
21
22
0
2
4
6
8
10
12
14
16
18
20
22
-1 4 -1 2 -1 0 -8 -6 -4 -2 0 2
Gai
n [d
B]
Po
ut
[dB
m]
Pin [dBm]
Pout
Gain
11
12
13
14
15
16
17
18
19
20
21
22
0
2
4
6
8
10
12
14
16
18
20
22
-1 4 -1 2 -1 0 -8 -6 -4 -2 0 2
Gai
n [d
B]
Po
ut
[dB
m]
Pin [dBm]
Pout
Gain
14
15
16
17
18
19
20
21
22
23
24
25
0
2
4
6
8
10
12
14
16
18
20
22
-1 6 -1 4 -1 2 -1 0 -8 -6 -4 -2 0
Gai
n [d
B]
Po
ut
[dB
m]
Pin [dBm]
Pout
Gain
0
5
10
15
20
25
30
35
40
500 1,000 1,500 2,000 2,500 3,000 3,500 4,000
OIP
3 [
dB
m]
Frequency [MHz]
+25˚C
-40˚C
+105˚C
11
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Figure 28. OIP3 vs Output Power @1900MHz over Temperature (Max Gain State)
Figure 29. OIP3 vs Output Power @2140MHz over Temperature (Max Gain State)
Figure 30. OIP3 vs Output Power @2700MHz over Temperature (Max Gain State)
Figure 32. 3GPP LTE 20MHz ACLR vs Output Power over Temperature @1900MHz
Figure 31. 3GPP LTE 20MHz ACLR vs Output Power over Temperature @900MHz
Figure 33. 3GPP LTE 20MHz ACLR vs Output Power over Temperature @2140MHz
* 1Min Gain was measured in the state is set with attenuation 31.5dB.
Typical Performance Data @ 25°and VDD = 5V unless otherwise noted and Application Circuit refer to Table 14
Typical RF Performance Plot - BVA518B EVK - PCB (Application Circuit:500~4000MHz)
0
5
10
15
20
25
30
35
40
-3 -2 -1 0 1 2 3 4 5 6 7 8 9 10
OIP
3 [
dB
m]
Po / tone [dBm]
+25˚C
-40˚C
+105˚C
0
5
10
15
20
25
30
35
40
-3 -2 -1 0 1 2 3 4 5 6 7 8 9 10
OIP
3 [
dB
m]
Po / tone [dBm]
+25˚C
-40˚C
+105˚C
0
5
10
15
20
25
30
35
40
-3 -2 -1 0 1 2 3 4 5 6 7 8 9 10
OIP
3 [
dB
m]
Po / tone [dBm]
+25˚C
-40˚C
+105˚C
-70
-60
-50
-40
-30
-20
-10
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
AC
LR [
dB
C]
Po [dBm]
+25˚C
-40˚C
+105˚C
-70
-60
-50
-40
-30
-20
-10
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
AC
LR [
dB
C]
Po [dBm]
+25˚C
-40˚C
+105˚C
-70
-60
-50
-40
-30
-20
-10
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
AC
LR [
dB
C]
Po [dBm]
+25˚C
-40˚C
+105˚C
12
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Figure 34. 3GPP LTE 20MHz ACLR vs Output Power over Temperature @2700MHz
Figure 35. ACLR @900MHz, LTE20MHz1 , -50dBc
Figure 36. ACLR @1900MHz, LTE20MHz1 , -50dBc
Figure 38. ACLR @2700MHz, LTE20MHz1 , -50dBc
1 LTE set-up: 3GPP LTE, FDD E-TM1.1, 20MHz BW, ±20MHz offset, PAR 9.81 at 0.01% Prob. @ACLR –50dBc .
Figure 37. ACLR @2140MHz, LTE20MHz1 , -50dBc
1
LTE set-up: 3GPP LTE, FDD E-TM1.1, 20MHz BW, ±20MHz offset, PAR 9.81 at 0.01% Prob. @ACLR –50dBc .
1 LTE set-up: 3GPP LTE, FDD E-TM1.1, 20MHz BW, ±20MHz offset, PAR 9.81 at 0.01% Prob. @ACLR –50dBc .
1 LTE set-up: 3GPP LTE, FDD E-TM1.1, 20MHz BW, ±20MHz offset, PAR 9.81 at 0.01% Prob. @ACLR –50dBc .
Typical Performance Data @ 25°and VDD = 5V unless otherwise noted and Application Circuit refer to Table 14
Typical RF Performance Plot - BVA518B EVK - PCB (Application Circuit:500~4000MHz)
-70
-60
-50
-40
-30
-20
-10
0
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
AC
LR [
dB
C]
Po [dBm]
+25˚C
-40˚C
+105˚C
13
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Table 15. Typical RF Performance(5~500MHz)
Application Circuit
Values
Freq. IF Circuit
5MHz ~ 500MHz
C6/C4 10nF
L1(1005 Chip Ind) 4.7uH
Table 16. 5~500MHz IF Application Circuit
parameter Frequency Unit
70 140 MHz
Gain 23.0 22.5 dB
S11 -12.3 -14.2 dB
S22 -8.3 -11.1 dB
OIP31 34.2 35.3 dBm
P1dB 17.3 19.5 dBm
N.F 6.0 4.8 dB
Figure 39. Gain vs. Frequency over Temperature
Figure 41. Input Return Loss vs. Frequency over Major Attenuation States
Figure 40. Gain vs. Frequency over Major Attenuation States
Figure 42. Input Return Loss vs. Frequency over Temperature (Min,Max Gain State)
1 OIP3 _ measured with two tones at an output of 7 dBm per tone separated by 1 MHz.
U1_AmpC6
L1
C4
C2C3 C1
U1_DSA
Typical Performance Data @ 25°and VDD = 5V unless otherwise noted and Application Circuit refer to Table 16
Typical RF Performance Plot - BVA518B EVK - PCB (Application Circuit: 5~500MHz)
0
5
10
15
20
25
30
0 100 200 300 400 500
Gai
n [d
B]
Frequency [MHz]
+25˚C
-40˚C
+105˚C
-30
-20
-10
0
10
20
30
0 100 200 300 400 500
Gai
n [
dB]
Frequency [MHz]
0dB 0.5dB
1dB 2dB
4dB 8dB
16dB 31.5dB
-60
-50
-40
-30
-20
-10
0
0 100 200 300 400 500
Inpu
t R
etur
n Lo
ss [
dB]
Frequency [MHz]
0dB 0.5dB1dB 2dB4dB 8dB16dB 31.5dB
-60
-50
-40
-30
-20
-10
0
0 100 200 300 400 500
Inp
ut
Re
turn
Lo
ss [
dB
]
Frequency [MHz]
+25˚C @Max Gain
-40˚C @Max Gain
+105˚C @Max Gain
+25˚C @Min Gain
-40˚C @Min Gain
+105˚C @Min Gain
14
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Figure 43. Output Return Loss vs. Frequency over Major Attenuation States
Figure 44. Output Return Loss vs. Frequency over Temperature (Min1, Max Gain State)
* 1Min Gain was measured in the state is set with attenuation 31.5dB.
Typical Performance Data @ 25°and VDD = 5V unless otherwise noted and Application Circuit refer to Table 16
Typical RF Performance Plot - BVA518B EVK - PCB (Application Circuit: 5~500MHz)
-60
-50
-40
-30
-20
-10
0
0 100 200 300 400 500
Out
put
Ret
urn
Loss
[dB
]
Frequency [MHz]
0dB 0.5dB
1dB 2dB
4dB 8dB
16dB 31.5dB-60
-50
-40
-30
-20
-10
0
0 100 200 300 400 500
Inpu
t R
etur
n Lo
ss [
dB]
Frequency [MHz]
+25˚C @Max Gain
-40˚C @Max Gain
+105˚C @Max Gain
+25˚C @Min Gain
-40˚C @Min Gain
+105˚C @Min Gain
Figure 45. Attenuation Error vs Frequency over Major Attenuation Steps
Figure 47. 0.5dB Step Attenuation vs Attenuation Setting over Major Frequency (Max Gain State)
Figure 46. Attenuation Error vs Attenuation Setting over Major Frequency (Max Gain State)
Figure 48. Attenuation Error at 70MHz vs Temperature Over All Attenuation States
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
0 5 10 15 20 25 30
Att
enu
atio
n E
rro
r [d
B]
Attenuation Setting [dB]
50MHz
70MHz
140MHz
210MHz
-0.5
-0.3
-0.1
0.1
0.3
0.5
0 5 10 15 20 25 30
Att
en
ua
tio
n E
rro
r [d
B]
Attenuation Setting [dB]
50MHz
70MHz
140MHz
210MHz
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
2.5
0 100 200 300 400 500
Att
enu
atio
n E
rro
r [d
B]
Frequency [MHz]
0.5dB 1dB
2dB 4dB
8dB 16dB
31.5dB
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
0 5 10 15 20 25 30
Att
en
ua
tio
n E
rro
r [d
B]
Attenuation Setting [dB]
+25˚C
-40˚C
+105˚C
UPPER LIMIT
LOWER LIMIT
15
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Figure 49. Attenuation Error at 140MHz vs Temperature Over All Attenuation States
Figure 50. Attenuation Error at 210MHz vs Temperature Over All Attenuation States
Typical Performance Data @ 25°and VDD = 5V unless otherwise noted and Application Circuit refer to Table 16
Typical RF Performance Plot - BVA518B EVK - PCB (Application Circuit:5~500MHz)
Figure 51. Noise Figure vs. Frequency Over Temperature (Max Gain State)
Figure 53. Device Performance Pin-Pout-Gain @70MHz
Figure 52. P1dB vs. Frequency Over Temperature (Max Gain State)
Figure 54. Device Performance Pin-Pout-Gain @140MHz
0
1
2
3
4
5
6
7
8
0 100 200 300 400 500
NF
[dB]
Frequency [MHz]
+25˚C
-40˚C
+105˚C
0
2
4
6
8
10
12
14
16
18
20
22
24
0 100 200 300 400 500
P1dB
[dB
m]
Frequency [MHz]
+25˚C
-40˚C
+105˚C
14
15
16
17
18
19
20
21
22
23
24
25
0
2
4
6
8
10
12
14
16
18
20
22
-16 -14 -12 -10 -8 -6 -4 -2 0
Gai
n [d
B]
Po
ut
[dB
m]
Pin [dBm]
Pout
Gain
14
15
16
17
18
19
20
21
22
23
24
25
0
2
4
6
8
10
12
14
16
18
20
22
-1 6 -1 4 -1 2 -1 0 -8 -6 -4 -2 0
Gai
n [
dB
]
Pout
[dB
m]
Pin [dBm]
Pout
Gain
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
0 5 10 15 20 25 30
Att
en
ua
tio
n E
rro
r [d
B]
Attenuation Setting [dB]
+25˚C
-40˚C
+105˚C
UPPER LIMIT
LOWER LIMIT-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
0 5 10 15 20 25 30
Att
en
ua
tio
n E
rro
r [d
B]
Attenuation Setting [dB]
+25˚C
-40˚C
+105˚C
UPPER LIMIT
LOWER LIMIT
16
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Figure 55. OIP3 vs. Frequency Over Temperature (Max Gain State)
Figure 56. OIP3 vs. Frequency Over Temperature (15.5dB Atteuation State)
Figure 57. OIP3 vs Output Power @70MHz over Temperature (Max Gain State)
Figure 59. 3GPP LTE 20MHz ACLR vs Output Power over Temperature @140MHz
Figure 58. OIP3 vs Output Power @140MHz over Temperature (Max Gain State)
Figure 60. ACLR @140MHz, LTE20MHz1 , -50dBc
* 1Min Gain was measured in the state is set with attenuation 31.5dB.
1
LTE set-up: 3GPP LTE, FDD E-TM1.1, 20MHz BW, ±20MHz offset, PAR 9.81 at 0.01% Prob. @ACLR –50dBc .
Typical Performance Data @ 25°and VDD = 5V unless otherwise noted and Application Circuit refer to Table 16
Typical RF Performance Plot - BVA518B EVK - PCB (Application Circuit:5~500MHz)
0
5
10
15
20
25
30
35
40
0 100 200 300 400 500
OIP
3 [d
Bm]
Frequency [MHz]
+25˚C
-40˚C
+105˚C
0
5
10
15
20
25
30
35
40
0 100 200 300 400 500
OIP
3 [d
Bm]
Frequency [MHz]
+25˚C
-40˚C
+105˚C
0
5
10
15
20
25
30
35
40
-3 -2 -1 0 1 2 3 4 5 6 7 8 9 10
OIP
3 [d
Bm]
Po / tone [dBm]
+25˚C
-40˚C
+105˚C
0
5
10
15
20
25
30
35
40
-3 -2 -1 0 1 2 3 4 5 6 7 8 9 10
OIP
3 [d
Bm]
Po / tone [dBm]
+25˚C
-40˚C
+105˚C
-70
-60
-50
-40
-30
-20
-10
0
0 1 2 3 4 5 6 7 8 9 10 11 12
AC
LR [
dB
C]
Po [dBm]
+25˚C
-40˚C
+105˚C
17
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Figure 61. Evaluation Board Schematic
Application Circuit Values Example
Freq. IF Circuit
5~500MHz RF Circuit
500MHz ~ 4GHz
C6/C4 10nF 100pF
L1(1005 Chip Ind) 4.7uH 33nH
Table 17. Application Circuit
Table 18. Bill of Material - Evaluation Board
No. Ref Des Part Qty
Part Number REMARK
1 C4,C6 2 CAP 0402 100pF J 50V IF circuit refer to table 16
2 C2 1 CAP 0402 1000pF J 50V
3 C1 1 TANTAL 3216 10UF 16V
4 C22 1 TANTAL 3216 0.1uF 35V
5 L1 1 IND 1608 33nH IF circuit refer to table 16
6 C3 1 CAP 0402 100pF J 50V
7 R1,R2 2 RES 1005 J 10K
8 R3,R4,R5,R7 3 RES 1608 J 0ohm
9 J1 1 Receptacle connector
10 U1 1 QFN4X4_24L_BVA518B
11 J2,J3 2 SMA_END_LAUNCH
Figure 62. Evaluation Board PCB
Notice: Evaluation Board for Marketing Release was set to 500MHz to 4GHz application circuit (Refer to Table 17)
18
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Figure 63. Application Circuit schematic* (Use only Serial mode)
* notice. The serial mode PUP state of this Figure. 63 is setting in Reference Loss (Refer to Table 12.) and each combinations of C0.5-C16 are shown in
the Table 12. Truth Table.
U1(DVGA)
RF1
19
20
21
22
23
1 2 3 4 5
1318 17 16 15 14
CLK
DATA
RF2
P/S
C3
J1
J2L1
LE
VDD_DSA
24
6
12
11
10
9
8
7
VDD_AMP
VSS/GNDG
ND
GN
D
VD
D_
DS
A
PU
P1
PU
P2 LE
CLK
SERIN
GND
GND
RF1
AMPINA
MP
OU
T
GN
D
D5
D0
D1
GN
D
D2
D3
D4
RF2
C2
C1
C6
C7C8
C5
C4
P/S(3V)
100pF
1nF
10uF Tantal
NC 100pF
33nH
100pF
100pF0.1uF
Figure 64. Suggested PCB Land Pattern and PAD Layout
19
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Figure 65. Package Outline Dimension
Figure 66. Evaluation Board PCB Layer Information
COPPER :1oz + 0.5oz (plating), Top Layer
COPPER :1oz (GND), Inner Layer
COPPER :1oz + 0.5oz (plating), Bottom Layer
P.P : (0.2+0.06+0.06) TOTAL = 0.32mm
CORE : 0.73mm FINISH TICKNESS :1.55T
P.P : (0.2+0.06+0.06) TOTAL = 0.32mm
COPPER :1oz, Inner Layer
EM825B ER: 4.6~4.8
MTC Er:4.6
EM825B Er:4.6~4.8
20
Rev. 0.1
BeRex website: www.berex.com email: [email protected]
Specifications and information are subject to change and products may be discontinued without notice. BeRex is a trademark of BeRex.
All other trademarks are the property of their respective owners. © 2019 BeRex
Pre
limin
ary
Dat
ash
eet
DIGITAL VARIABLE GAIN AMPLIFIER 5-4000 MHz
BVA518B
Figure 67. Tape & Reel
NATO CAGE code:
2 N 9 6 F
BVA518BYYWWXX
Figure 68. Package Marking
Marking information:
BVA518B Device Name
YY Year
WW Work Week
XX LOT Number
Lead plating finish
100% Tin Matte finish
MSL / ESD Rating
ESD Rating:
Value:
Test:
Standard:
MSL Rating:
Standard:
Class 1C
Passes ≤ 2000V
Human Body Model(HBM)
JEDEC Standard JESD22-A114B
Level 1 at +265°C convection reflow
JEDEC Standard J-STD-020 Proper ESD procedures should be followed when handling this device.
C a u t i o n : ESD SensitiveAppropriate precautions in handling, packaging
and testing devices must be observed.
Packaging information: Tape Width 12mm
Reel Size 7”
Device Cavity Pitch 8mm
Devices Per Reel 1K