D- AlgorithmThe D denotes discrepancy signal. The node which is used to generate or propagate the fault is DThere are three main steps in the D Algorithm1. To Generate the fault2. Propagate the fault to one of the outputs ( called as Forward Drive or D drive)3. Back propagate to get consistent assignment for inputs and that is called Backward drive or propagation)

We will see how it worksStep 1: We have to choose a node , not only node , we need to choose the fault

Let us assume that we choose the fault g node which has got stuck at 0.Assign the inputs to gate 2 to generate the fault i.e d=0 and e=0

We need to choose the inputs in such a manner so that it generates the output which is complementary of the fault itself which is called fault generationWe say that g is stuck at 0 so I need the output to be 1 in true condition so in NOR gate what are the conditionsWe will see here

Nor gate has an output of 1 only in one condition and that is both the inputs should be 0 so d=0 and e=0I will call the output g as D ,If the fault is present the output is 0 and if the fault is not present it will be 1 so such a node I will call it as D which is faulty.Second step: Now I have to choose a path to be propagated to the output. The path I can choose is from gate 2, 3, 4 To propagate the path I need to choose the non dominating values for the other inputs of a gateI need to assign the input f as 1 so that the output will be D at the output of gate 3. At the output if we get D or D doesnt matter, what we need is output to be sensitive to the fault.F=1, a=0 3rd step: Consistency assignment or check. What happens is wherever the gates for which I have assigned the output values but the input value is not assigned, in this case for b and c I have not assigned the value. This is something called backtracing, where we have assigned the value of f to be 1 but for b and c we have not assigned. The values which satisfied for f to be 1 is only when b and c are 1Now I know all the values, so the test vector could be (01100) Terminologies in D Algorithm1. Singular cover2. D intersection3. Primitive D cube for a fault ( pdcf)4. Propagation D cubes ( pdc)Singular cover: It is actually nothing but a truth table which is written in a slightly compact form. A B C0x0X001 1 1Once we know the truth table we can apply a D algorithm

SC of a NOR gate A B C1x0X10001D Intersection: When we are doing D algorithm we look at each of its circuit nodes to be capable of taking 0,1,x,d,d We consider that one of each nodes will take one of the above valuesX is dont care D is fault ( under the faulty condition it has one value and under non faulty condition it has a different value)1 under faulty and 0 under non faulty D is the compliment. The way the D intersection works is we can derive the value of a node by looking at , so one value might be coming , columns corresponds to one value and rows corresponds to the other value.0 0 is 0 1 0 D

Intersection0 n0=0nx=xn0=01n1=1nx=xn1=1Xnx=x1n0=D0n1=D

Primitive D cube of Fault (pdcf)For generating a s-a-0 fault at node c, choose a SC row which gives an output of 1 for the nor gate and intersect with (X,X,0), pdcf is (0,0,D)

Find out the true condition value for the nor gate and that would be XX0 and intersec that to a false condition value for the nor gate where it becomes 1 since it has stuck at 1 so 001 and when we do intersection for both we get it as 00DSimilarly for the output stuck at 1 we get the pdcf as

Propagation D cubes:PDC consists of a table for each circuit element which has entries for propagating faults on any one of its input to the output.To generate PDC entry corresponding to any one column, D intersect any two rows of SC which have opposite values (0 and 1) in that column.There can be multiple rows for one columnExpalination

Take a singular cover of an AND gate which is shown below, What I need is, if there is a fault appears at input a, then I should be able to propagate to the output. Take the D intersection of the 1st row and the last row and if there is a fault appears at input b then take 2nd row and last row.

So to illustrate what happens in D and D compliment , If we take a NAND gate , we have Again if I want to generate my PDC then for the fault a to be considered then D 1 D( we need to take 1s 1st row and last row)For b fault 1 D D PDC for AND and NOR gate is shown below

Similarly we can do it for 3 input gate as well.D Algorithm steps:Choose a stuck at fault any of the nodesChoose a pdcf for generating the faultChoose an output and a path to the output and propagate the fault to the output by choosing pdc for all circuit elements on the path ( D drive)Use the SC of all unassigned circuit elements to arrive at a consistent set of inputs ( back propagate or consistency check)

Choose a fault say g s-a-0. Choose pdcf of gate 2 for generating this fault There are 9 nodes which defines certain values. Choose pdcf for gate 2 We get 00D Now I have to do D drive , the path could be 2, 3 and then 4.

So pdc for 3 i.e NAND gate is

As far as this particular d cube is considered all the remaining values are dont care.Pdc 3 ( XXX001DDX)PDC for or gate is 0 D DD 0 D Since the value of h is D I can write the first row from the above as 0 DDI get the value as shown belowPdc4 (0XX001DDD)Looking at the output I will be coming to know whether the fault is present or not.I still dont have the values of b and c so we need to consider the values of b and c as well. There is an inconsistency, so we need to do backtracing.Perform Consistency:(0XX001DDX)---Actual pdc4 (X11XX1XXX) after backtracing Sc1( do the intersection for the above 2 values)SC1 (011001DDD)The values will be 01100, this is the test vector for the fault to be tested.

The whole algorithm is all about propagating D to the output and we need to sense it.