DARPADARPA

Reversible Logic Circuit SynthesisReversible Logic Circuit Synthesis

Vivek V. Shende, Aditya K. Prasad, Vivek V. Shende, Aditya K. Prasad, Igor L. Markov and John P. HayesIgor L. Markov and John P. Hayes

University of MichiganUniversity of Michigan

OutlineOutline

MotivationMotivationReal-world ApplicationsReal-world ApplicationsTheoretical AdvantagesTheoretical AdvantagesLinks to Quantum ComputationLinks to Quantum Computation

Background Background Theoretical ResultsTheoretical ResultsSynthesis of Optimal CircuitsSynthesis of Optimal CircuitsAn Application to Quantum ComputingAn Application to Quantum Computing

Real-world ApplicationsReal-world Applications

Many Many inherently reversible applicationsinherently reversible applications Info. is re-coded, but none is lost or addedInfo. is re-coded, but none is lost or added

Digital signal processingDigital signal processingCryptography Cryptography CommunicationsCommunicationsComputer graphicsComputer graphicsNetwork congestion modelingNetwork congestion modeling

Theoretical AdvantagesTheoretical Advantages

Information conservation laws in physicsInformation conservation laws in physicsThermodynamics ties irreversibility to dissipated Thermodynamics ties irreversibility to dissipated

heat: heat: every lost bit causes an energy lossevery lost bit causes an energy lossC. Bennett, 1973, C. Bennett, 1973, IBM J. of R & DIBM J. of R & D

Energy-lossless circuits (Energy-lossless circuits (Time Time ∞ ∞ ))must be information-losslessmust be information-losslesshave been built:have been built: S. Younis and T. Knight, 1994, S. Younis and T. Knight, 1994,

Workshop on Low Power DesignWorkshop on Low Power Design

Links to Quantum ComputationLinks to Quantum Computation

Quantum operations are all reversibleQuantum operations are all reversible M. Nielsen and I. Chuang, M. Nielsen and I. Chuang, Quantum Computation and Quantum Computation and

Quantum InformationQuantum Information, , Cambridge Univ. Press Cambridge Univ. Press 20002000 Every (classical) reversible circuit may be Every (classical) reversible circuit may be

implementedimplemented in quantum technology, with overhead in quantum technology, with overhead ““Pseudo-classical” subroutinesPseudo-classical” subroutines of quantum algos of quantum algos

Can be implemented in classical reversible logic circuitsCan be implemented in classical reversible logic circuits S. Betteli, L. Serafini, and T. Calarco, 2001, S. Betteli, L. Serafini, and T. Calarco, 2001,

http://xxx.lanl.gov/abs/cs.PL/0103009http://xxx.lanl.gov/abs/cs.PL/0103009

OutlineOutline

MotivationMotivationBackgroundBackground

ReversibilityReversibilityPermutationsPermutationsKnown FactsKnown Facts

Theoretical ResultsTheoretical ResultsSynthesis of Optimal CircuitsSynthesis of Optimal CircuitsAn Application to Quantum ComputingAn Application to Quantum Computing

Reversibility in Logic GatesReversibility in Logic Gates DefinitionDefinition: reversible logic gate : reversible logic gate

#input wires = #output wires#input wires = #output wires Permutes the set of input values Permutes the set of input values

Examples Examples InverterInverter 22-input, -input, 22-output SWAP (S) gate-output SWAP (S) gate

kk-CNOT gate-CNOT gate ((k+1k+1))-inputs and -inputs and ((k+1k+1))-outputs-outputs Values on the first Values on the first kk wires are unchanged wires are unchanged The last value is flipped if the first The last value is flipped if the first kk were all were all 11

Reversibility in Logic CircuitsReversibility in Logic Circuits

DefinitionDefinition::A combinational logic circuit is reversible iff A combinational logic circuit is reversible iff It contains only reversible gatesIt contains only reversible gates It has no fan-outIt has no fan-out It is acyclic (as a directed multi-graph)It is acyclic (as a directed multi-graph)

TheoremTheorem::A reversible circuit mustA reversible circuit mustHave as many input wires as output wires Have as many input wires as output wires Permute the set of input valuesPermute the set of input values

A Reversible Circuit and Truth TableA Reversible Circuit and Truth Table

xx yy zz x’x’ y’y’ z’z’

00 00 00 00 00 00

00 00 11 00 00 11

00 11 00 00 11 11

00 11 11 00 11 00

11 00 00 11 00 00

11 00 11 11 00 11

11 11 00 11 11 11

11 11 11 11 11 00

Equivalent to a single CNOT gate

Circuit EquivalencesCircuit Equivalences

Circuit equivalences: useful in synthesisMore will be shown later

Reversible Circuits & PermutationsReversible Circuits & Permutations

A reversible gate (or circuit) with A reversible gate (or circuit) with nn inputs inputs and and nn outputs has outputs has 22nn possible input values possible input values 22nn possible output values possible output values

The function it computes on this set must, The function it computes on this set must, by definition, be a permutationby definition, be a permutation

The set of such permutations is called SThe set of such permutations is called S22nn

Basic Facts About PermutationsBasic Facts About Permutations

Permutations are multiplied by first Permutations are multiplied by first applying one, then the other applying one, then the other example: example: (1,2)◦(2,3) = (1,3,2)(1,2)◦(2,3) = (1,3,2)

A transposition A transposition permutes exactly two elementspermutes exactly two elementsdoes not change any othersdoes not change any others

Every permutation can be writtenEvery permutation can be writtenas a product of transpositionsas a product of transpositions

Even PermutationsEven Permutations

Consider all possible decompositionsConsider all possible decompositionsof a permutation into transpositionsof a permutation into transpositions

TheoremTheorem: The parity of the number: The parity of the numberof transpositions is constantof transpositions is constant

DefinitionDefinition: : Even permutationsEven permutations are those for are those for which which the number of transpositions is eventhe number of transpositions is even

Known FactsKnown Facts

Fact 1Fact 1: Consider a reversible circuit: Consider a reversible circuit n+1n+1 inputs and inputs and n+1n+1 outputs outputs Built from gates which have Built from gates which have

at most at most nn inputs and inputs and nn outputs outputs Must compute an even permutationMust compute an even permutation

Fact 2Fact 2: A universal gate library: A universal gate libraryCNOT, NOT, and TOFFOLI (“CNT”)CNOT, NOT, and TOFFOLI (“CNT”)Temporary storage may be requiredTemporary storage may be required

Temporary StorageTemporary Storage

OutlineOutline

MotivationMotivationBackground Background Theoretical ResultsTheoretical Results

Zero-storage CircuitsZero-storage CircuitsReversible De Morgan’s LawsReversible De Morgan’s Laws

Synthesis of Optimal CircuitsSynthesis of Optimal CircuitsAn Application to Quantum ComputingAn Application to Quantum Computing

Minimizing Temporary StorageMinimizing Temporary Storage

Consider CNT circuitsConsider CNT circuitsTheoremTheorem: even permutations computable: even permutations computable

by circuits by circuits without temporary storagewithout temporary storageTheoremTheorem: odd permutations computable: odd permutations computable

with one line of temporary storagewith one line of temporary storageSame holds for NT- and CNTS-circuitsSame holds for NT- and CNTS-circuitsThe proof is constructive and The proof is constructive and

may be used as a synthesis heuristicmay be used as a synthesis heuristic

C- and N-circuitsC- and N-circuits

N-circuits need at most one gate per wireN-circuits need at most one gate per wireCan Can cancelcancel inverters inverters

C-circuits on k wires act as k C-circuits on k wires act as k × × k matricesk matricesBy reversibility, By reversibility, the matrix must be invertiblethe matrix must be invertibleA C(x,y) gate is a row-addition matrix which A C(x,y) gate is a row-addition matrix which

adds the x-th row to the y-thadds the x-th row to the y-thCan get all invertible matricesCan get all invertible matrices

T-circuitsT-circuits

T-circuitsT-circuits fix 0, 2 fix 0, 2ii

These have only one 1 in their binary expansionThese have only one 1 in their binary expansion

T-circuits on 4+ wires T-circuits on 4+ wires compute even perms.compute even perms. In fact, any circuit in which no gate involves all the In fact, any circuit in which no gate involves all the

wires computes an even permutationwires computes an even permutation T. Toffoli, "Reversible Computing", Tech. Memo T. Toffoli, "Reversible Computing", Tech. Memo

MIT/LCS/TM-151, MIT Lab for Comp. Sci, 1980.MIT/LCS/TM-151, MIT Lab for Comp. Sci, 1980.

Any permutation satisfying the above constraints Any permutation satisfying the above constraints can be computed in a T-circuitcan be computed in a T-circuit

T-circuitsT-circuits

Assume #wires > 3Assume #wires > 3Decompose an even permutation into Decompose an even permutation into a a

product of disjoint transpositionsproduct of disjoint transpositions (a,b)(c,d) (a,b)(c,d) is okay, is okay, (a,b)(b,c) (a,b)(b,c) is notis notBut But (a,b)(b,c)(a,b)(b,c) = = [(a,b)(d,e)] [(d,e)(b,c)][(a,b)(d,e)] [(d,e)(b,c)]

Explicitly construct a circuit to computeExplicitly construct a circuit to computean arbitrary pair of an arbitrary pair of disjointdisjoint transpositions transpositions

Computing Disjoint Trans. PairsComputing Disjoint Trans. Pairs

Use an (n-2) generalized Toffoli gate on n wiresUse an (n-2) generalized Toffoli gate on n wires Can compute z = (2Can compute z = (2nn-1, 2-1, 2nn-2)(2-2)(2nn-3, 2-3, 2nn-4)-4) Can be simulated by T gatesCan be simulated by T gates (no temporary storage) (no temporary storage)

A. Barenco et al.: ``Elementary Gates For Quantum A. Barenco et al.: ``Elementary Gates For Quantum

Computation'', Physi. Review A (52), 3457-3467, 1995Computation'', Physi. Review A (52), 3457-3467, 1995

Can compute a permutation p sending:Can compute a permutation p sending: aa →→ 22nn-1-1, , bb →→ 22nn-2-2, , cc →→ 22nn-3-3, , dd →→ 22nn-4-4

Use these constructions to compute a given pair Use these constructions to compute a given pair of disjoint transpositionsof disjoint transpositions pp-1-1zp = (a,b)(c,d)zp = (a,b)(c,d)

CT|N-circuitsCT|N-circuits

A A CT|N-circuitCT|N-circuit is a CNT-circuit is a CNT-circuit with all the with all the N gates at the right endN gates at the right end

To convert a CNT-circuit into CT|N formTo convert a CNT-circuit into CT|N formWrite down rules for interchanging N gates Write down rules for interchanging N gates

with C and T gateswith C and T gatesPush all the N gates to the endPush all the N gates to the end

Like pushing inverters to the front of Like pushing inverters to the front of (irreversible) AND/OR/NOT-circuits(irreversible) AND/OR/NOT-circuits

Reversible De Morgan’s LawsReversible De Morgan’s Laws

T|C-circuitsT|C-circuits

Similar rules exist for Similar rules exist for interchanging interchanging TOFFOLI and CNOT gatesTOFFOLI and CNOT gates

Reversible De Morgan’s Laws (2)Reversible De Morgan’s Laws (2)

T|C-circuitsT|C-circuits

HoweverHowever, , it is not always possibleit is not always possibleto push all C gates to the inputsto push all C gates to the inputs

A T|C-circuit’s permutation A T|C-circuit’s permutation must fix 0, and map must fix 0, and map the elements 2the elements 2ii to linearly independent vectors to linearly independent vectors Recall: T-circuits fix 0, 2Recall: T-circuits fix 0, 2ii, and C-circuits compute , and C-circuits compute

invertible linear transformationsinvertible linear transformations A permutation can be computed by a T|C-circuit A permutation can be computed by a T|C-circuit

if it satisfies the above requirementsif it satisfies the above requirements The permutation (1,2)(3,4) does notThe permutation (1,2)(3,4) does not

We will see that it can be computed by a CT-circuitWe will see that it can be computed by a CT-circuit

T|C|T-circuitsT|C|T-circuits

Given any even permutation Given any even permutation fixing zerofixing zeroCan multiply it by an even permutation fixing Can multiply it by an even permutation fixing

0, 20, 2ii so that the product fixes 0, and takes so that the product fixes 0, and takes inputs 2inputs 2ii to linearly independent outputs to linearly independent outputs

A T-circuit can simulate the formerA T-circuit can simulate the formerA T|C circuit can simulate the latterA T|C circuit can simulate the latter

So, any zero-fixing even permutation can So, any zero-fixing even permutation can be computed by a T|C|T-circuitbe computed by a T|C|T-circuit

T|C|T|N-circuitsT|C|T|N-circuits

Let p be an even permutationLet p be an even permutationThere is an N-circuit taking 0 to p(0)There is an N-circuit taking 0 to p(0)

Unique up to canceling redundant gatesUnique up to canceling redundant gatesSay this N-circuit computes the permutation nSay this N-circuit computes the permutation nThe permutation pnThe permutation pn-1-1 fixes 0, and fixes 0, and can be can be

computed by a T|C|T-circuit P’computed by a T|C|T-circuit P’Then the circuit P’N computes pThen the circuit P’N computes p

TheoremTheorem: any even permutation : any even permutation can be can be computed by a T|C|T|N-circuitcomputed by a T|C|T|N-circuit

Comments on Circuit LengthComments on Circuit Length

For “long” CNT-circuits, this algorithm produces For “long” CNT-circuits, this algorithm produces circuits which are circuits which are suboptimal by at worst a suboptimal by at worst a logarithmic factorlogarithmic factor (in the number of wires) (in the number of wires)

Converting a CNT-circuit to a CT|N-circuit Converting a CNT-circuit to a CT|N-circuit increases circuit size increases circuit size by about a factor of 3by about a factor of 3

We do not know any good algorithm to convert We do not know any good algorithm to convert CNT-circuits to T|C|T|N-circuits, or CNT-circuits to T|C|T|N-circuits, or even if this even if this conversion may be done with polynomial length conversion may be done with polynomial length increaseincrease

OutlineOutline

MotivationMotivationBackground Background Theoretical ResultsTheoretical ResultsSynthesis of Optimal CircuitsSynthesis of Optimal Circuits

OptimalityOptimalityDFID Search AlgorithmDFID Search AlgorithmCircuit LibrariesCircuit Libraries

An Application to Quantum ComputingAn Application to Quantum Computing

OptimalityOptimality

The cost of a circuit is its The cost of a circuit is its gate countgate countOther cost functions can be consideredOther cost functions can be considered

DefinitionDefinition:: optimal reversible circuit optimal reversible circuit no circuit with fewer gates computes no circuit with fewer gates computes

the same permutationthe same permutationTheoremTheorem: a sub-circuit of an optimal circuit : a sub-circuit of an optimal circuit

is optimalis optimalProof: otherwise, can improve the sub-circuitProof: otherwise, can improve the sub-circuit

The Search ProcedureThe Search Procedure

Depth First Iterative Deepening SearchDepth First Iterative Deepening SearchChecks all possible circuits of cost 1, then all Checks all possible circuits of cost 1, then all

possible circuits of cost 2, etc…possible circuits of cost 2, etc…Avoids the memory blowup of BFSAvoids the memory blowup of BFS

Still finds optimal solutions (unlike DFS)Still finds optimal solutions (unlike DFS)Checking circuits of cost less than Checking circuits of cost less than nn

Is much faster than processing cost-Is much faster than processing cost-nn circuits circuits

Dynamic Prog + Circuit LibrariesDynamic Prog + Circuit Libraries

DFID search requires a subroutine to checkDFID search requires a subroutine to checkall circuits of cost all circuits of cost nn, for arbitrary , for arbitrary nnCalled iteratively for Called iteratively for 1…n1…n

Only need to check Only need to check locally optimal circuitslocally optimal circuits Build optimal circuit library bottom up by DPBuild optimal circuit library bottom up by DP

Index optimal circuits by computed permutationIndex optimal circuits by computed permutation In practice use hash_map datastruct from STLIn practice use hash_map datastruct from STL

Synthesis AlgorithmSynthesis Algorithm

Empirical Circuit SynthesisEmpirical Circuit Synthesis

Consider all reversible functions on 3 Consider all reversible functions on 3 wireswires((8! = 40,320 functions8! = 40,320 functions))

For each gate library fromFor each gate library fromN, C, T, NC, CT, NT, CNT, CNTSN, C, T, NC, CT, NT, CNT, CNTS Is it Is it universaluniversal??How many functions can it synthesize?How many functions can it synthesize?How long does it take to synthesize circuits?How long does it take to synthesize circuits?What are largest optimal circuits?What are largest optimal circuits?

Optimal Circuit SizesOptimal Circuit SizesSize N C T NC CT NT CNT CNTS

12 0 0 0 0 0 47 0 011 0 0 0 0 0 1690 0 010 0 0 0 0 0 8363 0 0

9 0 0 0 0 0 12237 0 08 0 0 0 0 6 9339 577 327 0 0 0 14 386 5097 10253 6817

6 0 2 0 215 1688 2262 17049 17531

5 0 24 0 474 1784 870 8921 111944 0 60 5 393 845 296 2780 37523 1 51 9 187 261 88 625 8442 3 24 6 51 60 24 102 1351 3 6 3 9 9 6 12 150 1 1 1 1 1 1 1 1

Total 8 168 24 1344 5040 40320 40320 40320Time, s 1 1 1 30 215 97 40 15

Largest Optimal CircuitsLargest Optimal Circuits

Why Circuit Libraries?Why Circuit Libraries?

Large speedup relative to just branchingLarge speedup relative to just branchingCan be calculated from previous tableCan be calculated from previous tableCalculated values are very largeCalculated values are very large

In practice, the table cannot be generated In practice, the table cannot be generated in several hours without circuit librariesin several hours without circuit librariesWith libraries, the table takes less than 10 minWith libraries, the table takes less than 10 min

OutlineOutline

MotivationMotivationBackground Background Theoretical ResultsTheoretical ResultsSynthesis of Optimal CircuitsSynthesis of Optimal CircuitsAn Application to Quantum ComputingAn Application to Quantum Computing

Grover’s SearchGrover’s SearchPseudo-classical SynthesisPseudo-classical Synthesis

Quantum CircuitsQuantum Circuits

Necessarily reversibleNecessarily reversible Information stored on qubitsInformation stored on qubits

Superposition allows linear combinations of 0 Superposition allows linear combinations of 0 and 1 to be storedand 1 to be stored

All reversible gates still allowedAll reversible gates still allowedMany other gates used as wellMany other gates used as well

Grover’s SearchGrover’s Search A quantum algorithm for associative searchA quantum algorithm for associative search

(input is not sorted)(input is not sorted) Search criterion: a classical one-output function Search criterion: a classical one-output function ff L. K. Grover, “A Framework For Fast Quantum L. K. Grover, “A Framework For Fast Quantum

Mechanical Algorithms”, Mechanical Algorithms”, STOCSTOC 1998 1998 M. Nielsen and I. Chuang, 2000 M. Nielsen and I. Chuang, 2000

Runs in time Runs in time O(√O(√NN)) any classical algorithm provably requires any classical algorithm provably requires ((N N )) time time

Requires a subroutine (oracle) thatRequires a subroutine (oracle) that changes the phasechanges the phase (sign) (sign) of all basis states of all basis states (bit-strings)(bit-strings)

that match the search criterion that match the search criterion ff

Grover Oracle CircuitsGrover Oracle Circuits

To change the sign of a bit-stringTo change the sign of a bit-string Initialize a qubit to |0> - |1>Initialize a qubit to |0> - |1>Compute the classical one-output function Compute the classical one-output function ffXOR the qubit with XOR the qubit with ffWhenever Whenever f=1f=1, the sign (phase) will change, the sign (phase) will change

Sample Grover Oracle CircuitSample Grover Oracle Circuit

Grover Oracle Circuit SynthesisGrover Oracle Circuit Synthesis

Thus, Thus, the design of Grover search circuitsthe design of Grover search circuitsfor a givenfor a given f f Is reduced to reversible synthesisIs reduced to reversible synthesis Can be Can be solved optimally by our methodssolved optimally by our methods

ROM-based CircuitsROM-based Circuits Desired circuits must alter phase of basis statesDesired circuits must alter phase of basis states

All bits except one All bits except one must be restored to input valuesmust be restored to input values Previous work studied ROM-based circuitsPrevious work studied ROM-based circuits

Constraint: ROM qubits can never changeConstraint: ROM qubits can never change B. Travaglione et al., 2001, B. Travaglione et al., 2001,

http://xxx.lanl.gov/abs/quant-ph/0109016http://xxx.lanl.gov/abs/quant-ph/0109016 Theorems + heuristic synthesis algorithmsTheorems + heuristic synthesis algorithms

Our work: synthesis of pseudo-classical circuits Our work: synthesis of pseudo-classical circuits 33 read-only “ROM” wires that can read-only “ROM” wires that can never changenever change 11 wire that can be changed during computation, wire that can be changed during computation,

but but must be restored by endmust be restored by end 11 wire on which function is computed wire on which function is computed

Synthesis Algorithms ComparedSynthesis Algorithms Compared

Heuristic synthesis of ROM-based circuitsHeuristic synthesis of ROM-based circuitsProposed by Proposed by Travaglione et al, 2001Travaglione et al, 2001Based on EXOR-sum decomposition (“Based on EXOR-sum decomposition (“XORXOR”)”) Imposed a restriction: Imposed a restriction: at most one control bit at most one control bit

per gate can be on a ROM bitper gate can be on a ROM bit Optimal synthesis (as described earlier)Optimal synthesis (as described earlier)

with restriction from Travaglione (“with restriction from Travaglione (“OPT TOPT T”)”)without this restriction (“without this restriction (“OPTOPT”)”)

Sizes of 3+2 ROM-circuits

Size 0 1 2 3 4 5 6 7 8 9 10 11 12

XOR 1 4 6 4 4 12 18 12 6 12 19 16 10

OPT T 1 4 6 4 4 12 21 24 29 33 44 46 22

OPT 1 7 21 35 36 28 28 36 35 21 7 1 0

Size 13 14 15 16 17 18 19 20 21 22 23 24 25 26

XOR 8 10 16 19 12 6 12 18 12 4 4 6 4 1

OPT T 5 1 0 0 0 0 0 0 0 0 0 0 0 0

OPT 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Discussion of Empirical ResultsDiscussion of Empirical Results

The EXOR-SUM heuristic is sub-optimalThe EXOR-SUM heuristic is sub-optimalAll methods able to synthesize all 256 fnsAll methods able to synthesize all 256 fns

““OPT TOPT T” can synthesize as many as “” can synthesize as many as “OPTOPT”:”: B. Travaglione et al., 2001B. Travaglione et al., 2001

““OPTOPT” results symmetrical about 5-6 gates” results symmetrical about 5-6 gatesFunction Function xx requires one fewer gate than requires one fewer gate than 256-x256-xExplanation yet to be foundExplanation yet to be found

““XORXOR” results symmetrical about 13 gates” results symmetrical about 13 gates

ConclusionsConclusions

Classical reversible circuitsClassical reversible circuitsas special-case quantum circuitsas special-case quantum circuits

Existence theoremsExistence theoremsReversible De Morgan’s lawsReversible De Morgan’s laws

Future research on optimization heuristicsFuture research on optimization heuristicsAlgorithm for synthesis of optimal circuitsAlgorithm for synthesis of optimal circuits

Applicable to Grover’s search Applicable to Grover’s search

Thank You For Your AttentionThank You For Your Attention