Date post: | 07-Aug-2015 |
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topics.
• Your questions should be according to topic.
•Any misbehave during presentation would lead you to some serious actions like asked to leave the class room.
Topic Outline
• What is Pipelining?
• Types of Pipelining.
• What is Data Hazard?
• Types of Data Hazard.
• Solutions for Data Hazards.
Pipelining
• A technique used in advanced microprocessors where the microprocessor begins executing a second instruction before the first has been completed.
• That is, several instructions are in the pipeline simultaneously, each at a different processing stage.
• A situation that prevent the starting next instruction in the next cycle
• They reduce speedup of pipeline execution
• Hazards can always be resolved by waiting
HAZARD
• Attempt to use item before it is ready
• Instruction depends on result of prior instruction still in the pipeline
DATA HAZARD@@
RAW(Read After Write)
• It is also known as TRUE DEPENDENCY .
• An instruction modifies a register or memory location
• Succeeding instruction reads data in that location
• Hazard if read takes place before write complete
Write After Read (RAW)
• It is also known as Anti dependency
• An instruction reads a register or memory location
• Succeeding instruction writes to location
• Hazard if write completes before read takes place
Write After Write (RAW)
• Two instructions both write to same location
•Hazard if writes take place in reverse of order intended sequence
• All the instructions after the ADD use the result of the ADD instruction (in R1). The ADD instruction writes the value of R1 in the WB stage .
• SUB instruction reads the value during ID stage (IDsub). This problem is called a data hazard
Two instruction with add and Sub using three register $sO(in addition) and $t2(in subtraction) =Destination Register
$tO , $t1 and $t3 are Read /Write RegisterWhile $sO is read/write register in Subtraction instruction
ID
0 2 4 6 8 10 12
IF ID EX MEM
16
add $s0 ,$t0,$t1
18
sub $t2, $s0 ,$t3 IF EX MEM
Ws0
WBRs0
new value of s0
Data hazard occur at this stage
Data Hazards – Forwarding
• Key idea: connect new value directly to next stage
• Still read s0, but ignore in favor of new result
Forwarding-Data HazardA instruction goes into four state
Let two instruction Add $sO, $tO , $t1 Sub $t2, $sO ,$t3
How to avoid data hazard?
$sO registe
r
If we use this path as shown by arrow then we left the $sO register for
instruction SUB
Solution
• Usually solved by data or register forwarding (bypassing or short-circuiting). This is based on the fact that the data selected is not really used in ID but in the next stage: ALU.
• Forwarding works as follows: ALU result from EX/MEM buffer is always fed back to the ALU input keys. If the forwarding hardware detects that its source operand has a new value, the logic selects the newer result rather than the value read from the register file.