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Demonstration of Next-generation Au-Pd Surface Finish with Solder-capped Cu Pillars for Ultra-fine Pitch Applications Ting-Chia Huang, Vanessa Smet, Pulugurtha Markondeya Raj, and Rao R. Tummala 3D Systems Packaging Research Center Georgia Institute of Technology Atlanta, GA USA30332 Email: [email protected] Gustavo Ramos, Arnd Kilian, Robin Taylor, and Rick Nichols Atotech Deutschland GmbH Berlin, Germany AbstractHigh-performance computing is driving sub-10μm substrate interconnect pitches to support high-density logic-to- memory interconnections in advanced 2.5D packaging. A new ultra-thin surface finish, electroless Pd autocatalytic Au (EPAG), was recently developed by Atotech GmBH to address extraneous plating encountered at these fine pitches with conventional finishes, such as electroless Ni immersion Au (ENIG) or electroless Ni electroless Pd immersion Au (ENEPIG). In this paper, the EPAG composition was optimized to demonstrate, for the first time, ultra-short copper pillar interconnections with superior pitch scalability, bonding strength and thermomechanical reliability as compared to standard ENEPIG. Variations in surface finish composition were considered, with EPAG finishes composed of 50 – 100nm Pd and 50nm Au, electroless palladium (EP) finishes of 50 and 100nm Pd; and standard ENEPIG, used as reference. Solder wettability was first evaluated through contact angle measurements on solder sessile drop test samples. Copper pillar assemblies with limited solder volume were then formed on all surface finishes. They were subjected to high-temperature storage at 150 ° C for up to 500h, to study interfacial reactions, and subsequent intermetallic formation. While gold embrittlement was observed with both EP and ENEPIG finishes, it could be prevented with EPAG surface finish with 50nm Pd and 50nm Au, this specific ratio leading to formation of the single (Cu, Au, Pd)6Sn5 intermetallic. Die shear and thermal shock tests were then carried out to determine the effect of the joints’ composition on their strength and fatigue life. A shear strength of 40MPa was achieved with all EPAG compositions, exceeding the 6-11MPa and 5MPa achieved with EP and ENEPIG, respectively. Highest thermomechanical reliability was also achieved with EPAG finishes, surviving 300 cycles at -55/125°C even in silicon-to-FR-4 assemblies with high CTE mismatch, while 70% of the ENEPIG daisy chains failed after only 100 thermal cycles. The optimized EPAG composition was therefore demonstrated as a promising low-cost surface finish alternative to form ultra-short but highly-reliable, fine- pitch, Cu pillar interconnections. Keywords-surface finishes; solder interconnections; interfacial reaction I. INTRODUCTION The recent trends for higher bandwidth and transmission speed at lower power, as well as for system miniaturization observed in tera-scale computing have been driving advanced packaging solutions with higher integration densities. In particular, emerging 2.5D interposer packages requires wiring at sub-10μm pitches on one hand, and ultra-short off-chip interconnections, less than 20μm in height and pitch, on the other hand, to achieve high-performance logic-to-memory interconnections. Such fine interconnect pitches are pushing the limits of existing surface finish materials, as well as raising reliability concerns for solder-based joints. Nickel-based metallic finishes such as ENIG and ENEPIG are industry’s technologies of choice, owing to their superior properties such as ideal solder wettability, excellent joint strength and reliability performance. ENEPIG was first introduced to solve ENIG’s black pad defects caused by hyperactive corrosion [1-2], and has soon become standard in high-end applications for its unprecedented reliability enhancements, despite its relatively high cost [3-4]. However, the high nickel thicknesses, typically 5 to 7μm, involved in these conventional finishes impede their applicability at fine pitch, with sub-10μm spacings. Thin ENEPIG, with reduced nickel thicknesses down to 0.15μm, was recently proposed to address this challenge but is still fundamentally limited by potential corrosion of copper due to very thin nickel as well as non-reliable solder joints [5]. Existing Ni-free solutions such as immersion tin and organic solderability preservatives (OSP), potentially scalable to finer pitches, result in significant intermetallic growth due to the lack of a diffusion barrier layer, ultimately causing brittle fractures [6-7]. Organic finishes were also found incompatible with recent Cu pillar thermocompression bonding with non-conductive paste (TC-NCP) as their dissolution requires more aggressive fluxing than achievable with pre-applied underfills. New, ultra-thin surface finish technologies with a fine control of extraneous plating are thus required to enable high-density wiring at finer pitches, to meet the integration and performance needs of tomorrow’s computing systems. The EPAG finish has been developed by Atotech GmBH as novel solution for fine-pitch applications. With thicknesses in the 50-150nm range, it enables a gap loss between traces of less than 5%, while improving insertion losses |S21| at 67 GHz by 1 dB [5]. Although this technology has already been demonstrated with wire bonding and BGA interconnections with promising results, this is the first study with ultra-short Cu pillar interconnections, with a 10μm solder height at 30μm diameter. With such limited solder volumes, Pd and Au concentrations within the solder joints become critical due to risks of gold embrittlement [8-9], which stands the brittle interface caused by intermetallics composed of Sn and noble metals. Surface finishes, in particular the material and thickness of their topmost layer, also strongly affect solder 2016 IEEE 66th Electronic Components and Technology Conference 978-1-5090-1204-6/16 $31.00 © 2016 IEEE DOI 10.1109/ECTC.2016.331 2553
Transcript
Page 1: Demonstration of Next-Generation Au-Pd ... - … Sample A dry film photoresist was then laminated to ... patterned by subtractive etching to form complementary ... ranging from 94.5nm

Demonstration of Next-generation Au-Pd Surface Finish with Solder-capped Cu Pillars for Ultra-fine Pitch Applications

Ting-Chia Huang, Vanessa Smet, Pulugurtha Markondeya Raj, and Rao R. Tummala

3D Systems Packaging Research Center Georgia Institute of Technology

Atlanta, GA USA30332 Email: [email protected]

Gustavo Ramos, Arnd Kilian, Robin Taylor, and Rick Nichols

Atotech Deutschland GmbH Berlin, Germany

Abstract—High-performance computing is driving sub-10μm substrate interconnect pitches to support high-density logic-to-memory interconnections in advanced 2.5D packaging. A new ultra-thin surface finish, electroless Pd autocatalytic Au (EPAG), was recently developed by Atotech GmBH to address extraneous plating encountered at these fine pitches with conventional finishes, such as electroless Ni immersion Au (ENIG) or electroless Ni electroless Pd immersion Au (ENEPIG). In this paper, the EPAG composition was optimized to demonstrate, for the first time, ultra-short copper pillar interconnections with superior pitch scalability, bonding strength and thermomechanical reliability as compared to standard ENEPIG.

Variations in surface finish composition were considered, with EPAG finishes composed of 50 – 100nm Pd and 50nm Au, electroless palladium (EP) finishes of 50 and 100nm Pd; and standard ENEPIG, used as reference. Solder wettability was first evaluated through contact angle measurements on solder sessile drop test samples. Copper pillar assemblies with limited solder volume were then formed on all surface finishes. They were subjected to high-temperature storage at 150°C for up to 500h, to study interfacial reactions, and subsequent intermetallic formation. While gold embrittlement was observed with both EP and ENEPIG finishes, it could be prevented with EPAG surface finish with 50nm Pd and 50nm Au, this specific ratio leading to formation of the single (Cu, Au, Pd)6Sn5 intermetallic. Die shear and thermal shock tests were then carried out to determine the effect of the joints’ composition on their strength and fatigue life. A shear strength of 40MPa was achieved with all EPAG compositions, exceeding the 6-11MPa and 5MPa achieved with EP and ENEPIG, respectively. Highest thermomechanical reliability was also achieved with EPAG finishes, surviving 300 cycles at -55/125°C even in silicon-to-FR-4 assemblies with high CTE mismatch, while 70% of the ENEPIG daisy chains failed after only 100 thermal cycles. The optimized EPAG composition was therefore demonstrated as a promising low-cost surface finish alternative to form ultra-short but highly-reliable, fine-pitch, Cu pillar interconnections.

Keywords-surface finishes; solder interconnections; interfacial reaction

I. INTRODUCTION The recent trends for higher bandwidth and transmission

speed at lower power, as well as for system miniaturization observed in tera-scale computing have been driving advanced packaging solutions with higher integration densities. In particular, emerging 2.5D interposer packages requires wiring at sub-10μm pitches on one hand, and ultra-short off-chip

interconnections, less than 20μm in height and pitch, on the other hand, to achieve high-performance logic-to-memory interconnections. Such fine interconnect pitches are pushing the limits of existing surface finish materials, as well as raising reliability concerns for solder-based joints.

Nickel-based metallic finishes such as ENIG and ENEPIG are industry’s technologies of choice, owing to their superior properties such as ideal solder wettability, excellent joint strength and reliability performance. ENEPIG was first introduced to solve ENIG’s black pad defects caused by hyperactive corrosion [1-2], and has soon become standard in high-end applications for its unprecedented reliability enhancements, despite its relatively high cost [3-4]. However, the high nickel thicknesses, typically 5 to 7μm, involved in these conventional finishes impede their applicability at fine pitch, with sub-10μm spacings. Thin ENEPIG, with reduced nickel thicknesses down to 0.15μm, was recently proposed to address this challenge but is still fundamentally limited by potential corrosion of copper due to very thin nickel as well as non-reliable solder joints [5]. Existing Ni-free solutions such as immersion tin and organic solderability preservatives (OSP), potentially scalable to finer pitches, result in significant intermetallic growth due to the lack of a diffusion barrier layer, ultimately causing brittle fractures [6-7]. Organic finishes were also found incompatible with recent Cu pillar thermocompression bonding with non-conductive paste (TC-NCP) as their dissolution requires more aggressive fluxing than achievable with pre-applied underfills. New, ultra-thin surface finish technologies with a fine control of extraneous plating are thus required to enable high-density wiring at finer pitches, to meet the integration and performance needs of tomorrow’s computing systems.

The EPAG finish has been developed by Atotech GmBH as novel solution for fine-pitch applications. With thicknesses in the 50-150nm range, it enables a gap loss between traces of less than 5%, while improving insertion losses |S21| at 67 GHz by 1 dB [5]. Although this technology has already been demonstrated with wire bonding and BGA interconnections with promising results, this is the first study with ultra-short Cu pillar interconnections, with a 10μm solder height at 30μm diameter. With such limited solder volumes, Pd and Au concentrations within the solder joints become critical due to risks of gold embrittlement [8-9], which stands the brittle interface caused by intermetallics composed of Sn and noble metals. Surface finishes, in particular the material and thickness of their topmost layer, also strongly affect solder

2016 IEEE 66th Electronic Components and Technology Conference

978-1-5090-1204-6/16 $31.00 © 2016 IEEE

DOI 10.1109/ECTC.2016.331

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wettability. The composition of the EPAG finish thus needs to be carefully optimized to achieve superior wettability, joint strength and reliability at reduced solder volumes.

This paper describes the design, assembly, characterization and optimization of the EPAG finish composition to meet these objectives. Variations in surface finish composition were considered with Pd and Au thicknesses ranging from 50-100nm and 0-50nm, respectively. Standard ENEPIG finish was used as benchmark. Solder wettability on all surfaces was first investigated using sessile drop test samples. Daisy chain test vehicles were then assembled by thermocompression bonding for further evaluations. Interfacial reactions were studied through high temperature storage at 150°C with detailed analysis of microstructural evolution. The bond strength and fatigue performance were eventually assessed by die shear and thermal shock test, which correlates to observed discrepancies in microstructure. An optimized composition of EPAG was finally proposed, exceeding the performance of ENEPIG finish in solder wettability, joint strength, as well as thermomechanical reliability.

II. TEST VEHICLE FABRICATION The design of the daisy-chain test vehicles used in this

research is shown in Fig. 1.The test die comprises 760 I/Os, distributed in 3 peripheral rows at 100μm pitch and in a central area array at 250μm pitch. Test dies were fabricated on 6-inch silicon wafers, 600μm in thickness, by semi-additive processing. After patterning with the Hitachi RY-5315UTB dry film photoresist, the dogbone routing layer was formed by copper electrolytic plating, up to a thickness of 3-4μm. The Hitachi Sample A dry film photoresist was then laminated to pattern the bumping layer. Microbumps, composed of Cu pillars, 30μm in diameter and 15μm in height, and 10μm Sn2.0Ag solder caps, were finally built by successive electroplating processes with a current density of 2ASD. Bump coplanarity was evaluated by 3D confocal microscopy, using an Olympus LEXT 3D Material Confocal microscope. Height variations of ±0.5μm were measured within a die, as shown in Fig. 2, indicating good control of the plating processes.

Patterned test substrates were fabricated by subtractive processing of Cu-clad, 1mm-thick FR-4 boards. The copper metallization was first chemically etched down to 9-10μm. A microetch process was then applied to reduce roughness and oxidation of the Cu surface. The copper wiring was finally patterned by subtractive etching to form complementary daisy-chain dogbone structures and probing pads. Surface finish plating was performed by Atotech GmbH for a precise control of the plated composition, using the Pallabond Pd chemistry for EP, Pallabond Pd/Au for EPAG, and Aurotech CNN/PD Tech PC/Aurotech SF Plus for ENEPIG. Five surface finish variations were considered in this study, referred to as EP-A (Pd 50nm), EP-B (Pd 100nm), EPAG-A (Pd 50nm/Au 50nm), EPAG-B (Pd 100nm/Au 50nm), and ENEPIG (Ni 4μm/Pd 150nm/Au 100nm), as reported in Table 1. Plated thicknesses were confirmed by Fisher XRF measurements using an x-ray capillary.

TABLE 1. Composition of surface finishes

Figure 1. Electrical design of daisy-chain test vehicle with (a)

test die, and (b) substrate layout.

Figure 2. Bumped daisy chain test die imaged by (a) scanning electron microscope (SEM), and (b) 3D confocal microscopy.

III. SOLDER WETTABILITY EVALUATION Sessile drop test samples were prepared by reflow of

SAC387 (Sn 3.8wt% Ag 0.7wt% Cu) solder balls, 250μm in diameter, on all surface finishes for comparative study of solder wettability. The reflow was performed at a 260oC peak temperature, maintained for 1min, with no-clean liquid flux. A Rame-hart Model 250 goniometer was used to measure the contact angle between solder and substrate metallization, as shown in Fig. 3(a). The solder spread was also evaluated with a Zeta 3D optical profilometer, as illustrated in Fig. 3(b). The contact angle measurements as well as the ratio of wetted area (r) to initial solder diameter (ro) were used to quantify solder wettability on the investigated finishes. Results of these evaluations ae reported in Fig. 3(d).

Ideal wettability was observed with ENEPIG and all EPAG compositions, nearly twice greater than with EP finishes. As the Pd content is kept same in EPAG and EP-A and B variations, wettability was confirmed mostly governed by the topmost metallic layer, Au in the case of EPAG, which instantly reacts with the solder. Solder wettability on a given metallic surface is controlled by two prevailing mechanisms: 1) solubility of the reacted metal in solder, and 2) reaction rates of intermetallic formation [10]. Fast dissolution is believed to facilitate solder lateral spreading, while vertical chemical reactions involved in intermetallic formation act as a competing mechanism, impeding lateral driving forces, thus limiting solder spread. Since Au has higher solubility than Pd in solders, but both have fast formation rates of AuSn4 and PdSn4, worse wettability was obtained with EP finishes compared to EPAG, regardless of their composition.

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Wettability on EP surfaces was also found highly dependent on the Pd thickness, with improved wettability obtained for EP-B with 100nm Pd as compared to EP-A with 50nm Pd. This effect is in agreement with previously reported observation with Pd surface, considering a short reflow time less than 1min [11]. Considering the topmost metal is in both cases Pd, and the thin Pd layers could be completely dissolved in solder, neither solubility nor intermetallic formation can explain this behavior. However, solder flowability is also conditioned by surface roughness due to capillary-driven flow kinetics [12-13]. Surface roughness measurements were therefore carried out by atomic force microscopy (AFM) for each surface finish, as shown in Fig. 3(c). ENEPIG presented the smoothest surface with a Ra of 61.2nm, while similar higher Ra values, ranging from 94.5nm to 104.9nm, were obtained for EPAG and EP finishes regardless of their composition. Similar wettability of EPAG and ENEPIG indicates that surface roughness did not significantly affect wettability on Au surfaces, rather dominated by the reaction between Au and molten solder. Likewise, surface roughness cannot account for the discrepancies in wettability observed between EPAG and EP, primarily attributed to the higher solubility of Au in solders, nor between the EP compositions.

To understand the effect of Pd thickness on wettability, X-ray photoelectron spectroscopy (XPS) was used to identify the composition of the Pd layer within a 10nm depth. The observed Pd 3d and Pd 3p peaks confirm both as-plated EP-A and EP-B surfaces as pure Pd metal. During the reflow process required to form the sessile drop test samples, the Pd surfaces were actually annealed in the slow temperature ramp-up to 230oC at 2K/s, prior to the solder reaching its melting point and initiating the reaction. To assess the effect of such annealing, EP-A and EP-B substrates were reflowed at 200oC peak temperature for 1min and again subjected to XPS characterization. The results of Fig. 4 suggest that the surface the solder actually wetted on was indeed modified by this high-temperature storage. For all EP surfaces, peaks of Pd 3d3/2 and Pd 3d5/2 were found at 340.3 eV and 335 eV, respectively, indicating that Pd did remain in a pure metal state, without oxidation. However, the EP-A surface presented peaks of Cu 2p1/2 and Cu 2p3/2 at 952.3 eV and 932.1 eV, respectively. While Cu3Pd can potentially form at the interface between Cu and Pd, it remained undetectable within the characterized depth. While the Pd layer remained technically unchanged, the chemical shift with apparition of Cu 2p peaks after annealing indicates that Cu can easily

diffuse through the entire 50nm Pd thickness and get oxidized to form Cu2O. This copper oxide is believed to deteriorate solder wettability. Moreover, very thin metal layers formed with electroless processes, particularly electroless nickel, tend to form highly-porous coatings. In the EP-A composition with only 50nm Pd thickness, inherent porosity is expected to provide more surface diffusion paths for Cu, further aggravating oxidation risks and subsequently degrading wettability.

IV. ASSEMBLY AND INTERMETALLICS ANALYSIS

A. Assembly Process Design and Optimization Die-to-substrate assemblies were formed by

thermocompression bonding with pre-applied underfill using a semi-automatic Finetech FINEPLACER Matrix flip-chip bonder with a placement accuracy of ±3μm. In this study, two underfill materials from Namics Corporation were considered: a filler-free B-stageable no-flow underfill (BNUF), and a non-conductive paste (NCP) with 50-65% filler content. Whereas BNUF was designed as a slow curing material with a longer shelf life, NCP is a snap-cure material, ideal for high-throughput thermocompression (TC) bonding with ultra-short assembly cycle times. Optimized bonding conditions and resulting cross-sections with BNUF and NCP, respectively, are shown in Fig. 5. For assemblies with BNUF, an initial pressure of 40MPa was applied to ensure penetration of the Cu pillars in the underfill layer and bump-to-pad contact. The pressure was then reduced to 1.8MPa close to the melting point of the solder to control its collapse. For assemblies with NCP, an additional step plateauing at 5.4MPa was introduced until the temperature reached the NCP low-viscosity point. This step was optimized to reduce filler entrapment, a major challenge of pre-applied materials with high filler content. The curing kinetics of pre-applied underfills is highly dependent on the heating rate imposed by the TC bonder. The underfill gelation point indeed shifts towards higher temperatures with higher heating rates. In TC bonding with

Figure 4. Depth XPS analysis of EP-A and EP-B surfaces after reflow at 200oC peak temperature for 1min.

Figure 3. Solder wettability evaluation on EPAG-A with (a) contact angle measurements, (b) solder sessile drop test sample, and (c) surface roughness measurement by atomic force microscope (AFM). (d) Summary of contact angle, ratio of wetted area, and surface roughness measurements for all finishes.

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pre-applied materials, assembly profiles thus have to be designed with considerations of the underfill curing kinetics for better control of the solder collapse. Solder overwetting on the landing pads, as well as the Cu pillar sidewalls, was observed with BNUF, due to its slow curing kinetics, resulting in insufficient solder confinement. In contrast, ideal solder collapse was successfully achieved with snap-cure NCP. The latter process was therefore applied to build assemblies for high-temperature storage and thermomechanical reliability testing. However, the NCP material used in this study was designed for high-volume manufacturing with much higher heating rates than the 2K/s achievable with the employed lab-scale tool. Lower flowability of the NCP material during the TC process was thus expected, with subsequent risk of filler entrapment, as illustrated in Fig. 6.

Figure 5. Thermocompression bonding profiles and resulting

cross-sections with different pre-applied underfill materials: BNUF and NCP (Namics Corp.).

B. High-temperature Storage Test To study interfacial reactions with the different surface

finishes, assemblies were built with each finish composition and subjected to high-temperature storage (HTS) at 150oC. The assemblies were then cross-sectioned by mechanical polishing right after assembly, and after 100h and 500h of thermal aging. The Cu pillar interconnections were then observed with a FE-SEM Hitachi SU8230 microscope equipped with X-ray Energy Dispersive Spectroscopy (XEDS). SEM backscattered electron images (BEI) of the Cu pillar joints through HTS are shown in Fig. 6.

In ENEPIG assemblies, a continuous layer of (Au, Pd, Ni)Sn4 with 3.8 atomic percent (at%) of Ni precipitated at the interface between (Cu, Ni, Au)6Sn5 and solder during assembly. Although the presence of an infinite Cu supply, here provided by the Cu pillars, has been suggested to inhibit Au embrittlement [14], a serious precipitation of (Au, Pd)Sn4 was still observed. After thermal aging for 100h, all the initially scattered intermetallics relocated into the continuous (Au, Pd, Ni)Sn4 layer due to thermodynamic stabilization [15]. Since (Au, Pd, Ni)Sn4 can continuously form from the Ni supply only, even after full consumption of the Au and Pd contained in ENEPIG [16], a more significant amount of (Au,

Pd, Ni)Sn4 was found after thermal aging. This (Au, Pd, Ni)Sn4 layer then acted as a barrier impeding interdiffusion between solder and copper from the substrate interface. Consequently, the (Cu, Ni, Au)6Sn5 layer present at the Cu pillar interface was gradually replaced by (Cu, Ni)3Sn due to the lack of Sn source through 500h of HTS. At the substrate Ni interface, (Cu, Ni, Au)6Sn5 was initially formed during assembly, resulting from a shift of the thermodynamic equilibrium to the two-phase field, (Cu, Ni)6Sn5 + Sn, initiated by the saturated concentration of Cu. After 100h of thermal aging, (Ni, Cu)3Sn4 started to form due to the blockage of the Cu supply from the substrate pads by the continuous (Au, Pd, Ni)Sn4 layer.

With the as-bonded specimens, PdSn4 or (Au, Pd)Sn4 was found in EPs and EPAG-B, respectively. Assuming all the Pd and Au were dissolved into the solder immediately after reaching the melt point of solder, the corresponding concentration of 50nm-thick Au is 0.9 at%, 0.78 at% for 50nm-thick Pd, and 1.56 at% for 100nm-thick Pd. Considering the binary phase diagrams, those compositions are landed in the two phase field, in which the solvus line between two phase field and Sn is critical for applying the supersaturation mechanism.

In as-bonded EP-A and -B assemblies, a significant amount of PdSn4 was found, since most of the Pd atoms were forced to precipitate during the assembly cool-down phase, at temperatures below the Sn-Pd eutectic point of 230oC. In contrast, the Pd-rich (Pd0.84, Au0.16)Sn4 phase was observed in EPAG-B as-bonded assemblies instead of the Au-rich (Aux, Pd1-x)Sn4 phase, which indicates that the role of Pd in the interfacial reaction prevailed in the gold embrittlement mechanism. Solubility of Pd in Sn is relatively low at the 231oC Sn-Pd eutectic point [17], in which the eutectic Sn-Pd composition actually dominates the overall solder composition. Subsequently, more (Pd0.84, Au0.16)Sn4 can form from the eutectic composition. In contrast, the solvus line between Sn and the two-phase field imposes a maximum Au solubility of 0.4 at% in Sn-Au system at 220oC [18]. Consequently, when reaching the Sn-Au eutectic point, more Au atoms can remain in Sn, which results in lesser proportion of the Sn-Au eutectic composition compared to the Sn-Pd. Therefore, AuSn4 was not the primary phase found in EPAG-B assemblies but the (Pd0.84, Au0.16)Sn4 one, which is dominated by the Pd-Sn reaction.

The key role Pd, and not Au, plays in gold embrittlement is furthered in the presence of Cu6Sn5. As previously mentioned, a sufficient Cu supply can effectively prevent gold embrittlement caused by AuSn4, as the (Cu, Au)6Sn5 phase can act as a Au reservoir up to 24.3 at% [18, 19]. However, the solubility of Pd in (Cu, Pd)6Sn5 is limited to less than 1 at% [20]. With EPAG finishes, the Au atoms can remain in the unreacted solder as well as in the observed (Cu, Au, Pd)6Sn5 phase with 7.4±0.7 Au at%.

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This inhibits massive AuSn4 precipitates. However, Pd has limited solubility in Sn and (Cu, Au, Pd)6Sn5, leading to formation of PdSn4 in large quantities with EP finishes, and of the Pd-rich (Pd0.84, Au0.16)Sn4 in EPAG-B assemblies. In both cases, PdSn4 or (Pd, Au)Sn4 started coarsening during thermal aging. The PdSn4 and (Pd, Au)Sn4 layers were found located near the center of the reacted layer after 500h of thermal aging. This can be explained by analogy to the mechanism reported in a 3D-IC Ag-Sn stack-up, in which the Ag3Sn phase was found located in the central region of the Ni3Sn4 phase after 528h of thermal aging [21]. In the present study, the Pd atoms within the existing PdSn4 phase tended to dissolve back into the solder as the growing front of (Cu, Au, Pd)6Sn5 progressed. The Pd concentration in residual solder kept increasing until it finally precipitated in the central region of (Cu, Au, Pd)6Sn5 in the PdSn4 form. Pd atoms also dominated the precipitation in assemblies with EPAG finishes, with similar preferred locations than with EP finishes.

In this research, gold embrittlement is most sensitive to the Pd concentration. Introduction of Cu to form (Cu, Au)6Sn5 can prevent formation of AuSn4 but not of (Pd, Au)Sn4. Interestingly, the EP-A finish’ 50nm-thick Pd layer induces massive PdSn4 precipitates, while (Pd, Au)Sn4 was completely suppressed when this same Pd layer is covered with an additional 50nm-thick Au layer, as in EPAG-A. In the case of EPAG-B, where the same 50nm-thick Au layer was overlaid on a thicker 100nm Pd layer, the (Pd, Au)Sn4 phase reemerged. These findings indicate that with extremely limited solder volumes, 6-7μm in height after assembly, a specific ratio of Au/Pd could effectively stabilize the reacted interface by formation of (Cu, Au, Pd)6Sn5. The fundamental mechanism is still not fully understood but based on thermodynamics and published prior art, Au and Pd atoms

show a high inclination of coupling to reduce the overall Gibbs’ free energy [22-23]. Once Pd atoms tend to be deactivated by Au atoms, formation of (Pd, Au)Sn4 is possibly suppressed. A specific Au/Pd ratio is required for this coupling effect to occur, as shown with the EPAG-B finish where Au atoms are not sufficient to stabilize all the Pd atoms, some remaining available for PdSn4 formation.

The XEDS mappings of the assemblies after 500h of thermal aging are shown in Fig. 7. The continuous (Au, Pd, Ni)Sn4 effectively hindered interdiffusion across the connected layer, and some solder remained unreacted after aging. With EP finishes, highly concentrated Pd indicated PdSn4 precipitation near the interface. Similarly, Pd-rich precipitation of (Pd, Au)Sn4 was observed with EPAG-B. With the optimal EPAG-A composition of 50nm Pd/50nm Au, a uniform layer of (Cu, Pd, Au)6Sn5 was formed with no

Figure 7. XEDS mappings after 500h of high-temperature

storage at 150oC.

Figure 6. Cross-sections of assemblies on different finishes: as-bonded, and after 100h and 500h of HTS at 150oC.

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sign of gold embrittlement. Thermomechanical reliability was then studied to confirm the effect of these interfacial reactions on the fatigue life of the resulting interconnections.

V. RELIABILITY EVALUATION

A. Die-shear Test

Die-shear testing was carried out following the MIL-STD-883G Method 2019.7, using a Dage-Series-400 bond tester with a die-shear cartridge of 10 kgf. The speed of the shear tool was set to 16.0μm/s with a tool height of 5μm from the substrate. Assemblies without underfill were used in this study to directly qualify the bonding strength of Cu pillar interconnections formed on the investigated surface finishes. Twelve samples were built for each surface finish. Shear-strength values in MPa were derived from the maximum loading (kgf) measured right before failure, considering the designed bump diameter and I/O count.

The results are summarized in Fig. 8(a). Average shear strengths of 5.96MPa and 11.23MPa were achieved with EP-A and EP-B, respectively, which can be attributed to the proportionally smaller bonded interface due to limited solder wettability, as well as to the precipitation of brittle, rod-like PdSn4 intermetallic. Extremely low shear strength of 4.95MPa on average was measured with ENEPIG. SEM images of the sheared surfaces are shown in Fig. 8(a, c), in which cracks were initiated from the left side of the joints with a brittle fracture pattern. The crack then propagated in a ductile fracture pattern towards the right side. Characterization of the cracks by BEI and XEDS confirmed their initiation at the interface between the continuous (Au, Pd, Ni)Sn4 layer and (Cu, Ni, Au)6Sn5. Application of ENEPIG is therefore limited when considering ultra-short Cu pillar bumps with limited solder volume.

The highest shear strength of 40.4MPa was measured with the novel EPAG-A surface finish, and is within expected reported values for solder interconnections, in the 30-60MPa range [24-25]. This improvement in shear strength was provided by the unique interfacial reaction that led to joints composed of (Cu, Au, Pd)6Sn5 and solder exclusively, without any intermetallics causing gold embrittlement. B. Thermomechanical Reliability Evaluation

To evaluate the effect of surface finish on thermomechanical reliability of Cu pillar assemblies, silicon daisy-chain test dies were mounted onto FR-4 test substrates. Four samples were built for each surface finish, with a total of 64 measurable daisy chains per variation.

The test assemblies were subjected to liquid-to-liquid thermal shock test at -55oC / 125oC with a rate of 2 cycles per hour. The daisy chain electrical resistances were monitored up to 300 cycles with a 20% increase in as-bonded resistance used as failure criterion. The test assemblies with average assembly yield are shown in Fig. 9(a). Due to the large mismatch in coefficient of thermal expansions (CTE) of silicon and FR-4 with CTEs of 2.56 and 17.5 ppm/K, respectively, high stress levels concentrated at the intermetallic interfaces and high plastic strains are expected in the solder due to the discontinuity in material properties.

To estimate the fatigue life of Cu pillar interconnections in this package configuration, a 2D finite element model (FEM) was built in ANSYS following the test vehicle design. Considering the solder collapse observed in cross-sectioned assemblies, a solder height of 6μm instead of the initial 10μm was implemented. Intermetallics were disregarded at this time to simplify the model. The increment in equivalent plastic strain over a thermal shock cycle in the solder was extracted on an element average basis. The estimated number of cycles to failure was then calculated using the Coffin-Manson fatigue model for the solder [26]. An accumulated plastic strain of 0.048 over a thermal cycle was derived, corresponding to a fatigue life of about 500 cycles. The daisy chain resistances of all tested assemblies monitored through 300 thermal shock cycles are plotted in Fig. 9(b). Predictably, the same trends reported for die shear testing remain for thermomechanical reliability.

All daisy chains of ENEPIG assemblies failed after the first 200 cycles. The EP and EPAG-B finishes showed similar, improved reliability. The highest reliability was achieved with the EPAG-A finish, with a decrease in assembly yield from 84.4% to 72.4% after 300 cycles. Shorter lifetimes than predicted by FEM were experienced. This can be explained by the non-consideration of intermetallics that practically increase interfacial stresses in the model, as well as entrapment of fillers from the NCP material in the solder, introducing initial defects which degrade reliability.

Based on die shear and thermal shock tests, it is clear that conventional ENEPIG surface finish can no longer meet reliability standards at fine pitch due to the increasing risk of (Au, Pd, Ni)Sn4 precipitation. The new EPAG-A finish, composed of 50nm Au and 50nm Pd, is a promising low-cost alternative for superior joint strength and thermomechanical reliability of ultra-short Cu pillar interconnections.

Figure 8. (a) Comprehensive shear strength evaluation with

surface finish variations, (b)(c) Top views of the sheared surfaces with ENEPIG finish.

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Figure 9. (a) The picture of assembled specimens and

corresponding as-bonded yield, and (b) The electrical resistance monitored till 300 thermal shock cycles

VI. CONCLUSIONS

A new surface finish, electroless palladium autocatalytic gold (EPAG), was evaluated for application to high-performance packaging with high-density wiring at less than 10μm interconnect pitch and bump pitches below 20μm. A comprehensive study, including characterization of solder wettability and interfacial reactions, as well as die shear and thermal shock tests, was carried out on EPAG and EP finishes to optimize their composition to achieve highly-reliable, fine-pitch, ultra-short Cu pillar assemblies. Standard ENEPIG finish was used as benchmark. Ideal solder wettability was achieved on EPAG and ENEPIG finishes, exceeding that on EP finish, which was found strongly dependent on the Pd thickness. A TC-NCP assembly process was designed and optimized to minimize filler entrapment. Assemblies formed with optimal bonding conditions were subjected to 500h of high-temperature storage at 150oC to better understand interfacial reactions.

The precipitation of a continuous layer of (Au,Ni,Pd)Sn4 was observed with ENEPIG, with severe gold embrittlement even in the presence of an infinite Cu supply. In assemblies with EP and EPAG-B finishes, PdSn4 and Pd-rich (Pd, Au)Sn4 phases were identified, respectively, indicating that Pd dominates the gold embrittlement mechanism with limited solder volume. In contrast, a unique interfacial reaction occurred with the EPAG-A finish, with formation of joints composed of a single intermetallic, (Cu, Au, Pd)6Sn5, successfully inhibiting gold embrittlement. The interconnection microstructure, resulting from the unique interfacial reactions between solder and surface finish, also

controls the joints’s strength and fatigue life, more so as the solder volume is reduced. The EPAG-A composition subsequently exhibited the highest die shear strength with a 40.5MPa average, and superior thermomechanical reliability, surviving over 300 thermal cycles with a thick organic package. The EPAG-A finish with 50nm Au and Pd, thicknesses has thus been demonstrated as a promising low-cost alternative for highly-reliable, ultra-short Cu pillar interconnections required for advanced packaging solutions, with improved electrical performance.

ACKNOWLEDGMENT

This study was supported by the Interconnections and Assembly industry program at the 3D Systems Packaging Research Center (PRC), Georgia Institute of Technology. The author would like to thank Namics Corporation for their pre-applied underfill material, Atotech GmbH for their support of surface finish processing, and Gaëtan Delétoille for contributing to this study during his internship. The authors would also like to thank the administrative and research staff at the PRC for their help in this research project.

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