Abstract The design of frequency-tunable amplifiers is investigated and the trade-off between linearity, efficiency and tunability is revealed. Several tunable amplifiersusing various varactor diode topologies as tunable devices are designed by using load-pull techniques and their performances are compared. The amplifier using anti-seriesdistortion-free varactor stack topology achieves 38% power added efficiency and itmay be tuned from 1.74 to 2.36 GHz (about 35% tunable range). The amplifier usinganti-series/anti-parallel topology is tunable from 1.74 to 2.14 GHz (about 23% tun-able range) and provides 42% power added efficiency. It is demonstrated that tunableamplifiers using distortion-free varactor stack topologies provide better power addedefficiency than the tunable amplifiers using reverse biased varactor diodes and theirlinearity is similar to that of a conventional amplifier. These amplifiers may facili-tate the realization of frequency agile radio frequency transceiver front-ends and mayreplace several parallel connected amplifiers used in conventional multimode radios.
Keywords Amplifiers · Tunable amplifiers · Impedance matching · Reconfigurablematching networks · Reconfigurable radio · Software defined radio
1 Introduction
The objective of Software Defined Radio (SDR) is to provide a flexible radio that iscapable of operating over a continuously evolving set of communication standards.
This work was initiated at University of Bristol within a Toshiba Research Europe Ltd. project. Muchof the work reported here was carried out at Middle East Technical University, Northern CyprusCampus (METU-NCC) and funded by the Scientific and Technical Research Council of Turkey(TUBITAK) under the project code 110E105 and partly funded by the METU-NCC under the projectcode FEN-1.
T. Nesimoglu (�)Middle East Technical University, Northern Cyprus Campus, Kalkanli, Guzelyurt, Mersin 10, Turkeye-mail: [email protected]
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Fig. 1 Uplink and downlink frequencies of commercial communications standards between 870 MHzand 2.5 GHz. The Digital Audio Broadcasting (DAB), Global Positioning System (GPS) and Galileo havedownlink receive frequencies only. The lowest frequency of uplink transmission is Extended-Global Sys-tem for Mobile communications (E-GSM) at 876 MHz
Within a SDR transceiver there is bound to be a requirement for an amplifier that cansupport the multitude of standards that are currently in use and those standards thatmay be introduced in the future. Conventional multimode mobile equipment use up tosix amplifiers connected in parallel [10] to accommodate communication standardsbetween 0.9–2.5 GHz (see Fig. 1). These amplifier architectures increase the cost,size and weight of mobile equipment. Furthermore, radios using amplifiers with pre-determined frequency bands of operation cannot accommodate standards that maybe introduced in the future. Using broadband amplifiers may be considered as thesimplest solution to this problem. However, broadband matching networks introducehigher loss compared to narrowband matching networks and thus broadband ampli-fiers offer lower power gain and efficiency than narrowband amplifiers [27]. In areceiver application, a broadband low-noise amplifier may amplify high level inter-ferers that could not be rejected by the radio frequency (RF) front-end filter and maydrive the following non-linear components, such as mixers, to saturation and thus addin-band interference to a nearby wanted signal [16, 23, 24]. Therefore, narrowbandfrequency-tunable RF amplifiers may enhance the performance of reconfigurable andmultimode radios since channelization will be initiated early at the RF front-end.
This paper suggests using narrowband frequency tunable amplifiers to achievethe broad frequency coverage that is required for reconfigurable and multimode ra-dios. It investigates the design of frequency-tunable amplifiers using various varactordiode topologies and the impact of employing tunable matching networks on poweradded efficiency (PAE) and linearity. To the authors’ knowledge, the impact of us-ing tunable matching networks on amplifier efficiency and linearity has not been in-
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vestigated previously. Although there are many tunable matching network designs,[2, 15, 25, 28, 32, 33, 35, 38, 39] examples of complete tunable amplifier modulesare not many [6, 8, 11, 18, 37]. Most of the tunable amplifiers presented in the litera-ture are designed for frequencies between 10–40 GHz and provide up to 10% tunabil-ity. This frequency band of operation and range of tunability is insufficient for the re-alization of the commercial SDR concept. Furthermore, no information was suppliedin [6, 8, 11, 18, 37] regarding the efficiency and linearity of these tunable ampli-fiers. However, it is widely accepted that the linearity and efficiency of RF front-endcomponents are bottlenecks in reconfigurable radio design [16, 36]. The frequencytunable amplifier in [18] is not a voltage controlled tunable amplifier. Its frequencyof operation is set by using metal-insulator-metal interconnections at manufacturing.The frequency tunable amplifier in [11] achieve tunability by switching distributedcomponents in the matching networks in/out by using switching devices such as mi-cro electromechanical systems (MEMS) and achieves tunability in frequency steps.In some amplifier designs, MEMS [30] and varactor diode [14] based tunable match-ing networks were used to vary the load impedance presented to the transistor withthe objective of enhancing the efficiency and linearity performance of the amplifiermodule.
Distortion-free varactor stack (DFVS) topologies were first proposed by R.G.Meyer et al. to achieve tunable capacitive elements and matching networks thatare highly linear and low-loss [17]. These topologies were investigated further byT. Sasaki et al. [31] and C. Huang et al. [3, 4, 13] and it has been demonstrated thatby correct choice of components they may be useful for RF applications. The anti-series (AS) DFVS topology was used in [22] to realize a multiband amplifier, but nocomparison was made between the performances of tunable amplifiers using differentvaractor diode topologies.
In this work, several tunable amplifiers are designed by using load-pull techniquesand their efficiency, tunability and linearity are compared. The objective is to designan amplifier that can achieve continuous tunability across a broad bandwidth by usingcurrent technology and to identify the tunable amplifier topology that can provide thebest trade-off between efficiency, tunability and linearity. The details of these designsare given in the following sections.
2 Conventional Amplifier Design
Load-pull analysis determines the impedance that should be presented to the inputand output ports of a transistor to achieve a target specification [7]. The load-pullsimulations are performed in Advanced Design System (ADS) [1] from 0.5 to 6 GHzin 500 MHz steps using a two-tone sinusoidal drive signal to a MicroWave Technol-ogy MWT-871 transistor [20]. The measurement based model of MWT-871 is avail-able in ADS transistor library. The transistor biasing is optimized in a DC-simulationset-up for maximum power added efficiency (PAE) and the bias voltages are set asVDD = 4.8 V and VGS = −2.8 V.
The PAE is a good practical metric for quantifying the efficiency of amplifiersbecause it takes account of the RF input power applied to the amplifier. The PAE, is
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defined as the ratio of the difference between the output and input powers (Pout −Pin)
to the DC-bias power, given by the product of the DC-bias voltage VDD and currentIDD (1).
ηPAE = Pout − Pin
VDDIDD(1)
The delivered output power (Pdel), PAE, third (IM3) and fifth-order intermodula-tion (IM5) contours obtained by load-pull simulation at 2 GHz are shown in Fig. 2.The contour step size is 1 dB for Pdel, 3% for PAE and 3 dB for IM3 and IM5.Marker-1 (m1) shows the impedance required from the output matching networkto achieve maximum PAE, m2 shows the impedance required to maximize Pdel,m4 shows the impedance required to minimize IM3 and m5 shows the impedancerequired to minimize IM5. From Fig. 2, it can be seen that the impedances requiredfrom the output matching network to provide maximum PAE (61.38%) and minimumIM3 (−28.22 dBc) are significantly different from each other, thus achieving a highefficiency together with high linearity by using the same matching network is notpossible [12]. The lower the IM3, the lower the delivered output signal power, thusthe DC power consumption of the amplifier becomes more comparable to the differ-ence between input and output power as shown in (1) and the PAE of the amplifier isreduced at linear regions of operation. Load-pull analysis validates that linearity andefficiency are contradicting trade-off metrics; achieving one without compromisingthe other is a challenging task for the RF designer and requires the use of linearizationand transmitter design techniques [29]. The optimum PAE, Pdel, IM3 and IM5 valuesthat can be achieved by MWT-871 from 0.5 to 6 GHz are obtained by load-pull anal-ysis and summarized in Fig. 3 as a function of frequency. Between 1.5–2.5 GHz thetransistor provides the highest PAE. This frequency band is important for commercialcommunication systems, especially around 1.8 GHz there are several communicationstandards (see Fig. 1).
The schematic of the conventional amplifier is shown in Fig. 4. The output and in-put matching networks are designed by load and source-pull techniques, respectively,to maximize PAE at 1.8 GHz. A low-loss high frequency laminate (GIL Technologies,GML1000) [26] is selected as the substrate material in order to reduce the insertionloss through the matching networks. The measurement based ADS models of thelumped components are used in these simulations, where Murata GQM-1885 seriescapacitors and LQW-18A series inductors are selected due to their high Q-factorsand low effective series resistances [19]. The amplifier can provide up to 60% PAE(see Fig. 5), 22.5 dBm output power and about 12.5 dB gain (see Fig. 6). In Fig. 5,the PAE of the conventional amplifier is shown as a function of input power andcompared to those of the tunable amplifiers. The IM3 and IM5 distortion character-istics of the conventional amplifier and those of the tunable amplifiers are comparedin Fig. 7 as a function input power. The tunable amplifier designs are presented andtheir performances are discussed in the coming sections.
3 State-of-the-Art in Tunable Device Technology
There is a large amount of information on the physical properties, manufacturingand packaging techniques as well as types of materials that can be used for real-
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Fig. 3 Optimum PAE, Pdel, IM3 and IM5 values that can be delivered by MWT-871 from 0.5 to 6 GHz
Fig. 4 The hierarchical amplifier schematic with input and output matching networks
izing tunable circuit components. Here, a brief overview of PN-junctions (varactordiodes), MEMS and ferroelectric thin-film Barium Strontium Titanate (BST) devicesis carried out. Table 1 compares the characteristics of tunable capacitors that are con-structed using these technologies. It must be noted that there are many trade-offs ineach device technology. For example; the linearity of a BST capacitor can be in-creased by using a thicker thin-film but this increases the control voltage. By usinga smaller diode area, the Q-factor of a varactor can be increased at the expense of asmaller tuning range. The DC-bias voltage of an RF-MEMS capacitor can be reduced
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Fig. 5 The PAE of the conventional amplifier compared to those of the tunable amplifiers as a function ofinput power
Fig. 6 S-parameters of theconventional amplifier
by lowering the suspended metal plate but this also lowers the self actuation voltagewhich degrades the reliability and linearity of the device.
Although RF-MEMS and BST capacitors have attractive features like high lin-earity and high Q, the control voltage of these devices are much higher than that ofvaractor diodes. Also obtaining off-the-shelf RF-MEMS and BST devices is difficult.Therefore, varactor diodes are still attractive for realizing tunable matching networks.Semiconductor based devices have some drawbacks such as poor linearity and low Q,thus a number of varactor diode topologies are proposed in [17, 31] in order to over-
712 Circuits Syst Signal Process (2011) 30:705–720
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Table 1 Summary of capacitor characteristics using a number of device technologies
Comments Proven technology, Reliability problems, Reliable but difficult tooff the shelf components difficult to obtain obtain off the shelf devicesare available off the shelf devices
Fig. 8 Tunable output matching network using: (a) A single diode, (b) Dual diodes
come the limitations these may introduce. In this work, these topologies are used indesigning tunable amplifier modules and their performances are compared.
4 Tunable Amplifiers using Reverse Biased Varactor Diode Topologies
In tunable amplifier designs, Skyworks SMV-1245 [34] hyper-abrupt junction GaAsvaractor diodes are used as tunable devices. The ADS model of the diode that alsoincludes packaging parasitics is constructed by using the SPICE model provided inthe manufacturers’ data-sheet.
4.1 Tunable Amplifier using a Single Reverse Biased Diode
In the most basic tunable amplifier design, the open-circuit stubs of both input andoutput matching networks are terminated with a single reverse biased varactor diode.In Fig. 8(a), only the output matching network is shown but the input matching net-work also uses the same varactor topology. The matching networks are designedby load and source-pull techniques to maximize PAE, but the insertion loss of bothmatching networks are higher than that of conventional matching networks by about
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Fig. 9 S-parameters of thetunable amplifier using a singlediode
0.4 dB. For example the insertion loss of the output matching network increases from0.56 to 0.96 dB at 1.8 GHz when the diode is connected.
As shown in Fig. 9, this tunable amplifier can be tuned from 1.74 to 1.92 GHz, i.e.180 MHz (10.34% tunability). This is achieved by sweeping the reverse bias controlvoltage (VCC) from 0 to 12 V in steps of 2 V. As shown in Fig. 5, the tunable amplifierachieves up to 36% PAE. Compared to the conventional amplifier that is not tunable,24% PAE is compromised for tunability. An additional insertion loss of 0.4 dB wouldbe regarded as negligible in a filter application. Tunable filters introduce about 9 dBinsertion loss and as they are tuned this may increase up to 12 dB [5, 9, 21]. Here it isshown that in an amplifier application, a small increase in insertion loss at input andoutput matching networks has a significant impact on the PAE.
The IM3 of this tunable amplifier is lower than that of the conventional ampli-fier by about 5 dB at backed-off operation (see Fig. 7(a)). As the tunable amplifieris driven closer to saturation it provides about 5 dB higher IM3 than the conven-tional amplifier. Its IM5 is the lowest among the tunable amplifiers and better thatof the conventional amplifier (see Fig. 7(b)). When a system is made of cascadedstages of non-linear components, it is difficult to predict the cumulative non-linearityof the system by investigating the linearity of each stage independently. Here, thetransistor is post-and-predistorted by the non-linear tunable output and input match-ing networks, respectively. Therefore, the linearity of a tunable amplifier should beinvestigated by analyzing the complete system.
4.2 Tunable Amplifier using Dual Reverse Biased Diodes
Increasing the number of the reverse biased diodes in the matching networks (seeFig. 8(b)) improves the insertion loss slightly. The parasitic resistance and inductanceof each diode are in parallel, which means cumulative parasitics at the end of the stubsare reduced. The insertion loss of the output matching network using a single diodereduces from 0.96 to 0.84 dB when the second diode is connected.
As shown in Fig. 10, the tunable amplifier using dual diode architecture can betuned from 1.7 to 1.9 GHz, i.e. 200 MHz (11.76% tunability), by sweeping the VCCfrom 0 to 24 V in steps of 4 V. The tunability of this amplifier is slightly larger than
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Fig. 10 S-parameters of thetunable amplifier using dualdiodes
that of the amplifier using a single reverse biased diode. As shown in Fig. 5, thistunable amplifier provides up to 39% PAE. Compared to the tunable amplifier usinga single reverse biased diode, the PAE penalty paid for tunability is reduced by 3%.Therefore, using multiple diodes improves tunability and PAE only slightly whereasthe control voltage requirement increases in proportion with the number of the diodes.The IM3 of this tunable amplifier is better than that of the tunable amplifier usingsingle reverse biased diode, but it generates slightly larger IM5 (see Fig. 7).
5 Tunable Amplifiers Using Distortion-Free Varactor Stack Topologies
The results obtained from tunable amplifiers using reverse biased varactor diodetopologies have shown that adding tunability property to an amplifier may reducethe PAE by as much as 24%. In this section, tunable amplifiers using AS and anti-series/anti-parallel (AS/AP) DFVS topologies are presented and their performancesare compared against the conventional amplifier and other tunable amplifiers usingreverse biased diodes.
The capacitance of a single varactor diode can be expressed as
Cj (V ) = C0[1 − V
φ
]M (2)
where C0 is the zero bias capacitance, φ is the built-in voltage, i.e. between 0.58 and0.85 V for GaAs Schottky barriers and about 0.7 V for silicon PN junctions. M isthe grading coefficient, which is 0.5 for an abrupt (step) junction, 0.3 for a gradual(linearly graded) junction and 1.5 for hyper-abrupt junction diodes.
It is shown that theoretically AS connection of varactor diodes (see Fig. 11(a))generates no IM3 when M = 0.5 and reduces IM3 for diodes with M > 0.5 [3]. TheAS/AP connection of varactor diodes (see Fig. 11(b)) reduces second (IM2) and third-order distortion when M > 0.5. However, complete cancellation of IM2 and IM3requires specific values of M for different size diode area ratios of s (s = DB/DA);cancellation of IM3 can only occur for diodes with M ≥ 0.5.
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Fig. 12 The tunable amplifierlayout showing the top layer(copper) and the surface mountcomponents
The diode (Skyworks SMV-1245) used in this work is a hyper-abrupt varactordiode with M = 1.7, therefore it is suitable for use in DFVS architectures. The linearcapacitance of the AS and AS/AP topologies is identical, i.e. in theory; the tuningrange does not improve or degrade with the number of the sections.
5.1 Tunable Amplifier using Anti-series Distortion-free Varactor Stack Topology
The output matching network using the AS-DFVS topology is realized in ADS asshown in Fig. 11(a). The input matching network also uses the same topology andboth matching networks are designed by load and source-pull techniques to achievemaximum PAE from the amplifier. Figure 12 shows the amplifier printed circuit board(PCB) layout with the top layer copper and surface mount components.
The amplifier can be tuned from 1.74 to 2.36 GHz (see Fig. 13), i.e. 620 MHz(35.63% tunability), which is a significant improvement over the tunable amplifiersusing reverse biased diode topologies. This tunability is achieved by sweeping the
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Fig. 13 S-parameters of thetunable amplifier usingAS-DFVS topology
VCC from 0 to 12 V, which is the same control voltage required with a single re-verse biased diode. This tunable amplifier may be used for Digital Cellular Ser-vice (DCS-1800), Personal Communications Service (PCS-1900), Digital EnhancedCordless Telecommunications (DECT), Universal Mobile Telecommunication Sys-tem (UMTS), Bluetooth and Wireless Local Area Network (WLAN) 802.11b/g (seeFig. 1). As shown in Fig. 5, it provides up to 38% PAE. Therefore, using AS-DFVStopology achieves a significant increase in the tunability without increasing the con-trol voltage requirement and the PAE of the amplifier is similar to that of the amplifierusing dual reverse biased diodes (see Fig. 8(b)). It introduces the highest IM3 (seeFig. 7(a)) among the tunable amplifiers and has similar linearity to the conventionalamplifier at large input signal levels.
5.2 Tunable Amplifier Using Anti-Series/Anti-Parallel Distortion-Free VaractorStack Topology
The output matching network using AS/AP-DFVS topology is shown in Fig. 11(b).The input matching network uses the same topology and both networks are designedby load and source-pull techniques to maximize PAE.
The amplifier can be tuned from 1.74 to 2.14 GHz (see Fig. 14), i.e. 400 MHz(22.98% tunability) by sweeping the VCC from 0 to 12 V. As shown in Fig. 5, it pro-vides up to 42% PAE, which the highest PAE achieved among the tunable amplifiers.This amplifier may be used for DCS-1800, PCS-1900, DECT and UMTS. The tun-ing range is significantly larger than that of the amplifiers using reverse biased diodetopologies but smaller than that of the amplifier using AS-DFVS topology. At largeinput signal levels its IM3 is only slightly worse than that of the conventional ampli-fier. It also generates the lowest IM5 at large input signal levels compared to the otheramplifiers.
6 Conclusion
It has been demonstrated that adding tunability property to an amplifier by usingvaractor diodes may result in a significant reduction of PAE. The tunable amplifiers
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Fig. 14 S-parameters of thetunable amplifier usingAS/AP-DFVS topology
Table 2 Summary of amplifier performances
Amplifier PAE Tunability Control Supported communication standard(s)
using reverse biased diode topologies achieved up to 11.76% tunability (1.7 to 1.9GHz) and 36% PAE, i.e. 24% lower PAE than the conventional amplifier. It is shownthat DFVS topologies are superior to reverse biased diode topologies in terms oftunability and PAE in a tunable amplifier application. The largest tunability of 35.63%(1.74 to 2.36 GHz) is achieved by the amplifier using AS-DFVS topology which gave38% PAE. This range of tunability is considerably larger than that of other tunableamplifiers recorded in the literature. The tunable amplifier using AS/AP-DFVS hasprovided a good trade-off between tunability and PAE. It achieved a tunability of22% (1.74 to 2.14 GHz) and gave 42% PAE. The linearity of the amplifier usingAS/AP-DFVS topology is generally better than that of other amplifiers at large inputsignal drive levels and only slightly worse than that of conventional amplifier. Theperformances of conventional and tunable amplifiers are summarized in Table 2.
The tunable amplifiers using DFVS topologies may replace parallel connectedamplifiers used in multimode radios. Furthermore, they may be tuned continuouslywithin a frequency range rather than switching between predetermined frequency
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bands. This enables them to accommodate communication standards that may beintroduced in the future and facilitate the design of a SDR.
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