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Design and Implementation of AMBA ASB-APB Bridge for ARM SOCs
by
Department of Electronics & Communication Engineering
BNM Institute of Technology
Manu B.N1BG11LVS09
Guide : Prabhavathi PPhase 3 Seminar
ASB APB Bridge 2
AGENDA Introduction Aim of The Project Specifications Project Flow Implementation & Simulation Results Project Progress Conferences/Paper Presentations Future Enhancements Conclusions References Q & A
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ASB APB Bridge 3
Introduction To AMBA On chip communication standard Technology Independent High reusability
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ASB APB Bridge 4
Aim of The Project
B R I D G E
ASB APB
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ASB APB Bridge 5
Specifications
32 bit address bus 32 bit data bus 50 MHz bus clock Decode and without decode cycles
HDL Language : VerilogTool : XILINX ISE 13.2Target Device : SPARTAN 3E
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ASB APB Bridge 6
Project Flow
The project flow involves designing and implementing the following blocks:
ASB Arbiter ASB Decoder Reset Controller APB Bridge Remap and Pause Controller
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Implementation and Simulation Results
1) ASB Arbiter : The ASB arbiter has 4 requests and 4 corresponding grants. The default bus master is AREQtic. The priorities assigned are as follows:
SL.No Requests: Grants :
1) AREQtic AGNT[3]
2) AREQ1 AGNT[2]
3) AREQ2 AGNT[1]
4) AREQarm AGNT[0]
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ASB APB Bridge 8
Implementation and Simulation Results Continued..
Arbiter Block:
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ArbiterLogic.docx
ASB APB Bridge 9
Implementation and Simulation Results Continued..
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ARBITER GRANTS
ARBITER REQUESTS
LOCKED TRANSFER
ASB APB Bridge 10
Implementation and Simulation Results Continued..
2) Decoder :
● Without Decode Cycles ● With Decode Cycles
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With Decode Cycles.docxWithout Decode Cycles.docx
ASB APB Bridge 11
Implementation and Simulation Results Continued..
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ASB APB Bridge 12
Implementation and Simulation Results Continued..
Memory Map :
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AMBA ASB Decoder NCRAECE'13 13
Implementation Without Decode Cycles With Decode Cycles
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ST_ADDRESS 00
ST_SLAVE 01
ST_ERROR 10
ST_ADDRESS 00
ST_SLAVE 01
ST_DECODE 10
ST_ERROR 11
ASB APB Bridge 14
Implementation and Simulation Results Continued..
Simulation results without decode cycles:
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Out of Range
Peripheral Bus not selected
ASB APB Bridge 15
Implementation and Simulation Results Continued..
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Simulation results with decode cycles:
Out of Range
Peripheral Bus not selected
Extra State
ASB APB Bridge 16
Implementation and Simulation Results Continued..
3) Reset Controller :
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ASB APB Bridge 17
Implementation and Simulation Results Continued..
Reset Controller State Machine :
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Reset Controller.docx
ASB APB Bridge 18
Implementation and Simulation Results Continued..
Simulation results :
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POWER ON RESET
ACTIVE LOW
RESET
ASB APB Bridge 19
Implementation and Simulation Results Continued..
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4. APB Bridge :
ASB APB Bridge 20
Implementation and Simulation Results Continued..
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APB Bridge state machine :
ST_IDLE 000
ST_READ 001
ST_ENABLE 010
ST_WRITE 010
ST_WWAIT 111
Bridge state.docx
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Implementation and Simulation Results Continued..
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READWRITE
ASB APB Bridge 22
Implementation and Simulation Results Continued..
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5. Remap and Pause Controller:
Remap and Pause.docx
ASB APB Bridge 23
Implementation and Simulation Results Continued..
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WRITEREAD
PERIPHERAL SELECTED
ASB APB Bridge 24
Implementation and Simulation Results Continued..
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Remap Address
Pause Address
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Implementation and Simulation Results Continued..
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Top Module.docx
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Implementation and Simulation Results Continued..
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RESET CONTROLLER APB BRIDGE
DECODER
REMAP & PAUSE
ARBITER
ASB APB Bridge 27
Implementation and Simulation Results Continued..
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GRANTS
REQUESTS
POWER ON RESET
DEFAULT MASTER
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Project Progress
ASB Arbiter ASB Decoder Reset Controller APB Bridge Remap and Pause Controller Integrate all the modules
Synthesis with power, area and timing reports SPARTAN 3E Implementation ChipScope Pro Analysis
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ASB APB Bridge 29
Conferences/Paper Presentations
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• “ Efficient Design and Implementation of AMBA ASB Decoder” at National Conference on Recent Advances in Electronics & Communication Engineering 2013, RNSIT, Bangalore.
• “ Design and Implementation of AMBA ASB APB Bridge” at The International Conference on VLSI, Communication, Advanced devices, Signals & Systems And Networking.
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Conclusions
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AMBA ASB APB Bridge was designed and implemented successfully.
Remap and Pause controller was connected to the APB to verify bridge’s functionality.
Power, area and timing reports were generated for 180nm
Spartan 3E implementation and analysis using ChipScope Pro
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Future Enhancements :
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Common Power Format (CPF) to reduce power consumption.
Optimize area
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References : AMBA Specifications 2.0 , Copyright ARM Limited 1999 ASB Example AMBA System , Technical Reference Manual Design and Implementation of APB Bridge based on AMBA 4.0 by Chenghai Ma and Zhijun Liu Shandong University Jinan,China October 2011 Design of AMBA Based AHB2APB Bridge Vani.R.M and M.Roopa IJCSNS International Journal of Computer Science and Network Security, VOL.10 No.11, November 2010 Arbiters: Design Ideas and Coding Styles Matt Weber Silicon Logic Engineering,Inc.
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Questions ?
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THANK YOU
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