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Design and Technology Solutions for Development of SiGeMEMS devices Tom Flynn Vice President, Sales Coventor
Design and Technology Solutions for
Development of SiGeMEMS devices
Tom Flynn
Vice President, Sales
Coventor
Special thanks to:
Stephane Donnay, Program Manager, imec
Gerold Schropfer, Director, Foundary Programs, Coventor
Raffaella Borzi, Director, Business Development, imec
Contact info: [email protected] and [email protected]
Outline
Introduction
• MEMS and IC, CMORE Technology
MEMS design environment
• Traditional approach and new structured approach to MEMS-IC
• MEMS SiGe Process Design Kit (PDK)
SiGe MEMS resonator example
• Design, simulation and silicon realization
Summary and outlook
About MEMS
• MEMS are micro- or nano-scaled devices typically
comprised of
• Sensing or actuation device
• Integrated electronics
• Disconnect between MEMS and IC design flows
• Leads to long development cycles and high costs
• Minimal design reuse
• imec & Coventor have teamed to address this critical need
SIP: 3D vias MEMS
CMORE SiGeMEMS Technology: 1. MONOLITHIC INTEGRATION WITH IC
Interconnect pitch ~ 50 um
~10um ~10um ~1um
Interconnect
parasitics
few pF >100fF
MEMS processing No thermal
limitations
T-budget
800°C
T-budget
450°C
CMOS Non-standard Non-standard any standard CMOS
Interconnections
MEMS-IC
Peripheral
around MEMS
Peripheral
around MEMS
Distributed &
massively parallel
CMORE SiGeMEMS Technology: 2. MEMS LAST (ABOVE CMOS)
MEMS last:
• most flexible with respect to choice of CMOS technology
• very high-density and massively parallel interconnections possible
enabling large arrays of MEMS (e.g. μmirror arrays)
Different Monolithic
MEMS approaches
MEMS first intraCMOS MEMS last
MEMS
MEMS MEMS MEMS
©SiTime © ADI IMEC Approach
Post CMOS integration yes yes
Fracture strength
[GPa]
0.2 > 2
Mechanical Q low > 10.000
Reliability creep: hinge memory
effect
No creep
CMORE SiGeMEMS Technology: 3. POLY-SiGe
Poly-SiGe:
• better mechanical properties than Al: higher strength and Q factor
• better reliability properties than Al: less creep and fatigue
Different Above CMOS
MEMS approaches
Al Poly-SiGe
© TI
IMEC Approach
CMORE MEMS Technology: 4. FLEXIBLE & MODULAR TECHNOLOGY FLOW
Plug
Mechanical layer (Top - SiGe) Mechanical layer (Bottom - SiGe)
CMOS top metal layer
Electrode (Bottom - SiGe)
Protection layer (SiC)
Capping layer (SiGe) Metal (Al)
Oxide
Electrode (Top - SiGe)
Sacrificial oxide
Sealing
CMOS wafer
Capping layer
Mechanical layer
Electrode layer
Plug
Sealing & connections
Capping & sealing layer
MEMS structural layer
Electrode layer
On top of “any” CMOS
(on 200mm)
Flexible and modular technology:
• Variable layer thicknesses
• Application-specific optimization of layer & material properties
• Application-specific functional add-on layers
Monolithic
Above-IC
SiGe-based
Flexible MEMS technology
Surface micromachining on top of
CMOS: temperature limited
450 oC for Al interconnections
Poly-SiGe deposited at 450 oC
E=140 GPa (60-70 at.% Ge)
Stress = ~0-70 MPa
Strain gradient = ±1 ×10-5/μm
(4 μm thick CVD+PECVD SiGe)
Poly-Si: 620 oC deposition, 800 oC
needed for desired stress
Design Challenge
IC Design and Simulation Tools Device Design and Simulation Tools
• IC designers require an accurate MEMS model for system simulation and layout.
Partnership
• Establish Industry Standard Solution for MEMS and MEMS System Design (MEMS+IC )
• Integration and standardization of a MEMS+IC design flow
• Fabrication access via MEMS process design kits
• Lower risk, improve time-to-market
Industry Eco-System
MEMS Design Platform
CMORE- MEMS
Fabrication Platform
MEMS design environment
MEMS+ with Cadence Virtuoso
Integration with Cadence
Monte-Carlo
and Yield
Analysis
Parasitic
Capacitance
Extraction
Combined
DRC Signoff
MEMS-IC
Simulation
Parametric MEMS+
Design
• MEMS+ takes full advantage of the Cadence Virtuoso custom IC design
environment
MEMS+ Component Library
Process and Material Variables
MEMS is quite different from IC Design
Customized or semi-customized processes are common; e.g., MEMS
designer might be able to change a structural layer thickness within limits
MEMS component models like suspensions, combs and electrodes are
not foundry specific
Varying process and material data are key for PDK usage, e.g. yield
analysis
With the imec/Coventor Solution, all process and material variables are
seamlessly linked to MEMS+ component models
Process Editor
• Captures MEMS process sequence
• Allows to define process variables as design variables (e.g. thickness of layers)
• Directly linked to library models
MEMS+ Process Editor with imec SiGe MEMS process
Material Database Editor
MEMS specific data
• e.g. Young’s modulus, stress etc.
Specific to fab/process
• Measured, calibrated
MEMS+ Material Database for imec SiGe MEMS process
Design example:
SiGe MEMS resonator
MEMS Resonators
Flexural mode resonance • Distributed spring and mass
Extensional mode resonance • Extremely high quality factors
• Slab of material used in “breathing mode”, analogy with EM cavity resonators
SANDIA imec Berkeley
http://www.eecs.berkeley.edu/~ctnguyen/Research/IEEEJournalPubs/1.156GHzDisk.uffc.Dec04.jwang.ctnguyen.pdf
T-Support Geometry
Bar length L
Bar width W
Electrode
Electrode
Connection
length
Connection
width
Support
width
Anchor
Support
length
(LTsup)
Anchor
Anchor
Anchor
Resonator
Bar resonator
• Electrostatic actuation, transduction of electrical energy to acoustic energy
• Design frequency 24 MHz
T-shaped supports
• Provides stability in direction of actuation direction, allowing high bias voltages
• Can be optimized in terms of support losses, i.e. quality factor
• Possibility to have relatively long legs without penalty with regards to quality factor
allows thermal heating or isolation from the
substrate
SEM Image of device
Schematic
Diagram
“Extruded” resonator
Resonator Model Construction
• The MEMS designer starts with a blank, 3-D canvas
• The MEMS designer picks components from the library to assemble the device
• Component parameters can be defined as values, variables or equations
Process Dependent MEMS Model
Each component can be assigned to layer(s) of corresponding PDK process
Integration with Cadence
Several views of MEMS device in Virtuoso library manager
Frequency Analysis in MEMS+
23 23.2 23.4 23.6 23.8 24-130
-120
-110
-100
-90
-80
-70
-60
Frequency (Mhz)
S21 (
dB
)
Model Buildup • 4th order rectangular plate component
• Multiple sections for supports, capturing higher order flexural modes
Simulation results • Mode shape effected by the Poisson
ratio
Frequency Analysis in MEMS+
Result Visualization of Mode of Interest at 23.8MHz (Displacement Exaggerated)
Experimental Validation
23.795 23.796 23.797 23.798 23.799 23.8 23.801-85
-80
-75
-70
-65
-60
Frequency (Mhz)
S2
1 (
dB
)
23.892 23.893 23.894 23.895 23.896 23.897-85
-80
-75
-70
-65
-60
Frequency (Mhz)
S2
1 (
dB
)
MEMS+ Model in Cadence
• Quality factor tuned in Virtuoso with resistor to match known value
Validation • Simulations match measurements closely,
both in terms of resonance frequency and
transmission levels
Measured results Simulated results
Summary and Outlook
: MEMS+ - A “Hub” for MEMS Design
Algorithm Level Design
Structural Level Design and PCell Generation
SEMulator3D Process Emulation
CoventorWare FEM Damping and Stress Analysis
MEMS+ System Design
IMEC SiGe Design Kits (initial versions available from imec or Coventor)
MEMS Design
Verification (FEA)
Design Review
Manufacturability Check
Documentation and Training
MEMS Design
MEMS + IC Co-Design
CoventorWare™
SEMulator3D™
MEMS+™ Platform
Additional Examples
• IMEC’s SiGe technology and Coventor’s MEMS+ platform can be used to
develop a variety of MEMS designs
μmirror arrays
probe memory
accelerometers
(ring) gyros
Next PDKs and MEMS SiGe runs
Next version of MEMS SiGe PDKs will support
• More process types, e.g. flexibility on mechanical layer thickness
• Compatibility to CMOS PDK
Upcoming SiGe MEMS Multi-Project-Wafer run TSMC 0.18 HV CMOS
• Open for external designers
• Layout submission end of 2011
Training workshop on SiGe MEMS process and PDKs
• September 2011
Thick SiGe platform
• structural layer thickness: 4μm
• nanogaps: 500200 nm
Thin SiGe platform
• structural layer thickness: 300nm
• gap: 20050 nm
• actuation gap: 300 nm
• coating for optical properties
Thank You!
