International Journal of Industrial Electronics and Electrical Engineering, ISSN: 2347-6982 Volume-2, Issue-9, Sept.-2014 Design of 8-Bit Low Power CMOS D-Flip Flop Based Shift Registers 42 DESIGN OF 8-BIT LOW POWER CMOS D-FLIP FLOP BASED SHIFT REGISTERS 1 M.GOVINDU, 2 K. PRASAD BABU, 3 S.AHMED BASHA, 4 K.SUVARNA, 5 H.DEVANNA 1 M.tech VLSISD student, SJCET , 2 Assistant Professor ECE Dept, SJCET , 3 Assistant Professor ECE Dept SJCET, 4 Associate Professor ECE Dept, SJCET, 5 Associate Professor ECE Dept, SJCET E-mail: [email protected], [email protected], [email protected], [email protected], [email protected]Abstract- Shift registers occupy an important position in most digital systems. They are often used to momentarily store binary information needed to be coded or decoded. They also play an important link between systems using sequential I/O channels. The flip-flops in a register must be wired so binary data can be inserted (shifted) into the register, and probably shifted out as well. Currently Low power consumption is crucial in digital design part. Shift registers are used for Storage of digital data. In this project, the design of CMOS Low power SISO, SIPO, PISO and PIPO using D-flip flops, each of 8-bit size is being done. Various foundries are used and analyzed. CMOS is a technology for constructing integrated circuits Keywords- CMOS, D Flip Flop. SISO, SIPO, PISO and PIPO I. INTRODUCTION A shift register is nothing but a group of flip flops used in digital circuits, connected by the same clock, The output of each flip-flop is connected to the "data" input of the next flip-flop in cascade, resulting in a circuit that shifts by one position the "bit array" stored in it, shifting in the data present at its input and shifting out the last bit in the array, at each transition of the clock input. Shift Registers have parallel or serial inputs and outputs. Various types of Shift registers are Serial in serial out (SISO), Serial in parallel out (SIPO), Parallel in parallel out (PISO), Parallel in parallel out (PIPO). In Shift registers there may be parallel, serial inputs and parallel, serial outputs. Shift registers can be bi-directional also. Shift registers can be circular also. In this project the design of 8-bit SISO, SIPO, PISO, PIPO is done. II. IMPLEMENTATION Low Power is primary concern in any digital circuit design. In general Power P=i.V DD In CMOS circuits total power is P t = P static +P Dynamic ; Where P static = I static .V DD and P Dynamic =αCV 2 DD f. In this project we concentrate on P Dynamic . VARIOUS SHIFT REGISTERS implemented are A. SISO These are simple type of shift registers. The data entered or inputted is shifted out with respect to clock pulses. Circuit: Timing Diagram
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International Journal of Industrial Electronics and Electrical Engineering, ISSN: 2347-6982 Volume-2, Issue-9, Sept.-2014
Design of 8-Bit Low Power CMOS D-Flip Flop Based Shift Registers
42
DESIGN OF 8-BIT LOW POWER CMOS D-FLIP FLOP BASED SHIFT REGISTERS
Abstract- Shift registers occupy an important position in most digital systems. They are often used to momentarily store binary information needed to be coded or decoded. They also play an important link between systems using sequential I/O channels. The flip-flops in a register must be wired so binary data can be inserted (shifted) into the register, and probably shifted out as well. Currently Low power consumption is crucial in digital design part. Shift registers are used for Storage of digital data. In this project, the design of CMOS Low power SISO, SIPO, PISO and PIPO using D-flip flops, each of 8-bit size is being done. Various foundries are used and analyzed. CMOS is a technology for constructing integrated circuits Keywords- CMOS, D Flip Flop. SISO, SIPO, PISO and PIPO I. INTRODUCTION A shift register is nothing but a group of flip flops used in digital circuits, connected by the same clock, The output of each flip-flop is connected to the "data" input of the next flip-flop in cascade, resulting in a circuit that shifts by one position the "bit array" stored in it, shifting in the data present at its input and shifting out the last bit in the array, at each transition of the clock input. Shift Registers have parallel or serial inputs and outputs. Various types of Shift registers are Serial in serial out (SISO), Serial in parallel out (SIPO), Parallel in parallel out (PISO), Parallel in parallel out (PIPO). In Shift registers there may be parallel, serial inputs and parallel, serial outputs. Shift registers can be bi-directional also. Shift registers can be circular also. In this project the design of 8-bit SISO, SIPO, PISO, PIPO is done. II. IMPLEMENTATION Low Power is primary concern in any digital circuit design. In general Power P=i.VDD In CMOS circuits total power is Pt= Pstatic+PDynamic ; Where Pstatic= Istatic.VDD and PDynamic =αCV2
DDf. In this project we concentrate on PDynamic. VARIOUS SHIFT REGISTERS implemented are A. SISO These are simple type of shift registers. The data entered or inputted is shifted out with respect to clock pulses. Circuit:
Timing Diagram
International Journal of Industrial Electronics and Electrical Engineering, ISSN: 2347-6982 Volume-2, Issue-9, Sept.-2014
Design of 8-Bit Low Power CMOS D-Flip Flop Based Shift Registers
43
Layout:
Analog Simulation for Cmos0.12um
Analog Simulation for Cmos0.18um
Analog Simulation for Cmos0.25um
B. SIPO Here the data inputted serially is outputted parallel with respect to clock pulses
Analog Simulation for CMos 0.12um
Analog Simulation for Cmos 018um
Analog Simulation for Cmos0.25um
International Journal of Industrial Electronics and Electrical Engineering, ISSN: 2347-6982 Volume-2, Issue-9, Sept.-2014
Design of 8-Bit Low Power CMOS D-Flip Flop Based Shift Registers
44
C. PISO Here the data is inputted parallel and the output is serially obtained.
Layout:
Analog Simulation for Cmos 0.12um
Analog Simulation for Cmos0.18um
Cmos 0.25um
International Journal of Industrial Electronics and Electrical Engineering, ISSN: 2347-6982 Volume-2, Issue-9, Sept.-2014
Design of 8-Bit Low Power CMOS D-Flip Flop Based Shift Registers
45
D. PIPO Here the data is inputted parallel and the output is parallel obtained.
Layout:
Analog Simulation for Cmos 0.12um
Analog Simulation for Cmos 0.18um
Analog Simulation for Cmos 0.25um
III. RESULT TABLE
CONCLUSION By observing the results table we conclude that Power dissipation is more for 0.25µm technology when compared with 0.18 µm, 0.12µm technologies. In this project we implemented the 8-bit Registers which are extensions of 4-bit registers. 0.12um technology has lowest power dissipation with respect to all registers that is SISO, SIPO, PISO and PIPO registers. FUTURE SCOPE In future 16-bit-registers or more bit-registers can be designed and implemented as an extension to this Project with low power dissipation as primary concern REFERENCES
[1] Design and analysis of Low power single edgeTrigger D Flip Flop Based Shift Registers Mathan. N1, T. Ravi2, E. Logashanmugam
[2] Dr. Sunil P Khatri and Sivakumar Ganesan," A Modified Scan-D Flip-flop Design to Reduce Test Power".
International Journal of Industrial Electronics and Electrical Engineering, ISSN: 2347-6982 Volume-2, Issue-9, Sept.-2014
Design of 8-Bit Low Power CMOS D-Flip Flop Based Shift Registers
46
[3] CMOS Digital Integrated Circuits Analysis and Design by Sung-Mo Kang, Yusuf Leblebici. Tata Mcgraw-Hill 3rd edition
[4] Hongli Gao Fei Qiao Dingli Wei Huazhong Yang," A Novel Low- Power and High-Speed Master-Slave D Flip- Flop".
[5] Jinn-Shyun Wung, Po-Hui Yung, "A Pulse- Triggered TSPC Flip- Flop for High-speed Low-Power VLSI Design Applications".
[6] Manoj sharma, Dr Arti Noor." An Area and Power Efficient design of Single Edge Triggered D-Flip Flop".
[7] D.Markovi, B.Nicolic and R.W Borderson,"Analysis and design of low energy flip flops".
[8] Imran Ahmed Khan, Owais Ahmad Shah and Mirza Tariq Beg, "Analysis of Different Techniques for Low Power Single Edge Triggered Flip Flop".
[9] R. Udaiyakumar, K. Sankaranarayan, Certain Investigations on Power Dissipation
[10] Ahmed Sayed and Hussain Al- Asaad." A New low power high performance flip-flop".
