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Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to:...

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Page 1: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.
Page 2: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Developing a DSP Core using an FPGA Prototype for Scintillation Detector

Signals

Submitted to:

Communication & Electronics Dept., Al Azhar University

Supervised by:

Prof. Dr. Ahmed Safwat Prof. Dr. Mahmoud Ashour

Dr. Ashraf Aboshosha

Prepared by: Eng. Mahmoud Kamel

Page 3: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Outline

• This core gives us all important features of the scintillation detector signals such as shaping,

counting, pulse height and multichannel analyzing.

• The main purpose of this research work is to de-noise, compress and reconstruct the

scintillation signals by which the processing speed, storage and precision will be improved.

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Page 4: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Outline

• This core is implemented to apply the forward wavelet transform and interpolation technique. A new contribution of this framework arises from employing the interpolation techniques to reconstruct the signals where the mother wavelet and details are not required.

• Building a Multi-Channel Analyzer of the scintillation detector signals

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Page 5: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Index of Content

• Scintillation detectors • Importance of scintillation detectors• Data Acquisition System• Proposed digital processing algorithm• Wavelets – Interpolation Technique• Comparative study with the previous techniques• Single channel and multi channel analyzer• Conclusions and future work

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Page 6: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Scintillation Detector

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Figure 1 : Schematic diagram of a scintillation detector

Page 7: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Scintillation Detector

• A scintillator is a material that emits light, scintillates, when absorbing radiation.

• The energy can be determined by measuring the pulse height spectrum. This is called spectroscopy.

• A scintillation detector is obtained when a scintillator is coupled to an electronic light sensor such as PMT or photodiode.

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Page 8: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Importance of Scintillation Detectors• Detection of mixed ionizing fluxes near

nuclear objects.• Radionuclide control of samples and

radiation pollution.• Determination of the type and energy of

high-energy particles and products of their reactions with targets.

• Nuclear medicine (Gamma Camera, PET Tomography, …)

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Page 9: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Data Acquisition System

9

Figure 2 : The practical data acquisition system of scintillation detector Signals.

(1) Scope , (2) high voltage source, (3) scintillator , (4) power supply

Page 10: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Why FPGA ?

• FPGA incorporates thousands of logic cells linked by programmable switches

• Highly parallel configurable digital signal processor

• A many channel signal processing was required in these detector to obtain a precise signals

• Availability of high-level design entry method• FPGA designs easily changed, recompiled and

low cost

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Page 11: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

FPGA Design Flow of the Solution

Synthesis• Translate Design into Device Specific Primitives• Optimization to Meet Required Area & Performance Constraints

Design Specification

Place & Route• Map Primitives to Specific Locations inside Target Technology with Reference to Area &• Performance Constraints• Specify Routing Resources to Be Used

Design Entry/RTL CodingBehavioral or Structural Description of Design

LEMEM I/O

RTL Simulation• Functional Simulation• Verify Logic Model & Data Flow (No Timing Delays)

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Page 12: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

FPGA Design Flow of the solution

Timing Analysis - Verify Performance Specifications Were Met - Static Timing Analysis

Gate Level Simulation - Timing Simulation - Verify Design Will Work in Target Technology

Program & Test- Program & Test Device on Board

tclk

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Page 13: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

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Pre-processing Phase 1-Wavelet based Decomposition

2- Interpolation based Reconstruction

Pulse Shaping & Counting

Multichannelanalyzer

Store & Show data

Figure 3: The overall proposed solution

Page 14: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

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Pre Amplifier

Main Amplifier

SCA

MCA

Counter A

B

Figure 4: The proposed solution

Page 15: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Hardware System

15

Figure 5: The FPGA XSC50k-Spartan II and the PC-based parallel interface

Page 16: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Pre-processing Phase

• De-noising • Compression• Reconstruction

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Page 17: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Effect of Noise onPulse Shaping & Counting

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Figure 6: Effect of noise on pulse shaping

Page 18: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Wavelets• The wavelet analysis procedure is to adopt a

wavelet prototype function, called an analyzing wavelet or mother wavelet.

• Wavelet transform decompose the original signal into different scales of resolution; these called the approximation and detail coefficients .

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Page 19: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Wavelet Decomposition Levels

19

H

G

d1

X0 H

G

d2

d3

Figure 7: Three wavelet decomposition levels

A3

Page 20: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Wavelet Families • Haar• Daubechies• Biorthogonal • Coifelt• Symelet• Myer

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Page 21: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Haar Wavelet Design Pro:• Allows good approximation with a subset of

coefficients.• It can be computed quickly and easily. • Implemented easily by FPGA.

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Page 22: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Design Block Diagram

22

Figure 8: Design block diagram

Page 23: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Selecting the best Decomposition Level

• The quality of the compressed signals is the main criterion to select the best

decomposition level in terms of Peak Signal to Noise Ratio (PSNR).

• The other similarity measure are Euclidean Distance (ED) , Cross Correlation coefficient (CC) and Mean Square Error(MSE).

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Page 24: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Decomposition Levels

24

Figure 9: Four approximation coefficients of Haar wavelet transform

Page 25: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Statistics of Four Decomposition Levels

25

LevelPSNRMSEEDCCOne27.85670.169320.47780.9681

Two30.70840.157514.73950.9830

Three31.92580.144312.79900.9866

Four18.95543.256157.06250.7021

Table 1: Statistics of four levels Haar transform

Page 26: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

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Mother Wavelet

PSNRMSEEDCC

Haar31.9260.164312.79900.9866Daubechies32.56560.141811.81390.9890Coiflet32.863

50.132411.38340.9900

Meyer13.5046

11.4230

106.8780.0148

Biorthogonal32.2270.153312.27760.9886Table 2: Similarity measure of constructed and original

signals of the different mother wavelets

Comparison of Different Mother Wavelets

Page 27: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Interpolation

• The Interpolation is a method of constructing new data points within the range of a discrete set of known data points.

• Interpolation is performed by fitting the supplied data with polynomial functions between data points and evaluating the appropriate function at the desired points.

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Page 28: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Reconstruct Signals Using Interpolation

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Figure 10: a) Original signals. b) Transformed signal. c) Reconstructed signals

Page 29: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Interpolation Algorithms

• Nearest neighbor interpolation• Linear interpolation• Cubic Hermit Interpolation • Cubic spline interpolation

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Page 30: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

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MethodPSNRMSEEDCC

Linear29.71920.273116.46690.9782

Cubic Spline31.92580.164312.79900.9866

Nearst27.85010.838028.84620.9307

Cubic Hermit30.60660.222614.89840.9818

Table 3: Statistics of different interpolation techniques

Comparison of Applying Different Interpolation Techniques

Page 31: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Previous Pre-processing Techniques

1. Accumulation Technique 2. Median filter

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Page 32: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Accumulation Technique

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Figure 11: Digital processing algorithm of scintillation detector signals

Page 33: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Median Filter• The value of an output sample is determined

by the median of the neighborhood signals.

33Figure 12: Reconstructed signals using Median filter

Page 34: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

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MethodPSNRMSEEDCCAccumulation Tech27.49720.455521.3433 0.9680Median filter30.68560.218614.7856 0.9831Proposed Solution.31.92580.164312.79900.9866

Table 4: Statistics of the preprocessing techniques

Comparison of the Preprocessing Results

Page 35: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

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Figure 13: Pulse shaping after denoising

Page 36: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

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Figure 14: Pulse counting

Page 37: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Multi Channel Analyzer• The MCA system is used to measure the height of

each output pulse and the number of each output pulses simultaneously.

• By performing this operation for all detector events in a given interval the MCA generates a spectrum of the distribution of energy for a measured events with the y axis representing counts and the x axis representing channel value.

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Page 38: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Multi Channel Analyzer

38Figure 15: Divided original signals into 16 channels

Page 39: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Multi Channel Analyzer

39Figure 16: Energy spectrum with 16 channels

Page 40: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Channel Calibration

• Energy channel values are converted into kilo electron volts with a channel-to-kilo electron volt conversion factor which is determined from a comparison of photo peak energies and channel location close to the energy of interest.

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Page 41: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Conclusions• One of the most important advantages of this

system is the high compression rate (12.5%) using the interpolated wavelets

• Compared with the accumulation technique and median filtering, the proposed design achieved the best precision

• Capability of constructing MCA from SCA• Coiflet is the best mother wavelet and Cubic

spline is the best interpolation technique. Combining both of them for down and up sapling in wavelets is a new theoretical contribution of this framework

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Page 42: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

Future work

• Applying more complex wavelet filters.• Modifying the proposed architecture to

process more scintillator detectors.• Employing the presented results as a base to

identify radiation type and isotopes.

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Page 43: Developing a DSP Core using an FPGA Prototype for Scintillation Detector Signals Submitted to: Communication & Electronics Dept., Al Azhar University.

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