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International Journal of Electrical Engineering & Technology (IJEET) Volume 8, Issue 1, January- February 2017, pp. 80–92, Article ID: IJEET_08_01_011
Available online at http://www.iaeme.com/IJEET/issues.asp?JType=IJEET&VType=8&IType=1
ISSN Print: 0976-6545 and ISSN Online: 0976-6553
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© IAEME Publication
DEVELOPMENT OF 13 LEVEL CASCADED H BRIDGE
MULTILEVEL INVERTER MATLAB SIMULATION
Kowstubha.P, Krishnaveni.K and Sathyasri.Ch
Department of Electrical and Electronics Engineering,
Chaitanya Bharathi Institute of Technology, Hyderabad, India
ABSTRACT
Power quality plays a vital role in power system transmission and distribution. Due to the
increase in the demand of power and it's consumption, power quality is highly disrupted. The most
popular device used to address this problem of power quality is Multi Level Inverter. The aim of
this paper is to develop a 13- level inverter using MATLAB Simulink. In this paper, comparison of
Total Harmonic Distortion (THD) is performed for 7, 9, 11 and 13 level inverters using MATLAB
Simulink. THD calculations are done using Sine Wave Pulse Width Modulation technique (SPWM
In-phase) and Cascaded H-bridge(with separate DC sources) inverter as they possess less
switching losses compared to other topologies. The work shows how the efficiency of output of
multilevel inverter increases as the level of inverter increases with the reduction of THD. FFT
analysis is provided for all level inverters to calculate THD.
Keywords: Multi-Level Inverter, THD, FFT analysis, SPWM and Cascaded H-bridge.
Cite this Article: Kowstubha. P, Krishnaveni K, and Sathyasri.Ch Development of 13 Level
Cascaded H Bridge Multilevel Inverter Matlab Simulation. International Journal of Electrical
Engineering & Technology, 8(1), 2017, pp. 80–92.
http://www.iaeme.com/IJEET/issues.asp?JType=IJEET&VType=8&IType=1
1. INTRODUCTION
Multilevel Inverters has the ability to generate low switching frequency and high quality output voltage
waveforms. The advantages of multilevel inverter are high power quality, low switching losses, low
electromagnetic interference and high voltage capability. The main multilevel inverter topologies used to
improve the power quality issues are diode clamped multilevel inverter (DCMI), flying capacitor
multilevel inverter (FCMI) and cascade H-Bridge inverter (CHB). Cascaded H-Bridge topology has been
chosen in this paper to design the multilevel inverter [1]-[3].
Pulse width modulation techniques help the switching of Cascaded H Bridges to obtain an approximate
sine wave output from multilevel inverter. The carrier-based modulation called level-shifted modulation is
considered for CHB. An m-level CHB inverter using level-shifted modulation requires (m-1) triangular
carriers, having the same frequency and amplitude [4]-[6].
The PWM strategy with phase relationship of In-
phase disposition (IPD) is used in the work As the level of the inverter increases, a near sine wave is
produced at the output of the inverter. In this paper, THD is calculated for 7, 9, 11 and 13 level inverters
with simulation results performed with MATLAB SIMULINK. In this paper, the main focus is to design
and simulate the 13 level inverter with suppressed harmonic levels. The work mainly includes
Development of 13 Level Cascaded H Bridge Multilevel Inverter Matlab Simulation
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• The design of CHB inverter for 7, 9, 11 and 13 levels in open loop configuration and simulate
the same with MATLAB SIMULINK.
• The calculation of THD for 7, 9, 11 and 13 levels and compare their THD values to comment
on the performance.
In the present work, PWM strategy with phase relationship of In-phase disposition (IPD is used in the
work. The rules for the In-phase disposition method, with an example are illustrated below for a level
of N.
• (N–1) carrier waveforms are arranged so that every carrier is in phase.
• The converter is switched to +Vdc/2 when the reference is greater than both the carrier
waveforms.
• The converter is switched to zero when the reference is greater than the lower carrier
waveform but less than the upper carrier waveform.
• The converter is switched to - Vdc/ 2 when the reference is less than both the carrier
waveforms.
CHB with phase voltage levels at the converter terminals is 2N+1 is considered for the work, where N
is the number of cells or dc link voltages. IGBT switches are used in CHBs as they have low blockage
voltage and high switching frequency.
2. SIMULATION RESULTS
In this section, simulations are carried out for 7 level, 9 level 11 level and 13 level output for cascaded
multilevel inverter. In- Phase Disposition modulation technique is implemented for CHB. Modulation
index is taken either 0.9 or 1 specified with respective output figures while frequency modulation index is
21. For better visualization figures are resolved, but simulations and THD measurement are done as per the
values specified. FFT analysis is done for all levels of CHB.
2.1. SIMULATIONS FOR CASCADED MULTILEVEL INVERTERS
Simulations are carried out for different cascaded multilevel inverter and FFT analysis is done in
MATLAB/SIMULINK to obtain THD.
2.1.1. 7 - LEVEL CASCADED MULTILEVEL INVERTER
MATLAB simulation for 7- level inverter is shown in Fig.1 This inverter consists of three H bridges in
each phase. A DC voltage of 18 volts is applied across each bridge. Sinusoidal pulse width modulation
technique is used to switch the inverter. A modulating sinusoidal signal of 50 HZ is compared with
triangular carrier wave of 1 kHz to obtain the pulses and the output voltage waveform is shown in Fig.2.
Kowstubha. P, Krishnaveni. K and Sathyasri.Ch
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Figure 1 Simulink block diagram for 7 - level inverter
Figure 2 Carrier and reference waves in SPWM (inphase) for 7 - level inverter
Fig 3(a), Fig 3(b) and Fig 3(c) represents the phase voltage, line voltage and the 3-phase output voltage
of 7- level inverter.
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Figure 3(a) Phase voltage
Figure 3(b) Line voltage
Figure 3(c) 3 phase output voltage
Figure 3 Simulink output for 7 - level inverter
The FFT analysis is done for 7 - level, the line to line voltage FFT and phase to neutral FFT analysis is
shown in Fig .4(a) and Fig 4(b) respectively.
Kowstubha. P, Krishnaveni. K and Sathyasri.Ch
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Figure 4(a) FFT analysis (line to line) and THD for 7 - level CHB inverter
Figure 4(b) FFT analysis (Phase to neutral) and THD for 7 - level CHB inverter
Figure 4 FFT analysis for 7 - level inverter
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3.1.2 9 - LEVEL CASCADED MULTILEVEL INVERTER
9 - level cascaded multilevel inverter simulation has been done using Simulink. The simulation circuit
diagram is shown in Fig.5 and its output voltage waveforms are shown in Fig.6.
Figure 5 Simulink block diagram for 9 - level inverter
Figure 6 Simulink phase voltage output for 9 - level multilevel inverter
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THD is calculated using FFT analysis and is shown in Fig 7(a) and Fig.7(b).
Figure 7(a) FFT analysis and THD for 9 - level cascaded multilevel inverter
Figure 7(b) FFT analysis and THD for 9 - level cascaded multilevel inverter
Figure 7 FFT analysis for 9 - level inverter
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3.1.3 11 - LEVEL CASCADED MULTILEVEL INVERTER
11-level cascaded multilevel inverter simulation has been done using Simulink. Simulation Circuit is
shown in Fig.8 and its output voltage waveforms are shown in Fig.9.
Figure 8 Simulink block diagram for 11-level inverter
Figure 9 Simulink phase voltage output for 11- level multilevel inverter
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THD is calculated using FFT analysis shown in Fig 10(a) and Fig 10(b)
Figure 10(a) FFT analysis and THD for 11-level cascaded multilevel inverter
Figure 10(b) FFT analysis and THD for 11 - level cascaded multilevel inverter
Figure 10 FFT analysis for 11 - level inverter
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3.1.4 13 - LEVEL CASCADED MULTILEVL INVERTER
13 - level cascaded multilevel inverter simulation has been done using Simulink and their Pulse width
modulated output, simulation circuit and voltage waveforms (3-phase and line to line) are shown in Fig.11,
Fig.12, Fig.13, Fig.14.
Figure 11 Carrier and reference waves in SPWM (in-phase) for 13- level inverter
Figure 12 Simulink block diagram for 13 - level inverter
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Figure 13 Simulink Phase voltage output for 13- level multilevel inverter
Figure 14 Simulink line voltage output for 13- level multilevel inverter
THD is calculated using FFT analysis shown in Fig 15 (a) and Fig 15 (b)
Figure 15(a) FFT analysis and THD (phase to neutral) for 13-level cascaded multilevel inverter
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Figure 15(b) FFT analysis and THD (line to line)for 13- level cascaded inverter
Figure 15 FFT analysis for 13 - level inverter
3.2. THD Comparison
Simulation studies for CHB gives different comparison values for THD. Table.1 gives the information of
THD values for 7 9 11 13 level multilevel inverters.
Table 1 % THD of different levels.
Sl.No Number of
levels %THD
1 7 19.15
2 9 14.29
3 11 11.36
4 13 9.43
4. CONCLUSIONS
The aim of the work is to develop a 13 level inverter with a lower value of THD levels and an
approximately accurate output. In the work Cascaded H Bridge has been used because of its higher
switching frequency, low weight and cost of the entire circuit. The 7, 9, 11, 13 level inverters have been
simulated for 3 Phase open loop configuration and the THD values have been observed using FFT (Fast
Fourier Transforms) analysis in MATLAB SIMULINK. The related results and comparisons have been
indicated in the paper.
ACKNOWLEDGEMENTS
The author wish to thank Chaitanya Bharathi Institute of Technology authorities for permitting to publish.
REFERENCES
[1] Komal Satose, S.N. Deshpande, Rahul Bhujabal, Priya Tiwari, “Analysis of Different Topologies of
Multilevel Inverters”, IJIRST –International Journal for Innovative Research in Science & Technology,
Vol.2, Issue 09, Feb.2016
Kowstubha. P, Krishnaveni. K and Sathyasri.Ch
http://www.iaeme.com/IJEET/index.asp 92 [email protected]
[2] T. Daniel Raj and N. Kesavan Nair, “Implementation of Cascaded H-Bridge Multi Level Inverter”,
Middle-East Journal of Scientific Research 24 (9): 2752-2759, 2016, ISSN 1990-9233
[3] T.Sengolrajan, B.Shanthi, S.P.Natarajan, “comparative study of Multi carrier Pulse Width Modulation
techniques for 7 level cascaded Z- source inverter”, International Journal of Computer Applications
(0975 – 8887) Vol.6, March 2013
[4] Jose Rodriguez, Jih- Sheng and Fang Zheng Peng, “Multilevel Inverters : a survey of topologies, control
and applications”, IEEE Transactions on Industrial Electronics, Vol. 49, Aug. 2002
[5] M.S Abhinaya, L. Priyanga,et.al, “A New Cascaded 2 level inverter based Statcom for high power
applications”, IJAREEIE, VOL.4, Issue 3, May 2015.
[6] Rajesh Kr Ahuja, Lalit Aggarwal, Pankaj Kumar, “Simulation of single phase Multilevel Inverters with
simple control strategy using MATLAB”, IJAREEIE, Vol.2, Issue 10, Oct. 2013.
ABOUT THE AUTHOR
Kowstubha.P received her four-year B.Tech degree from Sri Venkateswara University in 1995 and M.E
from Bangalore University in 2003. She has 15 years of teaching experience. Her fields of interest are
Power Electronics and Integrated circuits.
Krishnaveni. K received her four-year B.Tech degree from Nagarjuna University in 1993, M.Tech and
Ph.D. from JNTU Hyderabad in 2002 and 2009. She has 22 years of teaching experience. Her fields of
interest are Power Electronics and FACTS. She has published over 15 papers in national & international
conferences and technical journals. She is a member of IEEE and MIE. Presently serving as a professor in
the department of Electrical and Electronics Engineering.
Sathyasri. Ch: Undergraduate student of Electrical Engineering. Her areas of interests are power
Electronics, Multi-Level Inverters.
