Modes of operation of Differential Amplifier

Modes of operation of Differential Amplifier (DA)

• There are two modes of operations of DA

–Differential mode

–Common mode

• Differential mode:

• Two input signals are of same magnitude but opposite polarity are used (1800 out of phase)

• Common mode

• Two input signals are of equal in magnitudeand same phase are used

Differential mode

• Assume sine wave on base of Q1 is +ve going signal while on the base of Q2 –ve going signal

• An amplified –ve going signal will appear at collector

of Q1

• An amplified +ve going signal will appear at collector

of Q2

• Due to +ve going signal of base of Q1, current

increases in RE & hence a +ve going wave is developed

across RE

• Due to -ve going signal of base of Q2, -ve going wave

is developed across RE because of emitter follower

action of Q2

• So, signal voltages across RE, due to effect of Q1

&Q2 are equal in magnitude &1800 out of phase-

due to matched transistors

• Hence the two signals cancel each other & there is

no signal across RE

• No AC signal flows thro it

• Vo= +10-(-10)= 20

• Vo is difference voltage in two signals

Common Mode Operation• Two input signals are of equal in magnitude and

same phase are used

• In phase signal develops in phase signal voltages across RE

• Hence RE carries a signal current & provides -ve

feedback

• This –ve f/b decreases AC

• In signal voltages of equal magnitude will appear

across two collectors of Q1 &Q2

• Vo= 10-10=0 Negligibly small

• Ideally it should be zero

Analysis of evaluating ‘Ac’

• To evaluate Ac we set VS1=VS2=Vs

• On bisecting the Diff. amp. Ckt., we get the equivalent

ckt. As shown in Fig. below

• It is nothing but CE amplifier with un bypassed emitter

resistor 2RE

• For calculation of Ac we assume that, 2RE connected

in parallel

ie 2RE 2RE/ 2RE +2RE= RE

• Hybrid parameters equations are taken directly for CE amplifier with un bypassed emitter resistor but value of emitter resistor can taken as “2RE”

• AI = (hoe RE-hfe)/ (1+hoe(RC + RE))

= ( hoe (2RE)-hfe)/ (1+hoe(RC + 2RE))

• Ri= (1- AI)RE+ hie+ hre AI RL

= (1- AI) 2RE + hie+ hre AI RL

Where RL = RC +(AI – 1/AI )RE

RL = RC +(AI – 1/AI ) 2RE

• AC = AI Rc/ Ri+Rs (Since AV = (AI Rc)/Ri)

• In Ri expression neglecting the term hre AI RL and

substitute AI and Ri we get,

AC =((2hoe RE - hfe)Rc)/(2 RE(1+ hfe)+(Rs+hie)(2hoe RE +1))

Provided that hoe Rc<<1

• If we use approximate model we get simpler expression

• AC = - hfe Rc/Rs+hie+ (1+hfe)2RE

Evaluating ‘Ad’• We set VS1= -VS2= Vs/2

• ie magnitude of AC I/P voltages is set as above

• Ie1= -Ie2 , Io= 0 (They cancel each other to get resultant

ac current thro RE as I0=o)

• Hence for ac analysis emitter terminal can be grounded

• Bisecting the ckt with RE = 0

• We get equi. Ckt which is conventional CE amplifier

• Ac small signal Diff.Amp.

ckt with grounded emitter

is shown here

• As two trs. are matched

ac equi. Ckt of the other

Ckt is identical

• Approximate hybrid model for the above ckt is shown here

• -ve sign indicates phase difference between I/P &O/P

• Here Vs difference I/P

• Mod of Ad is

• CMRR is =

Method of improving CMRREffect of RE:

• To improve CMRR, ‘Ac’ must be reduced

• “Ac” approaches zero as RE tends to infinite

• Because RE introduces –ve feedback which reduces

‘Ac’

• Higher value of RE, lesser the Ac, higher the value

of CMRR

• ‘Ad’ is independent of RE

• But practically RE cannot be selected very high due to some limitations

–Large RE needs higher biasing voltage to set Q-pt

( Under Dc cond Ic=βIB but IE=IC IB=IE/ β

–IE depends on β

–To make Q-pt stable IE should be constant

irrespective of β

–For constant IE emitter R should be very

large this increases CMRR, )

–Increases overall chip area

• So various methods are used which provide increased effect of RE without any limitations

1. Constant current bias method

2. Use of current mirror method

• Another method to improve “Ad” to increase CMRR is Active load

Differential Amplifier with constant current circuit

• Here RE is replaced by constant current source circuit

• It provides increased

effect of RE without

physically increasing

value of RE

• R1, R2, R3 are selected to give the same

operating point for Q1&Q2

• Let current thro R3 is IE3 and Current R1 is

“I”

• Neglect base current(Because of large β)

• Assume current thro R2 is also “I”

• Thus as VEE, R1, R2, R3 & VBE are constant, Current IC3 is almost equal to IE3and also constant.

• Thus ckt with Tr Q3 acts as a constant current source.

• Internal Resistance of a cont. current source is very high, ideally infinite

• Hence this ckt makes the value of RE ideally infinite which reduces Ac ideally to zero

Current mirror circuit• Current mirror circuit:

– It is a ckt in which O/P current is forced to equal the I/P current

– O/P current is the mirror image of I/P current

• Ckt consists of two macthed transistors Q3 &Q4

• Their base-emitter voltage and base currents are same

• VBE3= VBE4 and IB3=IB4

• Similarly collector currents are same IC3=IC4

• Apply KCL at node “a”

I2= IC4 +I

• Apply KCL at node “b”

I= IB3+IB4 = 2 IB4 = 2 IB3

• Therefore I2= IC4 + 2 IB4 = IC3 + 2 IB3

• Now IB3 = IC3/ β

• Therefore I2= IC3 + 2 IC3/ β= IC3 + IC3(2/ β)

• Generally β is very large 2/ β is negligible small

• Therefore I2=IC3

• Thus collector current of Q3 is nearly equal to I2

• Once current mirror ckt is set for I2, it provides

constant current bias to Diff.Amp

• Therefore I2 can be obtained by writing KVL

for base –emitter loop of Q3

• -I2R2- VBE3+VEE=0

• Therefore I2=VEE - VBE3 /R2

• Selecting R2 ,the appropriate I2 can be set

for current mirror ckt

Advantages current mirror circuit

• Provides very high RE

• Required less no of components than constant ct source

• Simple to design

• Easy fabrication

So mostly widely used in IC OP-Amp

Use of active load to improve CMRR

• From equation of “Ad”

• Thus Ad increases as Rc must be high as possible

• But there are limitations in increasing Rc

Limitations :

• For large Rc, requires high biasing voltage to

maintain Quiescent Ic

• Higher Rc requires large chip area

• So it is not possible to increase Rc beyond a

particular limit

• Actually a current mirror ckt has

– Low DC resistance and high AC resistance

• To increase “Ad” we need a ckt to have

– high AC resistance

– It should not disturb DC conditions

• Current mirror ckt can be used as collector load

instead of Rc

• Such a load is called an active load

• Basically it act as a current source & provides large AC resistance

• Under DC conditions VS1=VS2=0 and Q1, Q2 are

matched trs.

• Hence I1=I2=IEE/2 where IB1 &IB2 are neglected

• Q3 &Q4 form a current repeater or current

mirror ckt hence I=I1=I2

• Load ct “IL” is the current entering to next stage

• IL = I - I2 = 0

• But when VS1 increases over VS2, the I1 increases

whereas I2 decreases as I1+ I2= IEE Constant

• Due to ct mirror action “I” always equal to I1

• Thus active load provides high ac resistance and

hence high Ad

• “Ad” becomes high, CMRR gets improved

Transfer characteristic of Differential Amplifier

• It’s a graph of Differential I/P “Vd” against IC1&IC2

• Used to analyze the large signal behaviour of DA

• Used to identify the range of “Vd” over which the ckt operation is in linear region

• To obtain transfer curve we use the following

assumptions:

– Current source ckt used with current “IEE” has

infinite O/P resistance

– “Rs” of Q1 &Q2 are neglected

–O/P resistance of each transistor is infinite

• Assumptions are valid for low frequency

• For a Tr, we can write equation for “Ic”

IC= Is e VBE/V

T

Where Is- Reverse saturation current

VBE- base emitter voltage

VT- voltage equvalent of Temp.

For two trs. IC1&IC2 are written as

IC1= Is e VBE1 / V

T

IC2= Is e VBE2 / V

T

where IS1=IS2= IS as Tr are mathced

This equation is called Ebers-Moll equation for Tr

ln IC1/Is= VBE1 / VT

ln IC2/Is= VBE2 / VT

Therefore VBE1 = VT In (IC1/Is)

VBE2 = VT In (IC2/Is)

• Consider the loop including two I/Ps & two base

emitter junctions neglect “Rs”

• Apply KVL to loop shown

VS1-VBE1+VBE2-VS2=0

• Sub VBE1 &VBE2 in above equation

VS1- VT In (IC1/Is)+ VT In (IC2/Is) -VS2=0

VT [In (IC2/Is)- In (IC1/Is)] = VS2 – VS1

(or) VT [In (IC1/Is)- In (IC2/Is)] = VS1 – VS2

VT In [(IC1/Is) /(IC2/Is)] = VS1 – VS2

In [IC1/IC2] = [VS1 – VS2]/ VT

• IC1/IC2 = e [VS1-VS2/VT]

• VS1 – VS2 = Vd- Differential I/P

• IC1/IC2= e Vd/ VT (A)

• Currents thro current source IEE is additive of two emitter currents

• IEE= IE1+IE2 (B)

• IE = IC/α

• IE1 = IC1/α

• IE2 = IC2/α

• IEE= 1 (IC1+IC2)/ α

• Solving (A ) & (B) we get,

• IC1= α IEE/ (1+ e( -Vd/ VT )) (C)

• IC2= α IEE/ (1+ e( Vd/ VT )) (D)

• From equations (C) & (D) transfer curve can be obtained

• Let “α IEE” be constant, for various values of “Vd” we can obtain IC1 &IC2