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Digital Arithmetic - GBV

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Digital Arithmetic Milos D. Ercegovac COMPUTER SCIENCE DEPARTMENT UNIVERSITY OF CALIFORNIA, LOS ANGELES Tomas Lang DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING UNIVERSITY OF CALIFORNIA, IRVINE i lib. i MORGAN KAUFMANN PUBLISHERS AN I M P R I N T OF £ (. S E V / E R SAN FRANCISCO SAN DIEGO NEW YORK BOSTON LONDON SYDNEY TOKYO
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Digital Arithmetic Milos D. Ercegovac

C O M P U T E R S C I E N C E D E P A R T M E N T

U N I V E R S I T Y OF C A L I F O R N I A , LOS A N G E L E S

Tomas Lang

D E P A R T M E N T OF E L E C T R I C A L A N D C O M P U T E R E N G I N E E R I N G

U N I V E R S I T Y OF C A L I F O R N I A , I R V I N E

i

lib. i

M O R G A N K A U F M A N N P U B L I S H E R S

A N I M P R I N T OF £ (. S E V / E R

SAN FRANCISCO SAN DIEGO NEW YORK BOSTON

L O N D O N SYDNEY T O K Y O

Contents

A b o u t the A u t h o r s v

Preface xvii

Symbols and N o t a t i o n xxiii

CHAPTER 1

Review of the Basic Number Representations and

Arithmetic Algorithms 3

1.1 Digital Ari thmetic and Ari thmetic Units 3

1.2 Basic Fixed-Point N u m b e r Representation Systems 5

1.2.1 Representation of Nonnegat ive Integers 5

1.2.2 Representation of Signed Integers 9

1.2.3 Sign Detection 15

1.2.4 Converse Mapping between Bit-Vectors and Values 15

1.2.5 Extension to Fixed-Point Representations 16

1.3 Addit ion, Change of Sign, and Subtraction 17

1.3.1 Addi t ion and Subtraction of Positive Integers 17

1.3.2 Addit ion, Change of Sign, and Subtraction of Signed

Integers 18

1.4 Range Extension and Ari thmetic Shifts 26

1.4.1 Range Extension 26

1.4.2 Ari thmetic Shifts 27

1.5 Basic Multiplication Algor i thms 29

1.5.1 Multiplication of Positive Integers 30

viii Contents

1.5.2 Multiplication of Signed Integers (Radix-2) 31 1.6 Basic Division Algorithms 34

1.6.1 Restoring Division 35 1.6.2 Nonrestoring Division 38

1.7 Exercises 40 1.8 Further Readings 46 1.9 Bibliography 47

СНА »ТЕ < a

Two-Operand Addition 51 2.1 About Carries 53 2.2 Basic Carry-Ripple Adder (CRA) and FA Implementation 59

2.2.1 Implementations of Full-Adder 60 2.3 Reducing the Adder Delay 63 2.4 Switched Carry-Ripple (Manchester) Adder 63

2.4.1 Delay 64 2.5 Carry-Skip Adder 65

2.5.1 Delay 66 2.5.2 Group Size 70

2.6 Carry-Lookahead Adder (CLA) 71 2.6.1 One-Level Carry-Lookahead Adder (1-CLA) 71 2.6.2 Two-Level Carry-Lookahead Adder 75 2.6.3 Three and More Levels 77 2.6.4 Choice of Group Size and Number of Levels 79

2.7 Prefix Adder 79 2.7.1 Increasing the Number of Levels 82 2.7.2 Increasing the Number of Cells 82

2.8 Carry-Select and Conditional-Sum Adders 85 2.8.1 Carry-Select Adder 86 2.8.2 Conditional-Sum Adder 87

2.9 Pipelined Adders 91 2.10 Variable-Time Adder 91

2.10.1 Type 1: With Self-Timed Carry Circuit 92 2.10.2 Type 2: With Parallel Carry Completion Sensing 94

2.11 Two's Complement and Ones'Complement Adders 95

Conten

2.12 Adders with Redundant Digit Set 97 2.12.1 Carry-Save Adder (CSA) 98 2.12.2 Signed-Digit Adder 102

2.13 Concluding Remarks 112 2.14 Exercises 115 2.15 Further Readings 124 2.16 Bibliography 129

С IAPTER J

Multioperand Addition 137 3.1 Bit-Arrays for Unsigned and Signed Operands 137 3.2 Reduction 139

3.2.1 [p :2] Adders for Reduction by Rows 140 3.2.2 (p:q] Counters for Reduction by Columns 144

3.3 Sequential Implementation 151 3.3.1 Unsigned and Signed Operands 151

3.4 Combinational Implementation 151 3.4.1 Reduction by Rows: Array of Adders 151 3.4.2 Reduction by Columns with (p:q| Counters 156 3.4.3 Pipelined Adder Arrays 166

3.5 Partially Combinational Implementation 167 3.6 Exercises 169 3.7 Further Readings 175 3.8 Bibliography 177

CHAPTER 4

Multiplication 181 4.1 Sequential Multiplication with Recoding 182

4.1.1 Sign-and-Magnitude 183 4.1.2 Two's Complement 192

4.2 Combinational Multiplication with Recoding 193 4.2.1 Generation of Multiples and Bit-Array 194 4.2.2 Addition of the Bit-Array 205

x Contents

4.2.3 Final Adder for Conver t ing Product to Conventional

F o r m 210

Partially Combinat ional Implementat ion 212

Arrays of Smaller Multipliers 215

Mult iply-Add and Mult iply-Accumulate (MAC) 217

Saturat ing Multiplier 219

Truncat ing Multiplier 219

Rectangular Multipliers 221

Squarers 221

Constant and Mult iple-Constant Multipliers 223

Concluding Remarks 225

Exercises 227

Fur the r Readings 233

Bibliography 237

CHAPTER 5

Division by Digit Recurrence 247

5.1 Definition and Notat ion 248

5.2 Algor i thm and Implementat ion of Fractional Division 249

5.2.1 Recurrence Step 249

5.2.2 Initialization, N u m b e r of Iterations,

and Terminat ion 254

5.2.3 On- the-Fly Conversion 256

5.3 Implementat ions of the Division Algor i thm 259

5.3.1 Examples of Algor i thms and Implementat ions 261

5.4 Integer Division 278

5.5 Quot ient-Digi t Selection Funct ion 280

5.5.1 Conta inment Condit ion and Selection Intervals 282

5.5.2 Continuity Condit ion, Overlap, and Quot ient-Digi t

Selection 283

5.5.3 Quot ient-Digi t Selection Using Selection Constants 287

5.5.4 Use of Redundan t A d d e r 296

5.6 Concluding Remarks 309

5.7 Exercises 309

4.3

4.4

4.5

4.6

4.7

4.8

4.9

4.10

4.11

4.12

4.13

4.14

Contents xi

5.8 Further Readings 313

5.9 Bibliography 319

• • • >

Square Root by Digit Recurrence 331

6.1 Recurrence and Step 331

6.2 Generation of Adder Input F[j] 334

6.3 Overall Algorithm, Implementation, and Timing 336

6.3.1 Examples of Implementations 336

6.4 Combination of Division and Square Root 343

6.5 Integer Square Root 345

6.6 Result-Disit Selection 347

6.6.1 Selection Intervals 348

6.6.2 Staircase Selection Using Redundant Adder 349

6.6.3 Selection Function for Radix 2 with

Carry-Save Adder 354

6.6.4 Selection Function for Radix 4 with

Carry-Save Adder 355

6.7 Exercises 357

6.8 Further Readings 360

6.9 Bibliography 362

" I r l Ä P T E R 7

Reciprocal, Division, Reciprocal Square Root, and Square

Root by Iterative Approximation 367

7.1 Reciprocal 368

7.1.1 Newton-Raphson Method for Reciprocal

Approximation 368

7.1.2 Multiplicative Normalization Method 371

7.1.3 Initial Approximation 373

7.1.4 Implementation and Additional Errors 375

7.2 Division 380

7.3 Square Root 381

xii Contents

7.3.1 Newton-Raphson Method 381

7.3.2 Multiplicative Normalization Method 382

7.3.3 Implementation and Error Issues 383

7.4 Example of Implementation of Division and Square Root 383

7.5 Concluding Remarks 385

7.6 Exercises 387

7.7 Further Readings 391

7.8 Bibliography 392

CHAPTER 8

Floating-Point Representation, Algorithms, and

Implementations 397

8.1 Floating-Point Representation 397

8.1.1 Significand, Exponent, and Base 398

8.1.2 Advantage: Dynamic Range 398

8.1.3 Disadvantages: Less Precision, Roundoff Error,

and Complex Implementation 399

8.1.4 Range of Significand and Unit in the

Last Position (ulp) 400

8.1.5 Normalized, Unnormalized, and Denormalized

Representation 401

8.1.6 Values Represented and Their Distribution 402

8.1.7 Choke of* 403

8.1.8 Representation of Significand 404

8.1.9 Representation of Exponent 405

8.1.10 Special Values 407

8.1.11 Exceptions 407

8.2 Roundoff Modes and Error Analysis 407

8.2.1 Round to Nearest (Unbiased, Tie to Even) 410

8.2.2 Round Toward Zero (Truncation) 412

8.2.3 Round Toward Plus and Minus Infinity 414

8.3 IEEE Standard 754 414

8.3.1 Representation and Formats 415

8.3.2 Rounding 416

8.3.3 Operations 416

Contents xiii

8.3.4 Exceptions 417 8.4 Floating-Point Addition 417

8.4.1 Basic Algorithm 418 8.4.2 Basic Implementation 420 8.4.3 Guard Bits and Rounding 422 8.4.4 Exceptions and Special Values 425 8.4.5 Denormal and Zero Operands 426 8.4.6 Delay and Pipelining 426 8.4.7 Alternative Implementations 426

8.5 Floating-Point Multiplication 435 8.5.1 Basic Implementation 435 8.5.2 Exceptions and Special Values 437 8.5.3 Denormals 438 8.5.4 Delay and Pipelining 438 8.5.5 Alternative Implementation 438 8.5.6 Floating-Point Multiply-Add Fused (MAF) 445

8.6 Floating-Point Division and Square Root 451 8.6.1 Division: Algorithm and Basic Implementation 451 8.6.2 Division: Rounding 453 8.6.3 Square Root: Algorithm and Implementation 461 8.6.4 Comparison between Digit Recurrence and

Multiplicative Methods 463 8.7 Concluding Remarks 465 8.8 Exercises 466 8.9 Further Readings 476 8.10 Bibliography 479

• ' I t Я 9

Digit-Serial Arithmetic 489 9.1 Introduction 489

9.1.1 Modes of Operation and Algorithm and Implementation Models 490

9.2 LSDF Arithmetic 496 9.2.1 LSDF Addition and Subtraction 496

xiv Contents

9.2.2 L S D F Multiplication 498

9.3 M S D F : Onl ine Ari thmet ic 502

9.3.1 Addit ion/Subtract ion 503

9.3.2 A Method for Developing Online Algori thms 507

9.3.3 Generic F o r m of Execution and Implementat ion 513

9.3.4 Algor i thms and Implementat ions 514

9.4 Concluding Remarks 534

9.5 Exercises 534

9.6 Fur ther Readings 540

9.7 Bibliography 542

CHAPTER 10

Function Evaluation 549

10.1 A r g u m e n t Range Reduction 551

10.2 Correct Rounding and Monotonicity 551

10.3 Polynomial Approximat ions and Interpolations 552

10.3.1 Polynomial Approximat ions 553

10.3.2 Piecewise Interpolation 557

10.3.3 Reduction, Approximat ion, and Reconstruction 560

10.4 Bipartite and Multipart i te Table Method 562

10.4.1 Implementa t ion 563

10.4.2 Compar ison 565

10.4.3 Multipart i te Table Approach 565

10.5 Rational Approximat ion 566

10.5.1 M S D F Polynomial/Rational Funct ion Evaluator 567

10.6 Linear Convergence Method 576

10.6.1 Multiplicative Normal iza t ion 577

10.6.2 Exponential by Addit ive Normal iza t ion 587

10.6.3 Tr igonometr ic and Inverse Tr igonometr ic

Funct ions 593

10.7 Concluding Remarks 593

10.8 Exercises 594

10.9 Fur the r Readings 597

10.10 Bibliography 601

Contents

CHAPTER 11

CORDIC Algorithm and Implementations 609 11.1 Rotation and Vectoring Modes 612

11.1.1 Rotation Mode 612 11.1.2 Vectoring Mode 614

11.2 Convergence, Precision, and Range 616 11.2.1 Convergence 616 11.2.2 Range and Error for я Iterations and Truncat ion 618

11.3 Compensat ion of Scaling Factor 619

11.4 Implementat ions 620 11.4.1 Word-Serial Implementa t ion 620

11.4.2 Pipelined Implementa t ion 621 11.5 Extension to Hyperbolic and Linear Coordinates 623

11.5.1 Hyperbolic Coordinates 623 11.5.2 Linear Coordinates 625 11.5.3 Unified Description 626 11.5.4 Other Functions 626

11.6 Redundan t Addit ion and H igh Radix 626 11.6.1 Redundan t Representation 627 11.6.2 Higher Radix 631 11.6.3 Example: 24-Bit Uni t 632

11.7 Application-Specific Variations 633 11.7.1 Only Rotation 633 11.7.2 Vectoring Followed by Rotation 634

11.8 Concluding Remarks 634 11.9 Exercises 635 11.10 Fur ther Readings 638 11.11 Bibliography 642

Bibl iography 649 Index 701


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