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Digitale basistechnieklesplan
Datum Theorie Prakticum Thuis
7 januari Combinational Logic Tutorial Quartus II
Herhaling Tutorial
12 Januari Combinational Logic Halfadder Fulladder
14 Januari Functions of Combinational Logic
2 bit decoder BCDto7seg
19 Januari Functions of Combinational Logic
2-1 mux 1-2 demux
21 Januari Flip-Flops and related devices
Gated d-latch(8.3)
Example 8.12
26 Januari Counters en Statemachines
Frequency divider8.11)
28 Januari Counters en Statemachines
4 bit synch counter,
verkeerslicht
2 februari Herhaling Verkeerslicht 2
4 februari Oefententamen
9 februari Tentamen
Bepaling van het eindcijfer
• Het eindcijfer wordt bepaald door:
• 1 Voldoende Praktikum. (O/V)
• Tentamencijfer.
3MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Introduction to Logic Gates
• Logical gates– Inverter– AND– OR– NAND– NOR– Exclusive OR (XOR)– Exclusive NOR (XNOR)
• Draw Logic Circuit • Analysis of Logic Circuit
4MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Introduction to Logic Gates
• Universal gates NAND and NOR– NAND gate– NOR gate
• Execution using NAND gate• Execution using NOR gate• Positive & Negative Logic• SOP Expression Execution• POS Expression Execution• Integrated Logic Circuit Family
5MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Logic Gates
6MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Logic Gates
• Inverter gate
• The use of inverter: complement
7MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Logic Gates
• AND gate
8MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Logic Gates
• OR gate
9MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Logic Gates
• NAND gate
10MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Logic Gates
• NOR gate
11MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Logic Gates
• Exclusive OR (XOR) gate
12MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Logic Gates
• Exclusive NOR (XNOR) gate
13MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Draw Logic Gates
• When Boolean expression is obtained, we can draw logic gates
• Example:– F1 = xyz’ (use three input AND gate)
14MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Draw Logic Gates
15MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Logic Circuit Analysis
• When logic circuit is given, we can analyze the circuit to obtain logical expression
• Example:– What is the Boolean expression for F4
16MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Logic Circuit Analysis
• What is the Boolean expression for F5
17MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Universal Gates: NAND & NOR
• Gate AND/OR/NOT is enough to build any Boolean function
• Even though, other gates is also used because:– Very useful (no choice)
– Save transistor’s number
– Self sufficient (can build any gate from it)
NAND/NOR: save, self sufficient
XOR: useful (e.g. execute parity bit)
18MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
NAND Gate
• NAND gate is self sufficient (i.e.can build any gate from it)
• Can be used for building AND/OR/NOT gate
• Build NOT gate using NAND gate
19MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
NAND Gate
• Build AND gate using NAND gates
• Build OR gate using NAND gates
20MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
NOR Gate
• NOR gate is also self sufficient
• Can be used for building AND/OR/NOT gate
• Build NOT gate using NOR gate
21MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
NOR Gate
• Build AND gate using NOR gates
• Build OR gate using NOR gates
22MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Build using NAND gate
• It is not impossible to build Boolean expression using NAND gatesSteps– Obtain sum-of-product Boolean expression
• E.g: F3 = xy’ +x’z
– Use DeMorgan theorem to get expression using two level NAND gate
• E.g: F3 = xy’ +x’z = (xy’+x’z)” = ((xy’)’.(x’z)’)’
23MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Build using NAND gate
24MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Build using NOR gate
• It is not impossible to build Boolean expression using NOR gatesSteps– Obtain product-of-sum Boolean expression
• E.g: F6 = (x+y’).(x’+z)
– Use DeMorgan theorem to get expression using two level NAND gate
• E.g: F3 = (x+y’).(x’+z) =((x+y’).(x’+z))’’ = ((x+y’)+(x’+z)’)’
25MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Build using NOR gate
26MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Positive & Negative Logic
• In logic gate, most of the time– H (High Voltage, 5V) = logic 1
– L (Low Voltage, 0V) = logic 0
• This is called positive logic• However, if it is inverted, it is negative logic
– H (High Voltage, 5V) = logic 0
– L (Low Voltage, 0V) = logic 1
• Depends, some similar gate need different Boolean function
27MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Positive & Negative Logic
• Signal which is set to logic 1 is said to be active and true
• Signal which is set to logic 0 is said to be not active and false
• The name of active high signal is always written in non-compliment form
• The name of active low signal is always written in non-compliment form
28MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Positive & Negative Logic
29MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Construction of SOP Expression
• Sum-of-product expression can be built using– Two level logic gate AND-OR– Two level logic gate AND-NOT
• Logic AND-OR gate
30MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Construction of SOP Expression
• NAND-NAND circuit (with transformation circuit)– Add two balls– Change OR with NAND
with inverted input and ball
on it’s compliment input
31MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Construction of POS Expression
• Product-of-sum expression can be built using– Two level logic gate AND-OR– Two level logic gate AND-NOT
• Logic AND-OR gate
32MOHD. YAMANI IDRIS/ NOORZAILY MOHAMED NOOR
Construction of POS Expression
• NOR-NOR circuit (with transformation circuit)– Add two balls– Change AND with NOR
with inverted input and ball
on it’s compliment input
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