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By,Manikandan SampathkumarU84037635

DOUBLE PATTERNING LITHOGRAPHY FOR 32NM HALF PITCH NODE AND BEYOND

•Optical microlithography is a process very similar to photographic printing. It is used for transferring circuit patterns into the silicon wafer.

• The pattern to be replicated on the wafer is first carved on a mask composed of quartz and chrome features. Light passes through the clear quartz areas and is blocked by the chrome areas.

•We use an illuminator (UV light) to shine light through this mask producing an image of the pattern through the lens system, which is eventually projected down into a photo resist coated silicon wafer using a projection system.

Introduction

CD = CD = Resolution or minimum feature size ( Critical dimension).k1 =  Coefficient that encapsulates process related factors(k1 factor).λ =  Wavelength of light used.NA = Numerical aperture. 

We can see from the graph that the critical dimension is constantly dropping to a lower and lower value . The 3 main factors that can reduce the CD are :

1) Increasing NA2) Decreasing k13) Decreasing λ

RAYLEIGH’S CRITERION

What is the best way to reduce CD??• Increasing NA ?

When the NA is increased beyond a value (0.93) , it has adverse effects on the depth of focus , the formula is given by :

(k2 = another process related coefficient)

NA cannot be increased at the cost of reducing the depth of focus,which will reduce the sharpness of the image printed .

•Decreasing λ?

When λis reduced below 193nm it faces a lot of technical issues cost, risk, and most importantly throughput .

• Reducing k1 ? Reducing k1 is the best option available to reduce the resolution size without affecting the depth of focus . However in a single patterning the the value of k1 is restricted to a minimum of 0.25 and cannot go beyond that .

What is the solution ?

• We know that the minimum value for k1 in a single patterning or exposure is 0.25 , so to reduce the value of k1 further , multiple patterning's are incorporated .

Double patterning :

Double patterning is a technique that decomposes a single layout into two masks in order to increase pitch size and improve depth of focus (Df) .

• The basic idea is that if a pitch of interest is not achievable in a single lithography step, the design is split over two lithography layers in a way that the minimum pitch is relaxed with respect to the target pitch. In this way the effective k1 of the total process (i.e., the combination of the two lithography steps) can drop below the theoretical limit of 0.25 for a single patterning process. The increased pitch size enables higher resolution and better printability.

So how does the process work ?

The easiest way to implement this is by transferring the first litho step into a hard mask layer by etch and subsequent imaging and etching of a second photoresist layer. This litho-etch-litho-etch approach can for instance be achieved either by double trench or double line patterning. Step 1• Resist exposed by a 45nm mask .

Step 2• Etch

Step 3• After etch image

Step 4• Trim

Step 5• A second layer sensitive to a different photoresist is added.

Step 6• The most important step which shows how the lines are doubled in this one step by cleverly adding thinner lines along the originals and getting rid of the originals later .

• This single step reduces the pitch size from 45nm to 22nm .

Step 7• The final outcome having double the number of structures .

SEM image of a process after double patterning . ->

• L/S means equal lines and spaces• λ = 193 nm• NA = 0.9

Thus by decreasing the values of k1 (by using double patterning ) we are able to incorporate double the number of features which proves to be the best lithography option for manufacturing a half pitch node of 32nm and beyond.

References :

• Mask design for single and double exposure optical microlithography: an inverse imaging approach - Amyn Poonawala

• Lithography Options for the 32 nm Half Pitch Node and Beyond - Kurt Ronse, Philippe Jansen, R. Gronheid, Eric Hendrickx, M. Maenhoudt, Vincent Wiaux, Anne-Marie Goethals, R. Jonckheere, and G. Vandenberghe , IEEE spectrum

• ASML – Double patterning : The dual carriageway to smaller chip

• Fundamental principals of optical lithography : Chris Mack