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DP-FMC-5001 400 MHz Dual Channel 14 Bit FMC ADC · The DP-FMC-5001 single width FMC board is...

Date post: 27-Aug-2018
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KEY FEATURES AND BENEFITS APPLICATIONS h Two 400 MSPS, 14 bit ADCs in a single board. h 2V Input range. p-p h 1.2 GHz analog input bandwidth. h External and internal clocking option through the software. h Programmable internal clock oscillator. h On board clock synthesizer and jitter cleaner. h Compatibility to high speed ADCs (ADS5463/ADS54RF63/ADS5440/ADS544 4) in board level. i IF Signal Processing i Radar System i Signal Intelligence i Broadband Data Applications DESCRIPTION BLOCK LEVEL EXPLANATION ADC SECTION EXTERNAL CLOCK SECTION TRIGGER INPUT/OUTPUT EEPROM INTERFACE The DP-FMC-5001 single width FMC board is designed as per the VITA57.1 standard. The board has two numbers of high speed ADC (ADS5474) channels for analog to digital conversion. The ADS5474 is a 400 MSPS, 14-bit, buffered ADC. It receives the analog input through the SMC connector, transformer coupled and 50O terminated. This board supports1.2GHz input bandwidth. The received analog signal is converted into digital signal and the converted signal is directly sent to the FPGA (mounted on the carrier board) using the control lines. The single ended clock receives the clock input through the SMC connector and it is converted into differential clock by using a transformer. This clock signal is divided into two, using power divider and sent to the ADCs. The external trigger is used to provide synchronization among multiple modules. The input and output trigger circuit gives an optimized control to the circuit. 2KBits (256 x 8 bits) Electrically Erasable Programmable Read Only Memory (EEPROM) is used to store the details as per the FMC VITA57.1 specifications. It is interfaced with the carrier board using I²C protocol as per IPMI (Intelligent Platform Management Interface) specifications. A D C A D C H ig h P i n C o n n e c t o r L D O L D O P O W E R D IV ID E R T R A N S F O R M E R T R A N S F O R M E R C o n t r o l S ig n a ls D a t a [ 0 : 1 3 ] C o n t r o l S ig n a ls D a t a [ 0 : 1 3 ] T R I I N A D C 1 C L K I N T R I O U T L V P E C L _ I N L V P E C L _ O U T A D C 2 DP-FMC-5001 400 MHz Dual Channel 14 Bit FMC ADC 9 B
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Page 1: DP-FMC-5001 400 MHz Dual Channel 14 Bit FMC ADC · The DP-FMC-5001 single width FMC board is designed as per the VITA57.1 standard. The board has two numbers of high speed ADC (ADS5474)

KEY FEATURES AND BENEFITS

APPLICATIONS

hTwo 400 MSPS, 14 bit ADCs in a single board.

h2V Input range. p-p

h1.2 GHz analog input bandwidth.

hExternal and internal clocking option through the software.

hProgrammable internal clock oscillator.

hOn board clock synthesizer and jitter cleaner.

hCompatibility to high speed ADCs (ADS5463/ADS54RF63/ADS5440/ADS5444) in board level.

iIF Signal Processing

iRadar System

iSignal Intelligence

iBroadband Data Applications

DESCRIPTION

BLOCK LEVEL EXPLANATION

ADC SECTION

EXTERNAL CLOCK SECTION

TRIGGER INPUT/OUTPUT

EEPROM INTERFACE

The DP-FMC-5001 single width FMC board is designed as per the VITA57.1 standard. The board has two

numbers of high speed ADC (ADS5474) channels for analog to digital conversion.

The ADS5474 is a 400 MSPS, 14-bit, buffered ADC. It receives the analog input through the SMC connector,

transformer coupled and 50O terminated. This board supports1.2GHz input bandwidth. The received analog

signal is converted into digital signal and the converted signal is directly sent to the FPGA (mounted on the

carrier board) using the control lines.

The single ended clock receives the clock input through the SMC connector and it is converted into differential

clock by using a transformer. This clock signal is divided into two, using power divider and sent to the ADCs.

The external trigger is used to provide synchronization among multiple modules. The input and output trigger circuit gives an optimized control to the circuit.

2KBits (256 x 8 bits) Electrically Erasable Programmable Read Only Memory (EEPROM) is used to store the

details as per the FMC VITA57.1 specifications. It is interfaced with the carrier board using I²C protocol as per

IPMI (Intelligent Platform Management Interface) specifications.

ADC

ADC

High

Pin

Connector

LDO

LDO

POWER

DIVID

ER

TRANSFO

RMER

TRANSFOR

MER

Control Sig

nals

Data[0

:13]

Control Sig

nals

Data[0

:13]

TRI

IN

ADC

1

CLK

IN

TRI

OUT

LVPECL_IN

LVPECL_OUT

ADC

2

DP-FMC-5001 400 MHz Dual Channel 14 Bit FMC ADC

9

B

Page 2: DP-FMC-5001 400 MHz Dual Channel 14 Bit FMC ADC · The DP-FMC-5001 single width FMC board is designed as per the VITA57.1 standard. The board has two numbers of high speed ADC (ADS5474)

113 33

TRIGGER

MECHANICAL

ENVIRONMENT

ORDERING INFORMATION

LVPECL Input and Output

Dimensions in mm : 84.1 (L) x 69 (B) x 14.8 (W)

Rugged

Cooling : Conduction cooled

Operating Temperature : -40°C to 75°C

Storage Temperature : -40°C to 80°C

Humidity : 0 - 95% (Non condensing)

DP-FMC-5001- X X X

Reserved

0-MMCX Connector

3-SMC Connector

6-Mating Connector

TYPE

ANALOG INPUTS

CHARACTERISTICS

EXTERNAL CLOCK

POWER REQUIREMENTS

Single slot conduction cooled FMC module

Range : 2 Vp-p

Bandwidth : 1.2GHz

H

70 70 H

Strength : 3Vp-p

Clock Connectors :

Connector : 50O , SMC connector

Signal to Noise Ratio : 59 dBFS at 70 M z

Spurious Free Dynamic Range : dBc at M z

50O, AC coupled, SMC connector

Power : 12V at 0.55A for Dual channel

3.3V at 0.62A for Dual channel

SPECIFICATIONS

DP-FMC-5001

10

Page 3: DP-FMC-5001 400 MHz Dual Channel 14 Bit FMC ADC · The DP-FMC-5001 single width FMC board is designed as per the VITA57.1 standard. The board has two numbers of high speed ADC (ADS5474)

BLOCK DIAGRAM OF DP-FMC-5001

DP-FMC-5001

11

B


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