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Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot...

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Dr Ben Black Systems Engineer National Instruments [email protected]
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Page 1: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Dr Ben Black – Systems Engineer

National Instruments

[email protected]

Page 2: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Agenda

• Trends in Automotive Electronics

• Flexible HIL Solutions

• High Speed Deterministic Data Transfer

• Distributed HIL

• Discontinuous Simulation Solvers

Page 3: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

The “Good” The “Bad”

The “Ugly”

Page 4: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Global Automotive Industry Trends

• Consumer electronics technologies in vehicles

• Alternative Energy

• Cost Reduction

• Reduced Emissions

• Increased Safety

• Differentiation through Features

• Global Design and ManufacturingThe “Ugly”

Page 5: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Automobiles Then and Now…

Mechanics and hydraulics

3 ECUs

AM/FM radio

Relay-control units

CAN

Electromechanics

15 to 80 ECUs

Telematics (Infotainment)

Power-control units

CAN, LIN, FlexRay, ...

Page 6: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

…and Software defines the Functionality

Engine control

unit

Page 7: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Software-Based Hardware Designs

• Benefits

Rapid Advancements

New and Improved

Functionality

Lower Cost

• Challenges

More functions to test

More measurements to

make

Unique functions to test

“For the next 10 years an increase of 10%-15% of software in the

share of costs of a vehicle is forecasted every year”- McKinsey&Company Study

Page 8: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Control Design Process

System

Testing

Modeling and

Design

Targeting

Rapid

Prototyping

Hardware-in-

the-Loop

Testing

Page 9: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Modeling and Design

Modeling and Design Produce Controller and Plant Models

Kc

Controller

Kp

Plant

Error

Control

Output FeedbackSetpoint

Page 10: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Rapid Control Prototyping

Creating a Functional Prototype of the Controller

Kc

Controller

Kp

Plant

Error

Control

Output FeedbackSetpoint

Page 11: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Rapid Control Prototyping Example

NI

CompactRIO

Drivven: “We prototyped a full-authority engine control system … in just

3 man-months. In past projects, it took us at least 2 man-years and over

$500,000 to develop similar ECU systems.”

Page 12: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Hardware-in-the-Loop Simulation

Testing Production Controller with Simulated Plant

Kc

Controller

Kp

Plant

Error

Control

Output FeedbackSetpoint

Page 13: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

What is HIL?

• The use of real-time I/O hardware to simulate the dynamic behavior of a device that interfaces to the unit under test. Dynamic – stimulus reacts to the response of the UUT (closed-

loop)

Static – stimulus ignores the response of the UUT (open-loop)

• The simulator may use programming languages, state charts, modeling languages or other methods to describe the input/output behavior (dynamics) of the device

Page 14: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

What is HIL?• Types of test

Functional

Parametric

Validation (V&V)

Durability (HALT/HAST)

End-of-line

• Methods in test

Temperature/power variation

Salt/sand spray

EM radiation

Loading/resistance

HIL Simulation

Page 15: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

The “Good” The “Bad”

The “Ugly”

Page 16: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Example…the automobile

3 ECUs 15 to 70 ECUs in 10 years

Page 17: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Automotive Electronics vs. CO2 Consumption

The effect...

Electronic causes 5% of a cars CO2 Emissions

State of the art Infotainment System:

4-6 Ampere ≈ 0,1 Liter gasoline ≈ 2 Gramms CO2

Innovation vs. CO2 Reduction

Page 18: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

The “Good” The “Bad”

The “Ugly”

Page 19: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

HIL for ECU Test

Challenges –

Modularity: No method of drag-and-drop ECU

hardware architecture

Flexibility: Difficult to add or swap ECUs in a current

test configuration

Wiring/Cabling: Direct I/O wiring makes re-wiring

tedious and time-consuming

Cost: Significant loss of “up-time”

Page 20: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Flexible HIL Solutions

• I/O with Deterministic Data Transfer

• Integrated Signal Conditioning

• High Resolution Measurements (up to 24 bits)

• Flexible and Modular ECU/HIL Testing Environment

• Distributed Simulation

Page 21: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

FPGA and Reconfigurable IO

8-Slot cRIO

ADC and Integrated Signal Conditioning

FPGA on cRIO

Backplane

C-Series Modules

Page 22: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

FPGA and Reconfigurable IO

Knock Signal GenerationSensor Simulation

(LVDT)

Custom Serial ProtocolsCrankshaft Simulation

Page 26: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

High Speed Deterministic Data Transfer

• Master/Slave Architecture

• Expandable I/O

• Optimized for Single-Point Industrial Data Transfer

• Predictable Timing and Precise Synchronization

• Masters Use Off-the-Shelf Ethernet Interface

• Continuous Data Flow Through Multiple Slaves

• High Bandwidth Efficiency

Page 27: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

High Speed Deterministic Data Transfer

PXI

Smart Camera8-Slot cRIO

NI Masters

NI Slaves

NI 8353 Rack-Mount RT

Future

Page 30: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Change out ECUs as needed with pre-

assembled ECUs and I/O modules

Real-Time

Processor

(Master)

Flexible HIL SolutionsNeed to test a different car?

Page 31: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Use same RT Processor, just switch

ECU software models

Real-Time

Processor

(Master)

Flexible HIL SolutionsNeed to test a different car?

Page 32: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Distributed Simulation

Page 33: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Discontinuous Simulation Solvers

Page 34: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Summary of Computer Simulation

What Why How

Off-linePlant (dynamic system)

Controller

Design prototype controller

Investigate behavior

Variable step : for precision

Fixed-step : for speed

Real-Time Plant (dynamic system)Validate prototype controller

Field diagnostic toolFixed step - HIL

Electrical SystemsMechanical Systems

Physical Systems Chemical Systems

Dynamic Systems Discontinuous Systems

Page 35: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

∫u y y(t) = u(t)

Simulation of Dynamic System

Dynamic system Differential equations

Variable step approximation

tat

u

y(a)

tb tat

u

y(a)

tbt1

y(1)

tat

u

y(a)

tbt1

y(1)

t2

y(2)

Solved through error control

In the presence of a discontinuity :

tta tbt1 t2tk-1 tk… …

Iteratively locate the discontinuity

until(tk – tk-1) = very very small

k = non-deterministic

Page 36: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Fixed-step approximation

1 step methods

t(n-1) t(n) t

uy(n)

Backward Euler

t(n-1) t(n) t

y

y(n)

y(n) = y(n-1)+Ty(n)

t(n-1) t(n) t

u

y(n-1)

y(n) Trapezoidal

t(n-1) t(n) t

y

y(n) = y(n-1)+½T(y(n)+y(n-1))

t(n-1) t(n) t

u

y(n-1)

t(n-1) t(n) t

y

y(n-1)

Forward Euler

y(n) = y(n-1)+Ty(n-1)

Simulation of Dynamic System

Page 37: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Backward Euler

t(n-1)

t(n)

t

u

y(n)

t(n-1) t(n) t

yTθ

In the presence of a discontinuity :

t(n-1) t(n) t

y Tθ

Forward Euler

t(n-1) t(n) t

u Tθ

Trapezoidal

t(n-1)

t(n)

t

u Tθ

t(n-1) t(n) t

yTθ

Simulation of Dynamic System

Page 38: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Impact of discontinuity errors : Electrical system example

0 0.1 0.2 0.3 0.4 0.5

0

1

2

3

-1

-2

-3Cu

rren

t er

ror

(in

A)

Time (in s)

Ideal variable step

h

+360 Vdc

3 HP

++

-Iref

Iabc

0 0.1 0.2 0.3 0.4 0.5

0

1

2

3

-1

-2

-3

Cu

rren

t er

ror

(in

A)

Time (in s)

Standard fixed step (Ts = 20 μs)

h

Standard fixed step (Ts = 2 μs)

0 0.1 0.2 0.3 0.4 0.5

0

1

2

3

-1

-2

-3Cu

rren

t er

ror

(in

A)

Time (in s)

h

Simulation of Dynamic System with Discontinuities

Page 39: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Problems :

- Where is the boundary ?

- What happens at the

boundary ?

Discontinuous system Piecewise continuous system

Boundary : special calculation

t(n)

u

y(n)

t(n-1)

y(n-1)

y(θ )-

y(θ )+

continuous

continuous Tθ = ?

Fixed step simulation of discontinuous systems

y(θ )+

t(n)

u

y(n)

t(n-1)

y(n-1)

y(θ )-y(n)

1

2

3

4

1 – Calculate y(n) (discontinuity undetected). 3 – Process the boundary : special calculation.

2 – Detect the discontinuity and determine Tθ. 4 – Recalculate y(n).

In fixed step :

Page 40: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

Cu

rren

t er

ror

(in

A)

0 0.1 0.2 0.3 0.4 0.5

0

1

2

3

-1

-2

-3

Time (in s)

Ideal variable step

h

Iabc

+360 Vdc

3 HP

+

+

-

Iref

Real-Time (Ts = 55 μs)

Cu

rren

t er

ror

(in

A)

0 0.1 0.2 0.3 0.4 0.5

0

1

2

3

-1

-2

-3

Time (in s)

h

Real-Time (Ts = 75 μs)C

urr

ent

erro

r (i

n A

)

0 0.1 0.2 0.3 0.4 0.5

0

1

2

3

-1

-2

-3

Time (in s)

h

Real-Time Simulation of Power Electronics Circuits

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0-10

0

10

20

30

40

50

60

Time (in s)

An

gu

lar

velo

city

(in

rp

m)

Ideal

New (55 μs)

New (75 μs)

Motor Angular VelocityElectric Drive Test Bench

Page 41: Dr Ben Black Systems Engineer National Instruments ben.black@ni Keynote Presentation … · 8-Slot cRIO ADC and Integrated Signal Conditioning FPGA on cRIO Backplane C-Series Modules.

The “Good” Approach

Flexible solutions• Customize software with LabVIEW

• Customize hardware with FPGA

• Integrate I/O nodes quickly and easily

• Distribute the simulation

Improved Solver


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