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Dual gate lateral inversion layer emitter transistor for power and high voltage integrated circuits

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Dual gate lateral inversion layer emitter transistor for power and high voltage integrated circuits U.N.K. Udugampola, R.A. McMahon, F. Udrea, K. Sheng, G.A.J. Amaratunga, E.M.S. Narayanan, S. Hardikar and M.M. De Souza Abstract: The dual gate lateral inversion layer emitter transistor (DGLILET) is a versatile device with controlled carrier injection and ultra-fast switching capability. The DGLILET has improved trade-off between the on-state and turn-off losses, enabling the performance of high voltage integrated circuits (HVICs) to be enhanced by reducing overall losses at switching frequencies over approximately 10 kHz. This paper focuses on the use of the DGLILET in these applications and demonstrates experimental results of the fabricated devices confirming the enhanced performance. 1 Introduction Emerging high voltage integrated circuits (HVICs) are attractive for many applications as they enable circuitry to be significantly simplified. Potential applications include integrated switches for switch-mode power supplies and single chip inverters for three-phase motors. In developing HVICs, the emphasis is on increasing the power handling capability, but processing issues limit the chip size. It is therefore essential to develop devices which combine good on-state performance to get high current handling capacity with good switching performance to minimise the total losses to be removed from the chip. HVICs use lateral power devices. Lateral MOSFETs have high switching speed and low switching losses but operate at relatively low current densities in the on-state. Lateral IGBTs give a higher current density for the same voltage drop but have relatively poor switching perfor- mance. They exhibit a tail current that leads to a significant switching loss. Lifetime killing by irradiation can be used to reduce the switching loss but at the expense of increased on- state losses. Unfortunately, lifetime killing also degrades the performance of CMOS devices in an HVIC. Incorporating anode shorts in an LIGBT gives the device a much improved switching performance, but the anode-shorted LIGBT has an inherent snapback characteristic which is unattractive. Consequently, the anode-shorted LIGBT is not used in practice. The dual gate inversion layer emitter transistor (DGLI- LET) is a device with the capability to control carrier injection and fast switching [1] . The combination of the shorted anode structure and the anode gate of the device enables very high switching speeds to be attained while suppressing the undesirable voltage snapback [2] . It offers a better balance between on-state and switching performance than other lateral power devices especially at higher operating frequencies. 2 Structure and operation of the DGLILET The DGLILET resembles the anode-shorted LIGBT in structure except for the anode gate. The cross-section of the device is shown in Fig. 1. The cathode gate performs the role of the main control gate and the anode gate controls carrier injection. Applying a positive voltage to the cathode gate while having the anode gate shorted to the anode will cause electrons to flow from the cathode n + diffusion to the anode n + diffusion. This is a unipolar conduction mode resembling the operation of a lateral MOSFET. If the anode gate is biased negative with respect to the anode an inversion layer of holes is formed under the anode gate, effectively extending the p + diffusion of the anode over the n-drift region. These holes are at anode potential initially, but the flow of electrons under the hole inversion layer will lower the potential below the holes. This potential difference results in forward biasing the p-n junction formed by the hole inversion layer and the n-drift region underneath, leading to the injection of holes into the drift region, thereby modulating the conductivity of the DGLILET [3] . cathode cathode gate anode anode gate p substrate p-well n-drift n + n-well n + p + p + Fig. 1 Cross-section of dual gate lateral inversion layer emitter transistor (DGLILET) U.N.K. Udugampola, R.A. McMahon, F. Udrea and G.A.J. Amaratunga are with the Engineering Department, Cambridge University, Trumpington Street, Cambridge CB2 1PZ, UK K. Sheng is with the Department of Electrical and Computer Engineering, Rutgers University, Piscataway, New Jersey 08854-8058, USA E.M.S. Narayanan, S. Hardikar and M.M. De Souza are with the EMTERC, Hawthorn Building, De Montfort University, Leicester LE1 9BH, UK r IEE, 2004 IEE Proceedings online no. 20040447 doi:10.1049/ip-cds:20040447 Paper received 26th February 2004. Originally published online: 18th May 2004 IEE Proc.-Circuits Devices Syst., Vol. 151, No. 3, June 2004 203
Transcript

Dual gate lateral inversion layer emitter transistor forpower and high voltage integrated circuits

U.N.K. Udugampola, R.A. McMahon, F. Udrea, K. Sheng, G.A.J. Amaratunga, E.M.S. Narayanan, S. Hardikarand M.M. De Souza

Abstract: The dual gate lateral inversion layer emitter transistor (DGLILET) is a versatile devicewith controlled carrier injection and ultra-fast switching capability. The DGLILET has improvedtrade-off between the on-state and turn-off losses, enabling the performance of high voltageintegrated circuits (HVICs) to be enhanced by reducing overall losses at switching frequencies overapproximately 10kHz. This paper focuses on the use of the DGLILET in these applications anddemonstrates experimental results of the fabricated devices confirming the enhanced performance.

1 Introduction

Emerging high voltage integrated circuits (HVICs) areattractive for many applications as they enable circuitry tobe significantly simplified. Potential applications includeintegrated switches for switch-mode power supplies andsingle chip inverters for three-phase motors. In developingHVICs, the emphasis is on increasing the power handlingcapability, but processing issues limit the chip size. It istherefore essential to develop devices which combine goodon-state performance to get high current handling capacitywith good switching performance to minimise the totallosses to be removed from the chip.

HVICs use lateral power devices. Lateral MOSFETshave high switching speed and low switching losses butoperate at relatively low current densities in the on-state.Lateral IGBTs give a higher current density for the samevoltage drop but have relatively poor switching perfor-mance. They exhibit a tail current that leads to a significantswitching loss. Lifetime killing by irradiation can be used toreduce the switching loss but at the expense of increased on-state losses. Unfortunately, lifetime killing also degrades theperformance of CMOS devices in an HVIC. Incorporatinganode shorts in an LIGBT gives the device a muchimproved switching performance, but the anode-shortedLIGBT has an inherent snapback characteristic which isunattractive. Consequently, the anode-shorted LIGBT isnot used in practice.

The dual gate inversion layer emitter transistor (DGLI-LET) is a device with the capability to control carrierinjection and fast switching [1]. The combination of theshorted anode structure and the anode gate of the deviceenables very high switching speeds to be attained whilesuppressing the undesirable voltage snapback [2]. It offers a

better balance between on-state and switching performancethan other lateral power devices especially at higheroperating frequencies.

2 Structure and operation of the DGLILET

The DGLILET resembles the anode-shorted LIGBT instructure except for the anode gate. The cross-section of thedevice is shown in Fig. 1. The cathode gate performs therole of the main control gate and the anode gate controlscarrier injection. Applying a positive voltage to the cathodegate while having the anode gate shorted to the anode willcause electrons to flow from the cathode n+ diffusion to theanode n+ diffusion. This is a unipolar conduction moderesembling the operation of a lateral MOSFET. If theanode gate is biased negative with respect to the anode aninversion layer of holes is formed under the anode gate,effectively extending the p+ diffusion of the anode over then-drift region. These holes are at anode potential initially,but the flow of electrons under the hole inversion layer willlower the potential below the holes. This potential differenceresults in forward biasing the p-n junction formed by thehole inversion layer and the n-drift region underneath,leading to the injection of holes into the drift region, therebymodulating the conductivity of the DGLILET [3].

cathode cathode gate anodeanodegate

p substrate

p-well n-drift

n+

n-well

n+p+p+

Fig. 1 Cross-section of dual gate lateral inversion layer emittertransistor (DGLILET)

U.N.K. Udugampola, R.A. McMahon, F. Udrea and G.A.J. Amaratunga arewith the Engineering Department, Cambridge University, Trumpington Street,Cambridge CB2 1PZ, UK

K. Sheng is with the Department of Electrical and Computer Engineering,Rutgers University, Piscataway, New Jersey 08854-8058, USA

E.M.S. Narayanan, S. Hardikar and M.M. De Souza are with the EMTERC,Hawthorn Building, De Montfort University, Leicester LE1 9BH, UK

r IEE, 2004

IEE Proceedings online no. 20040447

doi:10.1049/ip-cds:20040447

Paper received 26th February 2004. Originally published online: 18th May 2004

IEE Proc.-Circuits Devices Syst., Vol. 151, No. 3, June 2004 203

As the doping density of the n-drift region is significantlylower than that of the n-well region, the major part of thepotential drop in electron flow path is under the part ofanode gate extending over the n-drift region. This has thebenefit that a potential difference sufficient to bias theinversion layer/n-drift region junction into conduction isdeveloped at a very low current density. This ensureseffective suppression of snapback during the transition ofthe DGLILET from its unipolar mode of conduction to theconductivity modulated mode.

2.1 Anode structureFull control over hole injection into the drift region can beachieved by minimising the length of the p+ anodediffusion. This prevents the potential drop owing to lateralelectron current flow beneath the p+ diffusion becominglarge enough to forward bias the p+ diffusion/n-welljunction at normal operating current densities. This ensuresthat injection takes place only from the hole inversion layerand thus the anode gate has full control of injection. Thedevice can therefore be switched between the unipolar andbipolar modes of conduction. Switching the anode gate offbefore the actual turn off of the device suppresses injectionand improves the turn off speed of the device.

Alternatively, the dimensions of the p+ diffusion can bechosen so that the injection of holes from the p+ diffusioninto the n-well can occur as part of normal device operation.Again, the injection of holes takes place initially from thehole inversion layer, maintaining the suppression of snap-back, with injection from the p+ diffusion starting above acertain current density. In this design, turning off the anodegate before cathode gate may not suppress injection,depending on the operating current density. The on-stateperformance of the device is improved owing to a higherlevel of modulation with only a slight increase in turn-offtime. Thus, there is a clear possibility of using the design ofthe anode structure to achieve a trade-off between theswitching performance and the on-state performance [3].

3 Experimental results

The DGLILETs were fabricated using a CMOS compatiblepower integrated process (CCPIC). A fully implantedjunction isolation technology was used on bulk siliconwafers. The fabricated DGLILETs showed a typicalblocking voltage of 500V. A breakdown characteristic ofa device is shown in Fig. 2.

In order to make the comparison with the DGLILET,conventional LIGBTs with an active area of 0.3mm2 werealso fabricated on the same wafer. Figure 3 depicts the on-state characteristics of the two devices. The measurementswere carried out under pulsed conditions and the devicetemperature is essentially constant at 251C.

The LIGBT can operate at higher current densities for agiven on-state voltage than the DGLILET and this ismainly due to the higher level of injection in the LIGBT.Moreover, the voltage drop due to the current flow in theanode inversion layer also contributes to the higher on-statevoltage drop in the DGLILET.

When the DGLILET is operating in the bipolarconduction mode at elevated temperatures, simulations inMedici predict an increase in the forward voltage. Underthese conditions the anode p+/n-well junction can becomeforward biased at high current densities. Increasing injectionof holes by this junction into the n-drift region andsubsequent increase of current in the p-well will ultimatelylead to latch up of the device. This phenomenon is onlyexpected at steady state current densities above 80A/cm2 ata junction temperature of 1251C. The current density atwhich latch-up occurs can be increased by proper selectionof n-well doping density.

To explore the switching performance, the devices werebonded and incorporated into a test circuit with a diodeclamped inductive load. The devices used in these tests weredesigned for full control of injection by the anode gate.Minimum overall loss in the DGLILET can be obtained byoptimally timed switching of the two gates as analysed in[2], but, for reasons of simplicity, the two gates wereswitched simultaneously in these tests. Again these testswere carried out under pulsed conditions and no significanttemperature rise is expected.

The switching waveforms of a DGLILET with an activearea of 1mm2 are shown in Fig. 4. The cathode and anodegate voltages were 5V and �5V respectively. Theseexperimental results show that the DGLILET switcheswith a tail current lasting for approximately 250ns. Thismarkedly superior performance of the DGLILET enablesthe device to operate at higher frequencies than LIGBTs.Figure 5 shows the switching waveforms of a DGLILETswitching at 400kHz with a 40% duty cycle.

The switching waveforms of the diode clamped inductiveload for the LIGBT, at the same current density as theDGLILET, show a tail current of approximately 1.5ms.The calculations show that the turn off losses due to tailcurrent for the DGLILET and the LIGBT are 3mJ/cycleand 90mJ/cycle respectively while switching at 300V with acurrent density of 30A/cm2.

For comparison, the commercially available ECN3067power IC, which employs lateral IGBTs as the powerswitch, shows a turn off loss of the order of 100mJ per cycleper IGBT when switching 1 A [4–6]. In the dielectric

0

0

200 400 600voltage, V

25

20

15

10

5

−5

curr

ent,

µA

Fig. 2 Breakdown characteristics of DGLILET

0

5

10

15

20

25

30

35

40

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5drain voltage, V

curr

ent d

ensi

ty, A

/cm

2

DGILET AG-8VCG6V

DGILET AG-8VCG5V

LIGBT gate 3V

LIGBT gate 6V

Fig. 3 Comparison of on-state performance of DGLILET withLIGBT (AG–anode gate, CG–cathode gate)

204 IEE Proc.-Circuits Devices Syst., Vol. 151, No. 3, June 2004

isolated technology used in fabricating these devices, thislevel of switching loss can be achieved only by using lifetimekilling.

4 Comparision of overall Losses

These measurements of on-state and switching performanceof the two devices allow direct comparison between the twodevices. The overall losses of the two devices per cycle whenoperating at a 50% duty cycle are plotted against thefrequency in Fig. 6.

This shows that at frequencies above approximately10kHz the DGLILET offers a better overall performancethan the LIGBT. Moreover, it shows that operating up toseveral hundred kilohertz is practical without excessivelosses. The DGLILET offers a switching capability close toa MOSFET with a three to five times higher currentdensity.

5 Optimal operation of gates

The two gates of the DGLILET also make it a versatiledevice by enabling it to be switched between the unipolarand bipolar modes of conduction. This provides a means ofswitching the DGLILET into the unipolar mode slightlybefore turn off, allowing it to be switched as a MOSFETwith a very high switching speed and minimum losses. Inthis scheme, a portion of the reduction in turn-off losses isoffset by the additional loss arising from an increased on-state voltage due to switching the device into the unipolarmode of conduction for a short period of time before turnoff. With this design of the DGLILET, where the injectionis fully controlled by the anode gate, minimum losses can beobtained with optimum timing of the two gates.

As the DGLILET is inherently fast, in a simpler drivingscheme, the two gates can be switched simultaneouslywithout much increase in losses. Simulations show that theincrease in losses in this scenario is in the region of 10–20%[2]. Although the total losses are increased, the driving ofthe two gates and timing issues can be simplified in thisapproach. Since switching back to the unipolar mode is notsought in this scheme of operation, full control of injectionby the anode gate is not needed.

6 Driving the DGLILET

Although the DGLILET exhibits a number of desirablecharacteristics, these are realised at the expense of having todrive two gates, one of which is referenced to the anode. Toremove this complexity, a dual gate driver circuit has beendesigned and fabricated using the same CCPIC process.This relieves the user of the burden of having to drive twoterminals and essentially creates a three-terminal device. Thedetails of design and operation of the driver circuit will bediscussed elsewhere.

7 Conclusions

DGLILETs for use in HVICs have been fabricated in aCMOS-compatible process and exhibit breakdown voltagesin excess of 500V. The DGLILETs operate at a currentdensity three to five times greater than that of a MOSFET.The switching speed is about 250ns and the turn-off loss is asmall fraction of that for an LIGBT. As a consequence, theDGLILET gives lower overall losses above 10kHz and

Fig. 4 Switching waveforms of a DGLILET with an inductive loadVertical scales of the gate voltage, device current and the device voltagewaveforms are 5V/div, 200mA/div and 100V/div respectively, thehorizontal scale is 200ns /div

Fig. 5 Switching waveforms of DGLILET at 400 kHz withinductive loadVertical scales of gate voltage, device current and device voltagewaveforms are 5V/div, 200mA/div and 100V/div respectively, thehorizontal scale is 500ns /div

tota

l los

s, W

0

1

2

3

4

5

frequency, kHz

10_1 100 101 102 103

LIGBT

DGLILET

Fig. 6 Variation of total loss of DGLILET and LIGBT withfrequencySwitching voltage 300VCurrent density 30A/cm2

IEE Proc.-Circuits Devices Syst., Vol. 151, No. 3, June 2004 205

operation at a switching frequency of several hundredkilohertz is also feasible. Using the DGLILET can thereforegreatly extend the performance envelope of HVICs, forexample making them attractive for use in switch-modepower supplies.

The superior performance of the DGLILET arises fromthe use of an anode gate to control carrier injection. Theperformance of the DGLILET can be further optimised byvarying the design of the anode gate structure to giveparticular injection characteristics. The device can then beoptimised with regard to forward voltage drop, switchingloss and suppression of snapback as desired. The anode gaterequires special drive circuitry but this can be monolithicallyintegrated to make the DGLILET appear like a three-terminal device to the user.

8 Acknowledgments

This research was carried out as a part of the Power andHigh Voltage Integrated Microelectronics (PHIMEC)project supported by the UK Engineering and PhysicalSciences Research Council. The Southampton UniversityMicroelectronic Centre is thanked for fabricating the

devices. U.N.K. Udugampola acknowledges the CambridgeCommonwealth Trust for awarding a scholarship enablingthis work. F. Udrea also acknowledges the award of anadvanced EPSRC fellowship (AF/100027).

9 References

1 Sheng, K., Udugampola, U.N.K., Khoo, G.F., Udrea, F., Amar-atunga, G.A.J., McMahon, R.A., Narayanan, E.M.S., and Hardikar,S.: ‘Dual Gate Lateral Inversion Layer Emitter Transistor’. , Proc. 14thInt. Symp. on Power Semiconductor Devices, Santa Fe, USA, 2002,pp. 37–40

2 Udrea, F., Udugampola, U.N.K., Sheng, K., McMahon, R.A.,Amaratunga, G.A.J., Narayanan, E.M.S., De Souza, M.M., andHardikar, S.: ‘ Experimental Demonstration of an ultra-fast DoubleGate Inversion Layer Emitter Transistor’, IEEE Electron Device Lett.,2002, 23, (12), pp. 725–727

3 Udrea, F., Amaratunga, G.A.J., Humphrey, J., Clark, J., and Evans,E.: ‘The MOS inversion layer as a majority carrier injector’, IEEEElectron Device Lett., 1996, 17, (9), pp. 425–427

4 Sakurai, N., Nemoto, M., Arakawa, H., and Sugawara, Y.: ‘A three-phase inverter IC for AC220V with drastically small chip size andhighly intelligent functions’. Proc. 5th Int. Symp. on Power Semi-conductor Devices, Monterey, USA, 1993, pp. 310–315

5 van der Duijn Schouten, N.P., Damasius, N.G., and McMahon, R.A.:‘New drive concepts using single chip inverters’. IEEE Industrialapplications conference, 2001, pp. 1715–1720

6 Hitachi, Ltd., High voltage monolythic IC ECN3067 datasheet, http://hitachi.co.jp

206 IEE Proc.-Circuits Devices Syst., Vol. 151, No. 3, June 2004


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