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E3 237 Integrated Circuits for Wireless Communication Gaurab Banerjee Department of Electrical...

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E3 237 Integrated Circuits for Wireless Communication Gaurab Banerjee Department of Electrical Communication Engineering, Indian Institute of Science, Bangalore [email protected] Lecture 1: Introduction
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E3 237 Integrated Circuits for Wireless Communication

Gaurab BanerjeeDepartment of Electrical Communication Engineering,

Indian Institute of Science, [email protected]

Lecture 1: Introduction

Course Web Page:

http://www.ece.iisc.ernet.in/~banerjee/course_E3237/index.htm

Class Timings:

Tuesdays/Thursdays, 1530-1700 IST, Room 1.08 , ECE Bldg.Please be on Time!

Office hours:

To be determined after week 2 of classes, Currently by Appointment Class Mailing List:

Please send me an email with E3 237 in the subject line (follow this convention for all course related emails) to get added to the class mailing list for announcements.

Administrative Matters

Grading and Course Structure: 3 lecture-hours per week2 homework assignments (10% of course grade)Midterm (25% of course grade)Project (5% on novelty, 15% on final report, 10% on group presentation)Final Examination (35% of course grade)

TAs: TBA

Text: No textbook: Please take notes in class, or make backup arrangements.

Recommended references:

1) RF Microelectronics by B. Razavi (Pearson)2) The Design Of CMOS Radio-Frequency Integrated Circuits by T. Lee

(Cambridge University Press)

Tentative Calendar: On Class Website.

Administrative Matters

Course ContentsSystem Level Concepts:

Noise and Linearity. Concepts such as noise figure, 2-port noise parameters, IIP3. Cascaded noise figure and IIP3. The modeling of an RF system using these concepts. Receiver and Transmitter Architectures.

Circuit Design: • RLC Networks, • Low Noise Amplifiers & Mixers• Voltage Controlled Oscillators • Phase Locked Loops and Synthesizers• Power Amplifiers

Case Studies:• Cellular Transceiver• Wireless LAN transceiver• Millimeter wave transceiver

Connection to other courses

E3 284: Digital VLSI Circuits

E3 yyy: ICs for Wireline Commn.

E3 zzz: ICs for Data Conversion

E8 242: RF ICs and Systems

• Prerequisite: If you wish to take this course for credit and have not taken E3 238, you need to take my permission.

• It is recommended that students take the Digital VLSI Circuits course (Prof. Amrutur) and the RF Systems Course (Prof. Vinoy) before signing up for this course.

E3 237:ICs for Wireless Commn.

E3 238: Analog VLSI Systems

Frequencies and Applications

1 GHz 10 GHz 100 GHz Bluetooth

802.11a WLAN

UWB

GSM/CDMA

850

GSM/CDMA

1900

GPS60 GHz 802.15.3.3c

77 GHz Radar

Sub-THz imaging

• Many commercial applications span the 1-10 GHz frequency range.

• Higher f T s are pushing CMOS radios to higher frequencies, traditionally the domain of SiGe or III-V semiconductors

• Many interesting research problems, plenty of employment !!!

24 GHz Radar

VHF/UHF Broadcasting

Commercial CMOS Products

0.35 um 0.25 um 0.18 um 0.13 um 90/65/45 nm

An informal look at wireless

An iPod-nano Teardown....

http://techon.nikkeibp.co.jp/english/NEWS_EN/20081016/159685/

..reveals many chips inside...

... including a Wireless LAN chip by Broadcom...

A more scientific look

A Broadcom 2.4 GHz WLAN Transceiver

S. Khorram et. al., “A Fully Integrated SOC for 802.11b in 0.18-m CMOS”, IEEE J. Solid State Circuits, Dec. 2005. (Broadcom Paper)

• Architecture: zero-IF with on-chip LPF for channel selectionSuper-heterodyne/low-IF architecture not chosen due to filter constraints.

• Gain = 88 dB, BW = 8 MHz, Noise Figure = 4.8-5.8 dB, excluding T/R switch

• Integrated PA, T/R switch, RF Baluns and Baseband MAC

The Receiver

LNA with on-chip balun

Wideband RSSI for blocker estimation

Narrowband RSSI for gain selection

Active Gilbert mixer

5th order Active RC LPF

8-b pipelined ADC

The Transmitter

Class AB stage with balun for SE 50-Ohm output

Current steering DAC for TX I/Q inputFiltering of Data

Converter image frequency

SSB mixers for up-conversion

The Local Oscillator

Crystal oscillator for Reference generation

Integer-N frequency synthesis

Receiver Front-end

5th order Active RC LPF – 8 MHz BW

LNA – Dominates RX Noise Figure

Programmable baseband Amplifiers

Received Signal Strength Indicators

88 dB RX gain with 8 MHz BW 6-7 dB Noise Figure with T/R switch included

Transmitter Front-end

1-dB compression point Max. TX output power = 13 dBm

I/Q mismatch causes EVM increase

Out of Band Power due to Harmonics and Spurs in LO

LO Generation and Distribution

Integer-N frequency synthesis

1.6 GHz VCO used to generate 2.4 GHz output – avoids LO Pulling1 MHz

channel spacing

1.6 GHz divided to 800 MHz and mixed with itself – provides 2.4 GHz. Spurs at 800 MHz and 4 GHz

Tuned buffers needed in LO distribution

Low Noise Amplifier

SE/Differential Conversion: Attenuation causes NF increase

Source degeneration for input match

Cascode input stage for gain, isolation, high frequency performance

Tuned output loads

Power AmplifierMeasure signal strength and adjust pre-amp gain

Pseudo-differential cascodes

Transformer coupled, tuned output stage

Gate-biasing for optimum linearity

Key Transceiver Data: Receiver

Fix PER at 8% for different data rates

• RX sensitivity = -88 dBm for 11 Mbps, -93 dBm for 2 Mbps• Noise figure can be deduced from these sensitivity values

IIP3 = -15 dBm for low gain, 6 dBm for high gain

• Noise Figure dominates performance at the lower end of the dynamic range• Nonlinearities and non-ideal LO behavior dominates the higher end of the dynamic range

Key Transceiver Data: Transmitter

Spectral Mask Compliance

EVM Margin

What it Looks Like: The die-shot

Performance Summary

Next Class: RLC Networks


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