Ex. No. 4 BJT Common Collector Amplifier using voltage divider bias Aim: To design and construct a single stage BJT common collector amplifier employing voltage divider bias and determine experimentally the frequency response of the amplifier. From the frequency response graph, calculate the mid band gain, bandwidth and gain-bandwidth product. Also calculate the input impedance and output impedance of the amplifier. Specifications: Vcc = I C = Materials Required: Sl. No. Item Name Range / Specification Quantity 1 Regulated Power supply (0-30) V dc 1 2 Signal generator 3 MHz, Sine wave 1 3 CRO 20 MHz 1 4 Resistors 5 Capacitors 6 Transistor BC 107/ BC 547/ SL100 7 Connecting wires As required Biasing circuit: Figure 1
Transcript
Ex. No. 4 BJT Common Collector Amplifier using voltage divider bias
Aim:
To design and construct a single stage BJT common collector amplifier employing voltage divider
bias and determine experimentally the frequency response of the amplifier. From the frequency response
graph, calculate the mid band gain, bandwidth and gain-bandwidth product. Also calculate the input
impedance and output impedance of the amplifier.
Specifications: Vcc =
IC =
Materials Required:
Sl. No. Item Name Range / Specification Quantity
1 Regulated Power supply (0-30) V dc 1
2 Signal generator 3 MHz, Sine wave 1
3 CRO 20 MHz 1
4 Resistors
5 Capacitors
6 Transistor BC 107/ BC 547/ SL100
7 Connecting wires As required
Biasing circuit:
Figure 1
Design:
Given: VCC =
IC =
Take VCE = VCC /2 and
VE = VCC /2
RE = VE/ IE
≈ VE / IC =
To find R1 and R2
For better stability, R2 ≤ 0.1 β RE IB = IC / β
› R2 ≤
Use R2 =
VB = VBE + VE
= 0.7 +
=
Also VB =
› R1 =
Use CC1 = CC2 = 0.47 µF
Circuit Diagram:
Figure 2 – To find Frequency response
Figure 3 – To find Input impedance
Figure 4 – To find Output impedance
Procedure:
1. Connect the circuit in figure 1, set VCC to the given value.
2. Measure the dc voltages at base (VB), collector (VC) and emitter (VE) w.r. to ground.
Then determine VCE = VC – VE
VBE = VB - VE
3. Connect the circuit in figure 2.
4. Feed a sine wave input Vi of peak to peak amplitude 1 V from the signal generator.
5. Vary the input frequency from 10 Hz to 3 MHz in suitable steps and measure the output voltage VO
of the amplifier at each step using CRO. (Ensure that the input voltage Vi remains constant
throughout the frequency range). Tabulate the values.
6. Calculate gain and gain in dB and plot the frequency response (Gain in dB Vs frequency in Hz) in a
semilog sheet for both cases.
To find input and output impedances
7. Now connect the circuit in figure 3. Set DRB to minimum position (0 Ω).
8. Feed a sine wave input Vi of peak to peak amplitude 2 V from the signal generator.
9. Measure the output voltage now. Let VO = VA.
10. Gradually increase the DRB resistance (keeping Vi fixed) until output becomes VA /2. The
corresponding value of DRB gives the input impedance.
11. Now connect the circuit in figure 4. Set DRB to maximum position.
12. Feed a sine wave input Vi of peak to peak amplitude 2 V from the signal generator.
13. Measure the output voltage now. Let VO = VB.
14. Gradually decrease the DRB resistance (keeping Vi fixed) until output becomes VB /2. The
corresponding value of DRB gives the output impedance.
Tabular Column Vi = 1 V(P-P)
Input Sine wave
frequency,
fi Hz
Output Voltage
VO(P-P) Volts Gain AV =
Gain in dB
20 log AV dB
10
.
.
.
1 10
Frequency Response graph:
Gain (dB)
Frequency (Hz)
Calculation:
Emitter resistance, re = VT/IE
Theoretical value of Input impedance Zi = RB Zb , where Zb = βre + (β+1) RE
Theoretical value of Output impedance Zo = RE re
Result:
Thus the BJT CC amplifier circuit using voltage divider bias was designed for the given
specifications and its frequency response was determined and plotted.
