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CHAPTER 6

BUSES AND INTERFACING

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Typical Block Diagram ofComputer

CPU

(ALU &CONTROLUNIT)

INPUT OUTPUT

MEMORY

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Bus System

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Interfacing in computer organization of a single-bussystem

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Direct Memory Access (DMA)

DMA (Direct Memory Access)- Large blocks of datatransferred at a high speed toor from high speeddevices, magnetic drums, disks, tapes, etc.

-DMA controller Interface that provides I/O transfer ofdata directly to and from the memory and the I/Odevice- CPU initializes the DMA controller by sendinga memory address and the number of words to betransferred

- Actual transfer of data is done directly between thedevice and memory through DMA controller--> Freeing CPU for other tasks

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Computer System with DMA

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Advantages of DMA

This method is used in cases where microprocessorcontrol would be too slow.Computer system performance is improved by directtransfer of data between memory and I/O devices,bypassing the CPU.Large amounts of data can be transferred betweenmemory and the peripheral without severely impactingCPU performance.

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Logic Circuit for Sharing BusLines

The logic circuit used for sharing of lines onbus :

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a. Three-state logic

The "Tri- state Buffer An another type of digital Buffer circuit whose output can be "electronically"disconnected from its output circuitry when required. This type of Buffer isknown as a 3-State Buffer or commonly Tri-state Buffer.

In digital electronics three-state , tri-state , or 3-state logic allows an output port to assume a high impedance state inaddition to the 0 and 1 logic levels , effectively removing theoutput from the circuit.This allows multiple circuits to share the same output line orlines (such as a bus ).

http://en.wikipedia.org/wiki/Electronicshttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/High_impedancehttp://en.wikipedia.org/wiki/Logic_levelhttp://en.wikipedia.org/wiki/Computer_bushttp://en.wikipedia.org/wiki/Computer_bushttp://en.wikipedia.org/wiki/Logic_levelhttp://en.wikipedia.org/wiki/High_impedancehttp://en.wikipedia.org/wiki/Logic_gatehttp://en.wikipedia.org/wiki/Electronics

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Function of Three-state

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a. Three-state logic

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a. Three-state logic

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b. Three state driver with invertedoutput

c. Three state driver with disable

input

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Octal Latches with tri-state

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Octal Flip-flop with tri-state

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6.2 Input and Output AddressingTechniques

Two general techniques commonly used toaddressing input and output (I/O) devices onthe bus:

Isolated I/OMemory Mapping I/OMemory-mapped I/O (MMIO) and port I/O (also called isolated I/O or port-mapped I/O

abbreviated PMIO ) are two complementarymethods of performing input/output betweenthe CPU and peripheral devices in a computer .

PMIO

MMIO

http://en.wikipedia.org/wiki/Input/outputhttp://en.wikipedia.org/wiki/Central_processing_unithttp://en.wikipedia.org/wiki/Peripheral_devicehttp://en.wikipedia.org/wiki/Computerhttp://en.wikipedia.org/wiki/Computerhttp://en.wikipedia.org/wiki/Peripheral_devicehttp://en.wikipedia.org/wiki/Central_processing_unithttp://en.wikipedia.org/wiki/Input/output

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Port-mapped I/O (PMIO)

Port-mapped I/O uses a special class of CPUinstructions specifically for performing I/O.This is generally found on Intel microprocessors ,specifically the IN and OUT instructions which canread and write one to four bytes (outb, outw, outl)to an I/O device.I/O devices have a separate address space fromgeneral memory, either accomplished by an extra"I/O" pin on the CPU's physical interface, or anentire bus dedicated to I/O.Because the address space for I/O is isolatedfrom that for main memory, this is sometimesreferred to as isolated I/O.

http://en.wikipedia.org/wiki/List_of_Intel_microprocessorshttp://en.wikipedia.org/wiki/Computer_bushttp://en.wikipedia.org/wiki/Computer_bushttp://en.wikipedia.org/wiki/List_of_Intel_microprocessors

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Memory-mapped I/O (MMIO)

Memory-mapped I/O uses the same address bus to addressboth memory and I/O devices - the memory and registers ofthe I/O devices are mapped to (associated with) addressvalues.So when an address is used by the CPU it may refer to a

portion of physical RAM, or it can instead refer to memory ofthe I/O device.Thus, the CPU instructions used to access the memory arealso used for accessing devices. Each I/O device monitorsthe CPU's address bus and responds to any of the CPU'saccess of address space assigned to that device, connectingthe data bus to a desirable device's hardware register .To accommodate the I/O devices, areas of the addressesused by the CPU must be reserved for I/O and not beavailable for normal physical memory.The reservation might be temporary the Commodore 64

could bank switch between its I/O devices and regularmemory or permanent.

http://en.wikipedia.org/wiki/Address_bushttp://en.wikipedia.org/wiki/Data_bushttp://en.wikipedia.org/wiki/Hardware_registerhttp://en.wikipedia.org/wiki/Commodore_64http://en.wikipedia.org/wiki/Bank_switchinghttp://en.wikipedia.org/wiki/Bank_switchinghttp://en.wikipedia.org/wiki/Commodore_64http://en.wikipedia.org/wiki/Hardware_registerhttp://en.wikipedia.org/wiki/Data_bushttp://en.wikipedia.org/wiki/Address_bus

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Two Basic Bus Designs Interface to I/o6.3 Input and Output (I/O) Interfacing

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The Figure 1.3.3 shows traditional bus configurations and theFigure 1.3.4 shows high speed bus configurations. The traditionalbus connection uses three buses: local bus, system bus andexpanded bus. The high speed bus configuration uses high-speed

bus along with the three buses used in the traditional busconnection. Here, cache controller is connected to high-speed bus.This bus supports connection to high-speed LANs, such as FiberDistributed Data Interface (FDDI), video and graphics workstationcontrollers, as well as interface controllers to local peripheralincluding SCSI.

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Keyboard Interface to CPU

Typical design interfacing of keyboard to CPU:IBM/Compatible keyboards - Also known as "ATkeyboards" or "PS/2 keyboards

USB keyboard- Latest keyboard supported by allnew computers

ADB keyboards - Connect to the Apple DesktopBus of older Macintosh systems

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PC Keyboard Theory

The IBM keyboard you most probably havesitting in front of you, sends scan codes toyour computer.

The scan codes tell your Keyboard Bios, whatkeys you have pressed or released. Take forexample the 'A' Key. The 'A' key has a scancode of 1C (hex).

When you press the 'A' key, your keyboard willsend 1C down it's serial line.If you are still holding it down, for longer thanit's typematic delay, another 1C will be sent.This keeps occurring until another key has

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PC Keyboard Theory

However your keyboard will also send another codewhen the key has been released. Take the example ofthe 'A' key again, when released, the keyboard willsend F0 (hex) to tell you that the key with theproceeding scan code has been released. It will thensend 1C, so you know which key has been released.Your keyboard only has one code for each key. Itdoesn't care it the shift key has been pressed. It willstill send you the same code. It's up to your keyboardBIOS to determine this and take the appropriateaction. Your keyboard doesn't even process the NumLock, Caps Lock and Scroll Lock. When you press theCaps Lock for example, the keyboard will send thescan code for the cap locks. It is then up to yourkeyboard BIOS to send a code to the keyboard to turn

on the Caps lock LED.

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PS/2

The PS/2 connector is a 6-pin Mini-DINconnector used for connecting some keyboards toa PC compatible computer system.Its name comes from the IBM Personal System/2

series of personal computers , with which it wasintroduced in 1987.The PS/2 mouse connector generally replaced theolder DE-9 RS-232 "serial mouse" connector,while the PS/2 keyboard connector replaced thelarger 5-pin/180 DIN connector used in the IBMPC/AT design.The PS/2 designs on keyboard interfaces areelectrically similar and employ the same

communication protocol.

http://en.wikipedia.org/wiki/Mini-DIN_connectorhttp://en.wikipedia.org/wiki/Mini-DIN_connectorhttp://en.wikipedia.org/wiki/Computer_keyboardhttp://en.wikipedia.org/wiki/PC_compatiblehttp://en.wikipedia.org/wiki/IBM_Personal_System/2http://en.wikipedia.org/wiki/Personal_computerhttp://en.wikipedia.org/wiki/DE-9_connectorhttp://en.wikipedia.org/wiki/RS-232http://en.wikipedia.org/wiki/DIN_connectorhttp://en.wikipedia.org/wiki/IBM_PC/AThttp://en.wikipedia.org/wiki/IBM_PC/AThttp://en.wikipedia.org/wiki/IBM_PC/AThttp://en.wikipedia.org/wiki/IBM_PC/AThttp://en.wikipedia.org/wiki/DIN_connectorhttp://en.wikipedia.org/wiki/RS-232http://en.wikipedia.org/wiki/RS-232http://en.wikipedia.org/wiki/RS-232http://en.wikipedia.org/wiki/DE-9_connectorhttp://en.wikipedia.org/wiki/DE-9_connectorhttp://en.wikipedia.org/wiki/DE-9_connectorhttp://en.wikipedia.org/wiki/Personal_computerhttp://en.wikipedia.org/wiki/IBM_Personal_System/2http://en.wikipedia.org/wiki/PC_compatiblehttp://en.wikipedia.org/wiki/Computer_keyboardhttp://en.wikipedia.org/wiki/Mini-DIN_connectorhttp://en.wikipedia.org/wiki/Mini-DIN_connectorhttp://en.wikipedia.org/wiki/Mini-DIN_connectorhttp://en.wikipedia.org/wiki/Mini-DIN_connector

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PS/2

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USB Keyboard

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Keyboard Scan Codes

The diagram below shows the Scan Codeassigned to the individual keys. The Scancode is shown on the bottom of the key. E.g.

The Scan Code for ESC is 76. All the scancodes are shown in Hex

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Keyboard Circuit

Circuit for keyboard status word generatorusing theKeyboards use a matrix with the rows and

columns made up of wires.Each key acts like a switch.When a key is pressed, a column wire makes

contact with a row wire and completes acircuit.The keyboard controller detects this closedcircuit and registers it as a key press.

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The Matrix Circuit

Here is a simple keyboard matrix:

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The Matrix Circuit

This keyboard only has 4 keys: A , B, C , and D.Each key has a unique grid location, much likepoints on a graph.

Key A is at node C1R1, key B is at nodeC2R1, key C is at node C1R2, and key D is atnode C2R2.

In reality this is pretty useless which is whyreal keyboards use many more rows andcolumns.

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Keyboard Circuit

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USB

USB (Universal Serial Bus ) is an industry standard developed in the mid-1990s that defines the cables,connectors and protocols used for connection,communication and power supply between computers and electronic devices.USB was designed to standardize the connection ofcomputer peripherals , such as keyboards, pointingdevices , digital cameras, printers, portable mediaplayers , disk drives and network adapters to personalcomputers , both to communicate and to supplyelectric power .It has become commonplace on other devices, suchas smartphones , PDAs and video game consoles .USB has effectively replaced a variety of earlierinterfaces, such as serial and parallel ports , as well asseparate power chargers for portable devices

http://en.wikipedia.org/wiki/Industry_standardhttp://en.wikipedia.org/wiki/Communications_protocolhttp://en.wikipedia.org/wiki/Computerhttp://en.wikipedia.org/wiki/Computer_peripheralhttp://en.wikipedia.org/wiki/Mouse_(computing)http://en.wikipedia.org/wiki/Mouse_(computing)http://en.wikipedia.org/wiki/Portable_media_playerhttp://en.wikipedia.org/wiki/Portable_media_playerhttp://en.wikipedia.org/wiki/Disk_drivehttp://en.wikipedia.org/wiki/Network_interface_controllerhttp://en.wikipedia.org/wiki/Personal_computerhttp://en.wikipedia.org/wiki/Personal_computerhttp://en.wikipedia.org/wiki/Electric_powerhttp://en.wikipedia.org/wiki/Smartphonehttp://en.wikipedia.org/wiki/Personal_digital_assistanthttp://en.wikipedia.org/wiki/Video_game_consolehttp://en.wikipedia.org/wiki/Serial_porthttp://en.wikipedia.org/wiki/Parallel_porthttp://en.wikipedia.org/wiki/Power_chargerhttp://en.wikipedia.org/wiki/Power_chargerhttp://en.wikipedia.org/wiki/Parallel_porthttp://en.wikipedia.org/wiki/Serial_porthttp://en.wikipedia.org/wiki/Video_game_consolehttp://en.wikipedia.org/wiki/Personal_digital_assistanthttp://en.wikipedia.org/wiki/Smartphonehttp://en.wikipedia.org/wiki/Electric_powerhttp://en.wikipedia.org/wiki/Personal_computerhttp://en.wikipedia.org/wiki/Personal_computerhttp://en.wikipedia.org/wiki/Network_interface_controllerhttp://en.wikipedia.org/wiki/Disk_drivehttp://en.wikipedia.org/wiki/Portable_media_playerhttp://en.wikipedia.org/wiki/Portable_media_playerhttp://en.wikipedia.org/wiki/Mouse_(computing)http://en.wikipedia.org/wiki/Mouse_(computing)http://en.wikipedia.org/wiki/Computer_peripheralhttp://en.wikipedia.org/wiki/Computerhttp://en.wikipedia.org/wiki/Communications_protocolhttp://en.wikipedia.org/wiki/Industry_standard

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USB Host Controller

The host controller (HC) controls the transmission ofpackets on the bus. Frames of 1 millisecond are used.

At the start of each frame the host controllergenerates a Start of Frame (SOF) packet.The SOF packet is used to synchronies to the start ofthe frame and to keep track of the frame number.Within each frame packets are transferred, either fromhost to device (out) or from device to host (in).Transfers are always initiated by the host (polledtransfers).Therefore there can only be one host per USB bus.Each transfer of a packet has a status stage in whichthe recipient of the data can return either ACK(acknowledge reception), NAK (retry), STALL (errorcondition) or nothing (garbled data stage, device notavailable or disconnected)

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Host Controller Interface

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Host Controller Interface(HCI)

Enhanced Host Controller InterfaceEnhanced Host Controller Interface (EHCI ) is a high-speedcontroller standard that is publicly specified. The USB-IF insistedon this for USB 2.0 instead of having a different standard for PCI-based USB interfaces, which would have increased complexityand therefore costs . Intel hosted the EHCI conformance testing ,which helped to prevent divergence from the standard.EHCI only provides high-speed USB functions. It relies on a"companion controller", either OHCI or UHCI, to handle full- andlow-speed devices. Motherboards and PCI Cards that providehigh-speed ports thus have two controllers, one handling high-speed devices and the other handling low- and full-speed

devices.It is not uncommon to find UHCI, OHCI and EHCI all co-existingin a standard PC, with a UHCI driver providing low- and full-speed functions on the (Intel chipset) motherboard, an OHCIdriver providing low- and full-speed functions for the USB portson an add-in (NEC chipset) PCI expansion card, and an EHCI

driver providing high-speed functions for the USB ports on thatexpansion card.

Host Controller Interface

http://en.wikipedia.org/wiki/USB-IFhttp://en.wikipedia.org/wiki/Costhttp://en.wikipedia.org/wiki/Conformance_testinghttp://en.wikipedia.org/wiki/Conformance_testinghttp://en.wikipedia.org/wiki/Costhttp://en.wikipedia.org/wiki/USB-IFhttp://en.wikipedia.org/wiki/USB-IFhttp://en.wikipedia.org/wiki/USB-IF

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Host Controller Interface(HCI)

Extensible Host Controller InterfaceExtensible Host Controller Interface , XHCI isthe newest host controller standard that improves

speed, power efficiency and virtualization over itspredecessors.The goal was also to define a USB host controllerto replace UHCI/OHCI/EHCI. It supports all USB

device speeds (USB 3.0 super speed, USB 2.0low, full, and high speed, USB 1.1 low and fullspeed.)

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Items in Class Codes For USB:

1.Transfer modesUSB supports four transfer modes:control transfers - typically used for short, simple commands to thedevice, and a status response, used e.g. by the bus control pipe number0

isochronous transfers - at some guaranteed speed (often but notnecessarily as fast as possible) but with possible data loss, e.g. realtimeaudio or video

interrupt transfers - devices that need guaranteed quick responses(bounded latency), e.g. pointing devices and keyboards

bulk transfers - large sporadic transfers using all remaining available

The device descriptor of a USB device has a signature that tells what kindof device has been attached to the bus. This signature consists of classcode, subclass code and protocol fields. Together, these identify whatoperating system driver should be used to communicate with the device.

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Items in Class Codes For USB:

2.Transfer speed

USB supports three data rates:

A Low Speed rate of up to 1.5 Mbit/s (187.5 kB/s) that is mostly used forHuman Interface Devices (HID) such as keyboards, mice, and joysticks.

A Full Speed rate of up to 12 Mbit/s (1.5 [MB/s). Full Speed was thefastest rate before the USB 2.0 specification and many devices fall back toFull Speed. Full Speed devices divide the USB bandwidth between them in

a first-come first-served basis and it is not uncommon to run out ofbandwidth with several isochronous devices. All USB Hubs support FullSpeed.

A Hi-Speed rate of up to 480 Mbit/s (60 MB/s).

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Items in Class Codes For USB:

3.

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Items in Class Codes For USB:

5.

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USB Pin Out

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USB Connector Type

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Standard USB Pin out

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Bus Connections

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PC Bus

B u s In t e r f a c e s

Different types of buses: ISA (Industry Standard Architecture) EISA (Extended ISA) VESA (Video Electronics Standards Association, VL Bus) PCI (Peripheral Component Interconnect) USB (Universal Serial Bus) AGP (Advanced Graphics Port)

ISA is the oldest of all these and today's computers still have a ISAbus interface in form ofan ISA slot (connection) on the main board.ISA has 8-bit and 16-bit standards along with the 32-bit version(EISA).

All three versions operate at 8MHz.

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