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Department of ECE Electronic Circuits Laboratory
VARDHAMAN COLLEGE OF ENGINEERING, Shamshabad, Hyderabad. 1
1. INTRODUCTION
1.1 PURPOSE OF THE LAB:
This manual has been prepared for use in the course Electronics & Communication
Engineering, Electronic Circuits Laboratory. The laboratory exercises are designed in such a way
as to reinforce the concepts taught in the lectures. Before performing the experiments, the
students must be aware of the basic safety rules for minimizing any potential dangers. The
specific objective of each experiment should be kept in mind throughout the laboratory session.
The conclusions based on the experiments and other observed phenomena must be clearly
discussed in the laboratory report.
1.2 PURPOSE OF THE PRELAB:
In each lab, you are given prelab questions. These are intended to help you prepare for
the lab. You should write your response in this manual. These questions are not handed in, and
they are not graded. If you do not understand a prelab question, be sure to ask your Instructor.
2. CIRCUIT ANALYSIS USING PSPICE
2.1 PURPOSE
1. To learn the basic features of PSpice.
2. To use PSpice for the following:
i) Analysis by using Schematic Editor.
ii) Analysis by using Circuit File Editor.
2.2 INTRODUCTION TO SPICE
The rapid change in the field of electrical engineering is paralleled by programs that use
the computers increased capabilities in the solution of both traditional and novel problems. With
the availability of tools for computer-aided circuit analysis, circuits of great complexity can be
designed and analyzed within a shorter time and with less effort compared to the traditional
methods.
PSpice is a member of the SPICE (Simulation Program with Integrated Circuit Emphasis)
family of circuit simulators. In the following exercises you will use PSpice to solve some circuits
and to determine the quantities of interest.
Simulation Program with Integrated Circuit Emphasis (SPICE)
SPICE is a computer simulation and modeling program used by engineers to
mathematically predict the behavior of electronic circuits.
Developed at the University of California at Berkeley, SPICE can be used to simulate
circuits of almost all complexities. However, SPICE is generally used to predict the behavior of
low to mid frequency (DC to around 100MHz) circuits.
SPICE has the ability to simulate components ranging from the most basic passive
elements such as resistors and capacitors to sophisticated semiconductor devices such as
MESFETs and MOSFETs. Using these intrinsic components as the basic building blocks for larger
models, designers and chip manufacturers have been able to define a truly vast and diverse
number of SPICE models. Most commercially available simulators include more than 15,000
different components.
A circuit must be presented to SPICE in the form of a netlist. The netlist is a text
description of all circuit elements such as transistors and capacitors, and their corresponding
connections. Modern schematic capture and simulation tools such as Multisim allow users to
draw circuit schematics in a user-friendly environment, and automatically translate the circuit
diagrams into netlists. Both netlist and corresponding circuit schematic are presented here in
this manual, and some are left to the students to write on their own for practice.
Department of ECE Electronic Circuits Laboratory
VARDHAMAN COLLEGE OF ENGINEERING, Shamshabad, Hyderabad. 2
2.3 Types Of Spice
The commercially supported versions of SPICE2 can be divided into two types: mainframe
versions and PCbased versions.
The mainframe versions are:
HSPICE, RAD-SPICE(Meta-Software)
IG-SPICE(A.B.Associates)
Precise(Electronic Engineering Software)
PSpice(Microsim)
AccuSim(Mentor Graphics)
Cadence-SPICE(Cadence Design)
SPICE-Plus(valid Logic)
The PC-versions are
AllSpice(Acotech)
IS-SPICE(Intusoft)
Z-SPICE(Z-Tech)
SPICE-Plus(Analog Design Tools)
DSPICE(Daisy Systems)
PSpice(Microsim)
2.4 Types of Analysis
Pspice allows various types of analysis. Each analysis is invoked by including its
command statement.
The types of analysis and their corresponding. (dot) commands are described below:
DC Analysis is used for circuits with time-invariant sources(e.g., steady-state dc
sources).
DC Analysis Commands:
DC sweep of an input voltage/current source, a model parameter, or temperature over a range of values (.DC)
DC operating point to obtain all node voltages (.OP) Small-signal transfer function with small-signal gain, input resistance, and output
resistance (Thevenins equivalent) (.TF)
DC small-signal sensitivities (.SENS)
Transient Analysis is used for circuits with time-variant sources (e.g., ac sources and
switched dc sources).
Transient Analysis Commands:
Circuit behavior in response to time varying sources (.TRAN) DC and Fourier components of the transient analysis results (.FOUR)
AC Analysis is used for small-signal analysis of circuits with sources of variable
frequencies.
AC Analysis Commands:
Circuit response over a range of source frequencies (.AC) Noise generation at an output node for every frequency (.NOISE)
2.5 Limitation Of Spice
As a circuit simulator, Pspice has the following limitations:
1. The student version of Pspice is restricted to circuits with 10 transistors only.
2. The program is not interactive; that is, the circuit cannot be analyzed for various
component values without editing the program statements.
3. Pspice does not support an iterative method of solution. If the elements of a circuit are
specified, the output can be predicted. On the other hand, if the output is specified,
Pspice cannot be used to synthesize the circuit elements.
4. The input impedance cannot be determined directly.
5. The PC version needs 512kilobytes of memory (RAM) to run.
6. Distortion analysis is not available in Pspice.
7. The output impedance of a circuit cannot be printed or plotted directly.
Department of ECE Electronic Circuits Laboratory
VARDHAMAN COLLEGE OF ENGINEERING, Shamshabad, Hyderabad. 3
2.6 Circuit Descriptions
A circuit is described to a computer by using a file called the circuit file, which is
normally typed from a keyboard. The circuit file contains the circuit details of components and
elements, the information about the sources, and the commands for what to calculate and what
to provide as output.
The circuit file is the input to the SPICE program, which after executing the commands,
produces the results in another file called the output file.
A circuit must be specified in terms of element names, element values, nodes, variable
parameters, and sources.
The description and analysis of a circuit require specifications as follows:
Element values Nodes Circuit elements Element models Sources Types of analysis Output variables PSpice output commands Format of circuit files Format of output files
Element Values: The element values are written in standard floating point notation with
optional scale and unit suffixes. Some values without suffixes that are allowable in PSpice are
5 .5 5.0 5E+3 5.0E+3 5.E+3
There are two types of suffixes: the scale suffix and the unit suffix. The scale suffix multiplies
the number that it follows. The scale suffixes recognized by PSpice are
F = 1E-15
P = 1E-12
N = 1E-9
U = 1E-6
M = 1E-3
MIL = 25.4E-6
K = 1E3
MEG = 1E6
G = 1E9
T = 1E12
The unit suffixes that are normally used are
V=volt
A=amp
HZ=hertz
OHM=ohm()
H=henry
F=farad
DEG=degree
The first suffix always the scale suffix and the unit suffix follows the scale suffix. In the absence
of a scale suffix, the first suffix may be a unit suffix, provided it is not symbol of a scale suffix.
Nodes: The location of an element is identified by the node numbers. Each element is
connected between two nodes. Node numbers are assigned to the circuit. Node 0 is predefined
as the ground. All nodes must be connected to at least two elements and should, therefore,
appear at least twice. Node numbers must be integers from 0 to 9999 for SPICE, but need not
be sequential.
Circuit Elements: Circuit elements are identified by names. A name must start with a letter
symbol corresponding to the element, but after it can contain either letters or numbers. Names
can be up to 8 characters long for SPICE2 and up to 131 characters long for PSpice.
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The format of describing passive elements is
Where positive node current is assumed to flow into positive node N+ and out of negative node
N-. If the nodes are interchanged, the direction of the current through the element will be
reversed.
Sources:
The format for sources is
where the voltage of node N+ is specified with respect to node N-.
Voltage/Current Sources
EXP exponential pulse
FILE user data file
PULSE pulsed (single pulse or periodic waveform)
PWL piece-wise linear (table driven arbitrary waveform)
SFFM single frequency FM waveform
SIN sine wave
Sinusoidal Voltage Source:
This source generates a damped sinusoidal signal.
Transient spec syntax:
SIN (VO VA FREQ [TD] [THETA] [PHASE])
where items in [] are optional parameters.
Examples:
VSIG 3 0 SIN (-1V 2.5V 10MEG 1NS 1E10 90)
VAC in 0 SIN 0 120V 60Hz
Parameters Default Values Units
VO offset none V
VA amplitude none V
FREQ frequency 1/TSTOP Hz
TD delay 0.0 sec
THETA damping factor 0.0 1/sec
PHASE initial phase 0.0 degrees
The shape of the waveform is described by the following table:
Time Value
0 to TD VO
TD to TSTOP VO + VA * exp(-(time-TD)*THETA) * sin(2pi * FREQ * (time-TD)+PHASE)
2.7 Format Of Circuit Files
A circuit file that can be read by SPICE/PSpice may be divided into five parts:
i) The title, which describes the type of circuit or any comments;
ii) The circuit description, which defines the circuit elements and the set of model parameters;
iii) The analysis description, which defines the type of analysis;
iv) The output description, which defines the way the output is to be presented; and
v) The end of the program (the .END command).
Department of ECE Electronic Circuits Laboratory
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The format for a circuit file is as follows:
Title
Circuit description
Analysis description
Output description
.END (end-of-file statement)
Notes:
1. The first line is the title line, and it may contain any type of text.
2. The last line must be the .END command.
3. The order of the remaining lines is not important and does not affect the results of
simulations.
4. If a PSpice statement is more than one line, the statement can continue on the next
line. A continuation line is identified by a plus sign (+) in the first column of the next
line. The continuation lines must follow one another in the proper order.
5. A comment line may be included anywhere, preceded by an asterisk (*). Within a
statement, a comment is preceded by a semicolon (;), for PSpice only.
6. PSpice statement or comments can be in either upper- or lower case.
7. If you are not sure of any command or statement, the best thing is to run the circuit file
by using that command or statement and see what happens. SPICE/PSpice is user-
friendly software; it gives an error message in the output file that identifies a problem.
2.8 Format Of Output Files
The results of simulation by SPICE/PSpice are stored in an output file. It is possible to
control the type and amount by various commands. If there is any error in the circuit file,
SPICE/PSpice will display a message on the screen indicating that there is an error and will
suggest looking at the output file for details. The output falls into four types:
1. A description of the circuit itself that includes the netlist, the device list, the model
parameter list, and so on.
2. Direct output from some of the analyses without the .PLOT and .PRINT commands. This
includes the output from .OP, .TF, .SENS, .NOISE, and .FOUR analyses.
3. Prints and plots by .PLOT and .PRINT commands. These include the output from the .DC,
.AC, and .TRAN analyses.
4. Run statistics. These include the various kinds of summary information about the whole
run, including times required by various analyses and the amount of memory used.
2.9 Spice Models
BJT Models:
Statement syntax:
.MODEL [()]
where is one of the following:
NPN npn BJT
PNP pnp BJT
NPN and PNP Model Parameters:
Name* Description Units Default
AF Flicker noise exponent - 1
BF Ideal maximum forward gain - 100
BR Ideal maximum reverse gain - 100
CJC B-C zero-bias depletion capacitance F 0
CJE B-E zero-bias depletion capacitance F 0
CJS Zero-bias collector-substrate capacitance F 0
EG Energy gap for temperature effect on IS eV 1.11
FC Forward bias depletion capacitance coeff. - 0.5
IKF Corner for forward gain high current roll-off A infinite
IKR Corner for reverse gain high current roll-off A infinite
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Name* Description Units Default
IRB Current where base resistance falls half A infinite
way to its minimum value
IS Transport saturation current A 1E-16
ISC (C4) B-C leakage saturation current A 0
If >=1, specifies multiple of IS
ISE (C2) B-E leakage saturation current A 0
If >=1, specifies multiple of IS
ITF High-current parameter for effect on TF A 0
KF Flicker noise coefficient - 0
MJC B-C junction exponential factor - 0.33
MJE B-E junction exponential factor - 0.33
MJS Substrate junction exponential factor - 0
NC B-C leakage emission coefficient - 2
NE B-E leakage emission coefficient - 1.5
NF Forward current emission coefficient - 1
NR Reverse current emission coefficient - 1
PTF Excess phase at Freq=1/(TF*2) Hz degrees 0
RB Zero-bias base resistance Ohms 0
RBM Minimum base resistance at high currents Ohms RB
RC Collector resistance Ohms 0
RE Emitter resistance Ohms 0
TF Ideal forward transit time sec 0
TNOM Nominal model temperature deg. C 27
(TREF)
(T_MEASURED)
TR Ideal reverse transit time sec 0
TRB1 RB linear temperature coefficient - 0
TRB2 RB quadratic temperature coefficient - 0
TBC1 RC linear temperature coefficient - 0
TBC2 RC quadratic temperature coefficient - 0
TRE1 RE linear temperature coefficient - 0
TRE2 RE quadratic temperature coefficient - 0
TRM1 RBM linear temperature coefficient - 0
TRM2 RBM quadratic temperature coefficient - 0
VAF Forward Early voltage V infinite
VAR Reverse Early voltage V infinite
VJC B-C built-in potential V 0.75
VJE B-E built-in potential V 0.75
VJS Substrate junction built-in potential V 0.75
VTF Voltage describing VBC dependence of TF V infinite
XCJC Fraction of B-C depletion capacitance
connected to internal base node - 1
XTB Forward and reverse gain temperature
exponent - 0
XTF Coefficient for bias dependence of TF - 0
XTI Temperature exponent for effect on IS - 3
* Name in parenthesis is alias for parameter name.
Department of ECE Electronic Circuits Laboratory
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3. PART I SIMULATION USING PSPICE
3.1 Exp. No. 1: Common Emitter Amplifier
3.2 Exp. No. 2: Two stage RC coupled Amplifier
3.3 Exp. No. 3: Current Shunt Feedback Amplifier
3.4 Exp. No. 4: RC Phase Shift Oscillator
3.5 Exp. No. 5: Class A Power Amplifier
3.6 Exp. No. 6: Class B Complementary Symmetry Power Amplifier
Department of ECE Electronic Circuits Laboratory
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Prelab:
1. Study the operation and working principle of CE amplifier.
2. Identify all the formulae you will need in this Lab.
3. Study the procedure of using Spice tool (Schematic & Circuit File).
4. In this lab you will use decibels, or dB. This is a dimensionless ratio, in logarithmic
form. The formula is XdB = 20log10(|X|), where X is any dimensionless ratio. For
example, X might be the gain A of an amplifier. If the gain A of an amplifier is 100, you
can also say that the amplifier has a gain of 40 dB. Note that negative values correspond
to a ratio of less than unity, for example an amplifier with a gain of 0.01 has a gain of
-40 dB. You can compute a voltage ratio by taking the exponent of 10, for example the
voltage ratio corresponding to a gain of 15 dB is 10(15/20) = 5.623. Calculate the
following:
a. The gain in dB of an amplifier with a gain of 10,000.
b. The gain in dB of an amplifier with a gain of 0.1.
c. The voltage ratio that corresponds to 3 dB.
Objective:
1. To simulate the Common Emitter amplifier in Pspice and study the transient and
frequency response.
2. To determine the phase relationship between the input and output voltages by
performing the transient analysis.
3. To determine the maximum gain, 3dB gain, lower and upper cutoff frequencies and
bandwidth of CE amplifier by performing the AC analysis.
Software Tool:
EdwinXP / Topspice / Multisim / Microsim / or any other equivalent tool.
Circuit Diagram:
PART I EXPERIMENT NO. 1
COMMON EMITTER AMPLIFIER
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Circuit File:
*Title * Circuit file for CE Amplifier
*Circuit description Q1 1 2 3 2n2222
RC 1 4 10k
R1 2 4 47k
R2 0 2 5k
RS 5 6 500
RE 0 3 2k
RL 0 7 10k
C1 6 2 1u
CE 0 3 10u
C2 1 7 1u
Vcc 4 0 12
Vs 5 0 AC 10m SIN 0 10m 1k
.MODEL 2N2222 NPN(IS=2.56E-14 BF=200 NE=2 IKF=0.56
+ BR= 5.00 NC= 2.00 ISE= 1.280E-11
+ RB= 10.0 RC= .500 ISC= 1.280E-11
+ CJE= 2.500E-11 TF= 5.333E-10 CJC= 8.000E-12 TR= 4.000E-08 KF=3E-16
+ AF=1)
*Analysis description .TRAN 1E-006 0.002
.AC DEC 10 10 1E+007
*Output description .PROBE
*.END (end-of-file statement) .END
Theory:
The practical circuit of CE amplifier is shown in the figure. It consists of different circuit
components. The functions of these components are as follows:
1. Biasing Circuit: The resistances R1, R2 and RE form the voltage divider biasing circuit
for the CE amplifier. It sets the proper operating point for the CE amplifier.
2. Input capacitor C1: This capacitor couples the signal to the transistor. It blocks any dc
component present in the signal and passes only ac signal for amplification. Because of
this, biasing conditions are maintained constant.
3. Emitter Bypass Capacitor CE: An emitter bypass capacitor CE is connected in parallel
with the emitter resistance, RE to provide a low reactance path to the amplified ac
signal. If it is not inserted, the amplified ac signal passing through RE will cause a
voltage drop across it. This will reduce the output voltage, reducing the gain of the
amplifier.
4. Output Coupling Capacitor C2: The coupling capacitor C2 couples the output of the
amplifier to the load or to the next stage of the amplifier. It blocks dc and passes only ac
part of the amplified signal.
Operation: When positive half of the signal is applied, the voltage between base and emitter
(Vbe) is increased because it is already positive with respect to ground. So forward bias is
increased i.e., the base current is increased. Due to transistor action, the collector current IC is
increased times. When this current flows through RC, the drop IC RC increases considerably. As a consequence of this, the voltage between collector and emitter (Vce) decreases. In this way,
amplified voltage appears across RC. Therefore the positive going input signal appears as a
negative going output signal i.e., there is a phase shift of 180 between the input and output.
Department of ECE Electronic Circuits Laboratory
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Procedure:
1. Schematic:
i) Select the components from the symbol library and place it on the schematic
window.
ii) The selected symbol is displayed on the screen in red. Move the symbol to the
desired location using the mouse.
iii) You can change the view of most symbols by performing the following
operations: rotate, mirror and flip.
iv) Wires and junctions are used to wire together parts and indicate electrical
connections.
v) To draw a wire, select the Wire menu command, Move the cursor to the wire
starting position and click the left mouse button or press Enter. Now you can move the other end of wire to the desired location.
vi) The junction symbol (a large dot) indicates an electrical connection between
wires or between a wire and a part pin.
vii) Most parts (components) require that you specify the following set of
attributes: reference name, value or model name, and optional parameters.
viii) You can also change the attributes by double-clicking on a part on the
schematic.
ix) Once circuit construction is completed; the analysis is to be performed.
x) To simulate a circuit, select the Analysis|Run Simulation menu command from
the Schematic.
xi) If there are any errors during the simulation, the simulator writes any
applicable error messages to the simulation output file.
xii) Three different modes of circuit analysis: DC, AC (frequency response) and
transient.
xiii) Before simulation, we have to do the analysis setup.
xiv) Once analysis setup is over, then perform Run Simulation.
xv) From the analysis note down the readings, plot the graph, do the calculations.
2. Circuit File:
i) The SPICE circuit file (default filename extension ".CIR") is the input file for
the simulator program.
ii) This is a text file, which contains the circuit netlist, simulation command and
device model statements.
iii) Write the circuit file for the given schematic assuming the node numbers.
Save the circuit file.
iv) To simulate the circuit file, select the Analysis|Run Simulation menu
command from the circuit file menu.
v) If there are any errors during the simulation, the simulator writes any
applicable error messages to the simulation output file.
vi) Three different modes of circuit analysis: DC, AC (frequency response) and
transient.
vii) Before simulation, we have to do the analysis setup.
viii) Once analysis setup is over, then perform Run Simulation.
ix) From the analysis note down the readings, plot the graph, do the calculations.
Department of ECE Electronic Circuits Laboratory
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Observations/Graphs:
i) Transient Response:
ii) Frequency Response:
(Absolute gain Vs Frequency):
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(Gain in dB Vs Frequency):
Inference:
1. From the transient analysis the phase relationship between input and output voltage
signals is ___________ degrees.
2. From the frequency response curve the following results are calculated:
S. No. Parameter Value
1 Max. Absolute Gain
2 Max. Gain in dB
3 3dB Gain
4 Lower Cutoff Frequency
5 Upper Cutoff Frequency
6 Bandwidth
Criticism:
1. Why the CE amplifier provides a phase reversal?
2. In the dc equivalent circuit of an amplifier, how are capacitors treated?
3. What is the effect of bypass capacitor on frequency response?
4. Define lower and upper cutoff frequencies for an amplifier.
5. State the reason for fall in gain at low and high frequencies.
6. What is meant by unity gain frequency?
7. Define Bel and Decibel.
8. What do we represent gain in decibels?
9. Why do you plot the frequency response curve on a semi-log paper?
Department of ECE Electronic Circuits Laboratory
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Prelab:
1. Study the purpose of using multistage amplifiers.
2. Learn the different types of coupling methods.
3. Study the effect of cascading on Bandwidth.
4. Identify all the formulae you will need in this Lab.
5. Study the procedure of using Spice tool (Schematic & Circuit File).
Objective:
1. To simulate the Two Stage RC Coupled Amplifier in PSpice and study the transient and
frequency response.
2. To determine the phase relationship between the input and output voltages by
performing the transient analysis.
3. To determine the maximum gain, 3dB gain, lower and upper cutoff frequencies and
bandwidth of Two Stage RC Coupled Amplifier by performing the AC analysis.
4. To determine the effect of cascading on gain and bandwidth.
Software Tool:
EdwinXP / Topspice / Multisim / Microsim / or any other equivalent tool.
Circuit Diagram:
Circuit File:
Left to the student to write on his/her own
PART I EXPERIMENT NO. 2
TWO STAGE RC COUPLED AMPLIFIER
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Theory:
An amplifier is the basic building block of most electronic systems. Just as one brick
does not make a house, a single-stage amplifier is not sufficient to build a practical electronic
system. The gain of the single stage is not sufficient for practical applications. The voltage level
of a signal can be raised to the desired level if we use more than one stage. When a number of
amplifier stages are used in succession (one after the other) it is called a multistage amplifier or
a cascade amplifier. Much higher gains can be obtained from the multi-stage amplifiers.
In a multi-stage amplifier, the output of one stage makes the input of the next stage.
We must use a suitable coupling network between two stages so that a minimum loss of
voltage occurs when the signal passes through this network to the next stage. Also, the dc
voltage at the output of one stage should not be permitted to go to the input of the next. If it
does, the biasing conditions of the next stage are disturbed.
Figure shows how to couple two stages of amplifiers using RC coupling scheme. This is
the most widely used method. In this scheme, the signal developed across the collector resistor
RC of the first stage is coupled to the base of the second stage through the capacitor CC. The
coupling capacitor blocks the dc voltage of the first stage from reaching the base of the second
stage. In this way, the dc biasing of the next stage is not interfered with. For this reason, the
capacitor CC is also called a blocking capacitor.
As the number of stages increases, the gain increases and the bandwidth decreases.
RC coupling scheme finds applications in almost all audio small-signal amplifiers used in
record players, tape recorders, public-address systems, radio receivers, television receivers,
etc.
Procedure:
Procedure is same as that of Experiment No. 1
Observations/Graphs:
i) Transient Response:
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ii) Frequency Response:
(Gain in dB Vs Frequency)
(Comparing single stage and two stage amplifier response)
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Inference:
1. From the transient analysis, it is observed that,___________________________
___________________________________________________________________.
2. From the frequency response curve the following results are calculated:
S. No. Parameter Value
1 Max. Gain in dB
2 3dB Gain
3 Lower Cutoff Frequency
4 Upper Cutoff Frequency
5 Bandwidth
3. From the AC response, it is observed that, _____________________________
__________________________________________________________________.
Criticism:
1. Why do you need more than one stage of amplifiers in practical circuits?
2. What is the effect of cascading on gain and bandwidth?
3. What happens to the 3dB frequencies if the number of stages of amplifiers increases?
4. Why we use a logarithmic scale to denote voltage or power gains, instead of using the
simpler linear scale?
5. What is loading effect in multistage amplifiers?
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Prelab:
1. Study the concept of feedback in amplifiers.
2. Study the characteristics of current shunt feedback amplifier.
3. Identify all the formulae you will need in this Lab.
4. Study the procedure of using Spice tool (Schematic & Circuit File).
Objective:
1. To simulate the Current Shunt Feedback Amplifier in PSpice and study the transient and
frequency response.
2. To determine the maximum gain, 3dB gain, lower and upper cutoff frequencies and
bandwidth of Current Shunt Feedback Amplifier by performing the AC analysis.
3. To determine the effect of feedback on gain and bandwidth.
Software Tool:
EdwinXP / Topspice / Multisim / Microsim / or any other equivalent tool.
Circuit Diagram:
Circuit File:
Left to the student to write on his/her own
Theory:
Feedback plays a very important role in electronic circuits and the basic parameters,
such as input impedance, output impedance, current and voltage gain and bandwidth, may be
altered considerably by the use of feedback for a given amplifier.
A portion of the output signal is taken from the output of the amplifier and is combined
with the normal input signal and thereby the feedback is accomplished.
PART I EXPERIMENT NO. 3
CURRENT SHUNT FEEDBACK AMPLIFIER
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There are two types of feedback. They are i) Positive feedback and ii) Negative
feedback. Negative feedback helps to increase the bandwidth, decrease gain, distortion, and
noise, modify input and output resistances as desired.
A current shunt feedback amplifier circuit is illustrated in the figure. It is called a series-
derived, shunt-fed feedback. The shunt connection at the input reduces the input resistance
and the series connection at the output increases the output resistance. This is a true current
amplifier.
Procedure:
Procedure is same as that of Experiment No. 1
Observations/Graphs:
i) Transient Response:
ii) Frequency Response:
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Inference:
1. From the frequency response curve the following results are calculated:
S. No. Parameter Value
1 Max. Gain in dB
2 3dB Gain
3 Lower Cutoff Frequency
4 Upper Cutoff Frequency
5 Bandwidth
2. From the AC response, it is observed that, ______________________________
___________________________________________________________________.
Criticism:
1. State the merits and demerits of negative feedback in amplifiers.
2. If the bypass capacitor CE in an RC coupled amplifier becomes accidentally open
circuited, what happens to the gain of the amplifier? Explain.
3. When will a negative feedback amplifier circuit be unstable?
4. What is the parameter which does not change with feedback?
5. What type of feedback has been used in an emitter follower circuit?
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Prelab:
1. Study the concept of positive feedback.
2. Study the operation and working principle of RC phase shift oscillator.
3. Identify all the formulae you will need in this Lab.
4. Study the procedure of using Spice tool (Schematic & Circuit File).
Objective:
1. To simulate the RC Phase Shift oscillator using PSpice and study the transient response.
2. To determine the frequency of oscillation and compare its value with the theoretical
value.
Software Tool:
EdwinXP / Topspice / Multisim / Microsim / or any other equivalent tool.
Circuit Diagram:
Circuit File:
Left to the student to write on his/her own
Theory: Any circuit which is used to generate an ac voltage without an ac input signal is called an
oscillator. Positive feedback is used in oscillators.
Based on the type of components used, the oscillators are classified in to two types.
They are LC oscillators and RC oscillators.
In the RC phase shift oscillator the required phase shift of 180 in the feedback loop
from output to input is obtained by using R and C components. Figure shows the circuit of RC
phase shift oscillator using cascaded connection of high pass filter. Here, a common emitter
PART I EXPERIMENT NO. 4
RC PHASE SHIFT OSCILLATOR USING TRANSISTORS
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amplifier is followed by three sections of RC phase shift network, the output of the last section
being returned to the input.
The phase shift, , given by each RC section is = tan-1
CR1
. If R is made zero, then
will become 90. But making R=0 is impracticable because if R is zero, then the voltage
across it will become zero. Therefore, in practice the value of R is adjusted such that
becomes 60.
If the values of R and C are so chosen that, for the given frequency fr, the phase shift of
each RC section is 60. Thus such a RC ladder network produces a total phase shift of 180
between its input and output voltages for the given frequency. Therefore, at the specific
frequency fr, the total phase shift from the base of the transistor around the circuit and back to
the base will be exactly 360 or 0, the thereby satisfying Barkhausen condition for oscillation.
The frequency of oscillation is given by
fr = 62
1
RC
At this frequency, it is found that the feedback factor of the network is || = 1/29. In order that |A| shall not be less than unity, it is required that the amplifier gain |A| must be more than 29 for oscillator operation.
Procedure:
Procedure is same as that of Experiment No. 1
Observations/Graphs:
Transient Response:
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Inference:
The theoretical and practical calculation of the frequency of oscillation of RC phase shift
oscillator is calculated as follows:
Theoretical
Calculations
Practical
Calculations
R = 10k
C = 0.01u
fr = kRC 462
1
+
Where k = Rc/R = 0.18
fr = ________Hz
T= ________ms
f= 1/T= __________Hz
Criticism:
1. What is Barkhausen criterion?
2. What is the maximum phase shift provided by the single RC network?
3. What is the condition of phase shift oscillator to produce sustained oscillations?
4. Where does the starting voltage for an oscillator?
5. Why are RC oscillators preferred for the generation of low frequencies?
6. If the percentage feedback for sustained oscillations in an oscillator is 5%, what is the
required gain of amplifier?
7. Find the percentage feedback to produce sustained oscillators if amplifier gain is 60.
8. An RC phase shift oscillator circuit has 3 identical RC networks with R=100, C=10F.
Find the frequency of oscillation.
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Prelab:
1. Study the difference between voltage and power amplifiers.
2. Study the operation and working principle of Class A power amplifier.
3. Identify all the formulas you will need in this Lab.
4. Study the procedure of using Spice tool (Schematic & Circuit File).
Objective:
1. To simulate the Class A power amplifier in PSpice and study the transient response.
2. To determine the Collector efficiency of Class A power amplifier.
Software Tool:
EdwinXP / Topspice / Multisim / Microsim / or any other equivalent tool.
Circuit Diagram:
Circuit File: Left to the student to write on his/her own
Theory: Class A power amplifier is one in which the output current flows during the entire cycle
(360) of input signal. Thus the operating point is selected in such a way that the transistor
operates only over the linear region of its load line. So this amplifier can amplify input signals of
small amplitude.
The theoretical efficiency of transformer coupled or inductively coupled class A power
amplifier is 50%. Practically it is in the range of 30 35%. The formula for calculating collector
efficiency is % 100AC
DC
P
P = , where PAC and PDC values are calculated as follows:
Using RMS values:
PDC = VCC IDC PAC = Vrms Irms
Using Peak values:
PDC = VCC IDC
PAC = Vrms Irms = 2m mV I ,
2 2m m
rms rms
V IV I
= =
PART I EXPERIMENT NO. 5
CLASS A POWER AMPLIFIER
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PAC =
2 2
2 2m m L
L
V I Ror
R
Using Peak to Peak values:
PDC = VCC IDC
PAC = Vrms Irms = 8pp ppV I
,2 2 2 2 2 2
pp ppm mrms rms
V IV IV I
= = = =
PAC =
2 2
8 8pp pp L
L
V I Ror
R
Procedure:
Procedure is same as that of Experiment No. 1
Observations/Graphs:
i) Transient Response:
ii) Frequency Response:
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Calculations:
PDC = VCC IDC
PAC =
2 2
8 8pp pp L
L
V I Ror
R
% 100AC
DC
P
P =
Theoretical Efficiency = ___________________.
Practical Efficiency =___________________.
Inference:
1. From transient it is observed that the Class A power amplifier conducts for
____________ angle.
2. The collector efficiency of class A power amplifier is ______________.
Criticism:
1. Draw the block diagram of public address system.
2. Why a power amplifier is also known as a large signal amplifier?
3. What is need for power amplifier?
4. What is the difference between voltage amplifier and power amplifier?
5. Why voltage amplifier cannot work as power amplifier?
6. Why a power amplifier is always preceded by a voltage amplifier?
7. What is heat sink? Why it is used with power transistors?
8. What is collector efficiency?
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Prelab:
1. Study the operation and working principle of Class B power amplifier.
2. Identify all the formulas you will need in this Lab.
3. Study the procedure of using Spice tool (Schematic & Circuit File).
Objective:
1. To simulate the Class B Complementary Symmetry power amplifier in PSpice and study
the transient response.
2. To eliminate the cross-over distortion using modified circuitry.
Software Tool:
EdwinXP / Topspice / Multisim / Microsim / or any other equivalent tool.
Circuit Diagram:
Fig. Class B Complementary Symmetry Fig. Modified Class B Complementary Symmetry
Power Amplifier Power Amplifier
Circuit File:
Left to the student to write on his/her own
Theory:
The use of both the input and output transformers in an ordinary push-pull amplifier
circuit is eliminated using a circuit called complementary-symmetry push-pull amplifier circuit.
PART I EXPERIMENT NO. 6
CLASS B COMPLEMENTARY SYMMETRY POWER AMPLIFIER
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This uses a pair of transistors having complementary symmetry, that is, one transistor is
PNP and the other is NPN.
Note that the complementary symmetry circuit requires two power supplies, since each
transistor must be biased suitably.
The transistors T1 and T2 are operated in class-B. That is, the bias is adjusted such that
the operating point corresponds to the cut-off points. Hence, with no signal input, both
transistors are cut-off and no collector current flows.
The signal applied at the input goes to the base of both the transistors. Since the
transistors are of opposite type, they conduct in opposite half-cycles of the input. For example,
during the positive half-cycle of the input signal, the PNP transistor T1 is reverse biased and
does not conduct. The NPN transistor T2, on the other hand, is forward-biased and conducts.
This results in a half-cycle of output voltage across the load resistor. The other half-cycle of
output across the load is provided by the conduction of transistor T1 (the transistor T2 remains
cut-off) during the negative half-cycle of the input. Since the collector current from each
transistor flows through the load during the alternate half-cycles of the input signal, no centre-
tapped output transformer is required.
The two transistors though of opposite type must be matched. If there is an
imbalance in the characteristics of the two transistors, even harmonics will no longer be
cancelled. This would result in considerable distortion. Increasing availability of complementary
transistors is making the use of class-B transformer coupled stages obsolete. All modern power
amplifier circuits are transformerless and use complementary transistors.
Procedure:
Procedure is same as that of Experiment No. 1
Observations/Graphs:
Transient Response:
Fig. Transient response of Class B Complementary Symmetry Power Amplifier
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Fig. Transient response of Modified Class B Complementary Power Amplifier which eliminates
cross-over distortion
Inference:
1. From transient response of Class B complementary symmetry power amplifier, we
observe that ___________________________________________________________.
2. Using modified circuitry, __________________________________________________.
Criticism:
1. What is cross-over distortion?
2. How to eliminate cross-over distortion?
3. What is harmonic distortion?
4. What is the maximum efficiency of class B Complementary Symmetry Power amplifier?
5. What is the difference between Push-pull power amplifier and complementary symmetry
power amplifier?
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4. PART II TESTING USING HARDWARE LABORATORY
4.1 Exp. No. 1: Common Emitter Amplifier
4.2 Exp. No. 2: RC Phase Shift Oscillator using transistors
4.3 Exp. No. 3: Class B Complementary Symmetry Power Amplifier
4.4 Exp. No. 4: Single Tuned Voltage Amplifier
4.5 Exp. No. 5: Series Voltage Regulator
4.6 Exp. No. 6: Shunt Voltage Regulator
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Objective:
1. To plot the transient response waveforms and observe that the CE amplifier produces
a phase reversal.
2. To measure the maximum signal which can be amplified by the amplifier without
having clipped output.
3. To measure the voltage gain of the amplifier for different values of load resistance.
4. To measure the voltage gain of the amplifier in the mid-frequency region.
5. To plot the frequency response curve and thus determine the lower and upper cutoff
frequencies, and Bandwidth of the amplifier.
Apparatus:
1. Transistor 2n2222.
2. Resistors 500, 2k, 5k, 10k (2), 47k.
3. Capacitors 1u (2), 10u.
4. RPS 12V.
5. Function Generator.
6. CRO.
7. Breadboard.
8. Connecting wires and Probes.
Circuit Diagram:
Fig. 2.1.1 Common Emitter Amplifier
Theory:
In the amplifier circuit shown in the figure, the resistors R1, R2 and RE fix the operating
point. The resistor RE stabilizes it against temperature variations. The capacitor CE bypasses the
resistor RE for the ac signal. As it offers very low impedance path for ac, the emitter terminal is
almost at ground potential. When the ac signal is applied to the base, the base-emitter voltage
changes, because of which the base-current changes. Since collector current depends upon the
PART II EXPERIMENT NO. 1
COMMON EMITTER AMPLIFIER
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base current, the collector current also changes. When this changing collector current passes
through the load resistance RC, an ac voltage is produced at the output. As the output voltage is
much more than the input voltage, the circuit works as an amplifier circuit. The voltage gain of
this amplifier is given by the formula
AV =
180
in
ac
r
R
Where rin is the dynamic input resistance, is the current amplification factor, and Rac is the
load resistance in the circuit.
Procedure:
1. Connect the circuit diagram as shown in the fig. 2.1.1.
2. Set Vs = 0 at 1 KHz.
3. Increase Vs till undistorted waveform is seen on the CRO.
4. Measure the input voltage Vs.
5. Vary the frequency from dc to 1MHz in convenient steps and measure the VO at every
frequency for constant input.
6. Find the voltage gain, AV =
S
O
V
V, AV(dB) = 20 log
S
O
V
V.
7. Plot AV Vs Frequency using Semi-log paper.
8. Repeat the above steps from 4 to 6 for different values of load resistance.
Expected Waveforms/Graphs:
1. Transient Response: 2. Frequency Response:
Fig. 2.1.2 (a) Transient Response (b) Frequency Response
Observations:
1. Voltage gain of the amplifier with variation in Load:
S. No.
Load
Resistor,
RL()
Input Voltage,
Vin (mV)
Output Voltage,
Vout (V)
Absolute
Gain Gain in dB
1
2
t
Vout
t
Vin
f1 f2
Amax
Amax/2
Gain
Freq.
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2. Voltage gain of the amplifier with variation in Frequency:
S. No. Input
Frequency (Hz)
Input Voltage,
Vin (mV)
Output Voltage,
Vout (V)
Absolute
Gain
Gain in
dB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Inference:
1. The phase relation between the input and output voltage waveforms is __________.
2. Maximum signal handling capacity of the amplifier (at 1kHz) is ____________mV.
3. The voltage gain _______________ as the load resistance _________________.
4. The absolute voltage gain of the amplifier in the mid frequency region is ___________.
5. The voltage gain in dB of the amplifier in the mid frequency region is ___________dB.
6. The lower cut-off frequency is ________Hz, and upper cut-off frequency is
_________Hz.
7. The Bandwidth of the amplifier is ____________Hz.
8. The gain bandwidth product is ______________Hz.
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Objective:
To measure the frequency of oscillation of RC phase shift oscillator and compare with
that of the theoretical value.
Apparatus:
1. Transistor 2n2222.
2. Resistors 56K, 100K, 10K(5).
3. Capacitors 10u(3), 0.01u(3)
4. RPS 5V.
5. CRO.
6. Breadboard.
7. Connecting wires and Probes.
Circuit Diagram:
Procedure:
1. Connect the circuit on the breadboard as per the circuit diagram.
2. Connect the output of the circuit to the Channel 1 of the CRO using BNC Probe.
3. Note down the amplitude and time period of the output waveform.
4. Calculate the theoretical frequency of oscillations by using the formula 1
2 6rf
RC=
5. Calculate the practical frequency of oscillations.
PART II EXPERIMENT NO. 2
RC PHASE SHIFT OSCILLATOR USING TRANSISTORS
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Expected Waveforms/Graphs:
Calculations:
Theoretical Frequency of Oscillations, 1
2 6rf
RC=
rf =
Observations:
Inference:
Frequency of the oscillations:
Time period T of the ac signal available at the output = _____________s.
Therefore, frequency 1
2 6rf
RC= Hz = ____________Hz.
t
Vout
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Objective:
To observe the cross over distortion present in the Class B Complementary Symmetry
power amplifier.
Apparatus:
1. Transistors 2n2222 (NPN) or SL100 (NPN), 2n2907A (PNP) or SK100 (PNP).
2. Resistor 10K (1).
3. RPS 12V.
4. CRO.
5. Breadboard.
6. Connecting wires and Probes.
Circuit Diagram:
Procedure:
1. Connect the circuit as shown in the figure.
2. Apply sinusoidal input voltage of 1V, 1 kHz to the circuit from the function generator and
observe it on the channel 1 of the CRO.
3. Connect the output to the channel 2 of the CRO.
4. Observe the cross over distortion in the output.
Expected Waveforms/Graphs:
PART II EXPERIMENT NO. 3
CLASS B COMPLEMENTARY SYMMETRY POWER AMPLIFIER
Vin
Vout
t
t
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Inference:
From transient response of class B complementary symmetry power amplifier, we observe
that _____________________________________________________________________
_________________________________________________________________________.
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Prelab:
1. Study the concept of Resonance and Parallel Tuned Circuit.
2. Study the operation of Single Tuned Voltage Amplifiers.
Objective:
1. To measure the resonant frequency of a single tuned voltage amplifier.
2. To measure the gain at resonant frequency.
Apparatus:
1. Transistor 2n2222.
2. Resistors 100, 47K, 10K, 1K, 510.
3. Capacitors 100n, 10u (2), 100u.
4. Inductor 10mH.
5. RPS 12V.
6. CRO.
7. Breadboard.
8. Connecting wires and Probes.
Circuit Diagram:
Theory:
A tuned amplifier uses one or more parallel tuned LC circuit as the load impedance.
Tuned amplifiers are used for amplifying electrical signals consisting of either a single radio
frequency (>30KHz) or a narrow band of frequencies in the RF (radio frequency) region. Tuned
amplifiers are properly referred to as radio frequency (RF) amplifiers.
The resonant frequency of tuned amplifier is given by rf = 1
2 LC
PART II EXPERIMENT NO. 4
SINGLE TUNED VOLTAGE AMPLIFIER
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Procedure:
1. Connect the circuit as per the circuit diagram.
2. Apply maximum undistorted input signal.
3. Vary the frequency conveniently and note down the output voltage.
4. Calculate the gain at resonant frequency.
5. Plot the curve between gain and resonant frequency.
6. Calculate the resonant frequency and compare it with the theoretical value.
Expected Waveforms/Graphs:
Theoretical Calculations:
rf = 1
2 LC
= 3 9
1
2 10 10 100 10
= 5.03 KHz Practical Calculations:
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Observations:
S. No. Input
Frequency (Hz)
Input Voltage,
Vin (mV)
Output Voltage,
Vout (V)
Absolute
Gain
Gain in
dB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Inference:
The resonant frequency of single tuned voltage amplifier is ______________________.
The maximum gain at resonant frequency is _______________________.
Criticism:
1. What is tuned amplifier?
2. Discuss the quality (Q) factor of a tuned amplifier, the factors that affect its value, and
its relationship to amplifier bandwidth.
3. How does tuned amplifier acts as a filter?
4. What is stagger tuning?
5. What is neutralization?
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6.
Prelab:
1. Study the block diagram of Regulated Power Supply.
2. Study the various factors determining the stability.
3. Study the operation of Series Voltage Regulator.
4. Identify all the formulas you will need in this Lab.
Objective:
1. To study the line and load regulation characteristics of series voltage regulator.
2. To determine the percentage regulation of series voltage regulator.
Apparatus:
1. Transistors (2n2222)
2. Zener Diode
3. Resistors (2.2K, 3.3K, 4.7K(2), 10K)
4. Decade Resistance Box
5. Multimeter
6. RPS
7. Bread board and connecting wires.
Circuit Diagram:
Fig. Circuit diagram of Series Voltage Regulator
Theory:
If in a voltage regulator circuit, the control element is connected in series with the load,
the circuit is called series voltage regulator circuit. The figure below shows the block diagram of
series voltage regulator circuit.
Fig. Block Diagram of Series Voltage Regulator
PART II EXPERIMENT NO. 5
SERIES VOLTAGE REGULATOR
Control Signal
Feedback Signal
Control Element
Comparator Circuit
Sampling Circuit
Reference Voltage
Vin Unregulated
VL= (VO) Regulated
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The unregulated d.c. voltage is the input to the circuit. The control element controls the
amount of the input voltage that gets to the output. The sampling circuit provides the
necessary feedback signal. The comparator circuit compares the feedback with the reference
voltage to the generate the appropriate control signal.
For example, if the load voltage tries to increase, the comparator generates a control
signal based on the feedback information. This control signal causes the control element to
decrease the amount of the output voltage. Thus the output voltage is maintained constant.
Thus, control element which regulates the load voltage, based on the control signal is in
series with the load and hence the circuit is called series voltage regulator circuit.
Procedure:
i) Line Regulation:
1. Connect the circuit diagram of series voltage regulator.
2. Set load resistor value to 10k (say).
3. Vary the line voltage in steps of 0 20V.
4. Note down the readings as shown in the tabular column.
5. Draw the line regulation characteristics curve between line voltage and output voltage.
ii) Line Regulation:
1. Connect the circuit diagram of series voltage regulator.
2. Set the line voltage to 20V (say).
3. Vary the load resistance in steps of 1K 10K.
4. Note down the readings as shown in the tabular column.
5. Draw the load regulation characteristics curve between load resistance and output
voltage.
Expected Waveforms/Graphs:
i) Line Regulation: (RL Kept Constant, Vin is Varied)
ii) Load Regulation: (RL is Varied, Vin Kept Constant)
Vin
Vout
RL
Vout
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Observations:
Line Regulation: (RL = 10K) Load Regulation: (Vin = 20V)
S. No. Vin(V) Vout(V) S. No. RL() Vout(V)
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 10
11 11
12 12
13 13
14 14
15 15
Calculations:
Percentage Regulation = 100
NL
FLNL
V
VV
VNL =
VFL =
Therefore, % Regulation =
Inference:
The percentage regulation of series voltage regulator is _______________.
Criticism:
1. What are the requirements does a dc power supply must meet?
2. What is the purpose of a regulator?
3. How zener diode is used as voltage regulator?
4. Which type of regulator is suitably used for constant load?
5. Which type of regulator is suitably used for variable load?
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Prelab:
1. Study the block diagram of Regulated Power Supply.
2. Study the various factors determining the stability.
3. Study the operation of Shunt Voltage Regulator.
4. Identify all the formulas you will need in this Lab.
Objective:
1. To study the line and load regulation characteristics of shunt voltage regulator.
2. To determine the percentage regulation of basic transistor shunt voltage regulator.
3. To determine the percentage regulation of the improved shunt voltage regulator
using two transistors.
Apparatus:
1. Transistors (2n2222)
2. Zener Diode
3. Resistors (1K, 4.7K, 10K)
4. Decade Resistance Box
5. Multimeter
6. Power Supply
7. Bread board and connecting wires.
Circuit Diagram:
Fig. Circuit Diagram of Basic Shunt Voltage Regulator
Fig. Circuit Diagram of Improved Shunt Voltage Regulator
PART II EXPERIMENT NO. 6
SHUNT VOLTAGE REGULATOR
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Theory:
A shunt voltage regulator provides regulation by shunting current away from the load to
regulate the output voltage.
Fig. Block Diagram of Shunt Voltage Regulator
Fig. shows the block diagram of such a voltage regulator. The input unregulated voltage
provides current to the load. Some of the current is pulled away by the control element to
maintain the regulated output voltage across the voltage.
If the load voltage tries to change due to a change in the load, the sampling circuit
provides a feedback signal to a comparator, which then provides a control signal to vary the
amount of the current shunted away from the load.
As the output voltage tries to get larger, for example, the sampling circuit provides a
feedback signal to the comparator circuit, which then provides a control signal to draw
increased shunt current, providing less load current, thereby keeping the regulated voltage
from rising.
Procedure:
i) Line Regulation:
6. Connect the circuit diagram of basic shunt voltage regulator.
7. Set load resistor value to 10k (say).
8. Vary the line voltage in steps of 0 20V.
9. Note down the readings as shown in the tabular column.
10. Draw the line regulation characteristics curve between line voltage and output voltage.
11. Repeat the same procedure for improved shunt voltage regulator.
ii) Line Regulation:
3. Connect the circuit diagram of basic shunt voltage regulator.
4. Set the line voltage to 20V (say).
6. Vary the load resistance in steps of 1K 10k.
7. Note down the readings as shown in the tabular column.
8. Draw the load regulation characteristics curve between load resistance and output
voltage.
9. Repeat the same procedure for improved shunt voltage regulator.
Expected Waveforms/Graphs:
iii) Line Regulation: (RL Kept Constant, Vin is Varied)
Vin
Vout
Reference Voltage
Comparator Circuit
Control Element
Sampling Circuit
IL+Ish
Vin Unregulated
IL
VO
Regulated
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iv) Load Regulation: (RL is Varied, Vin Kept Constant)
Observations:
i) Basic Shunt Voltage Regulator:
Line Regulation: (RL = 10K) Load Regulation: (Vin = 20V)
S. No. Vin(V) Vout(V) S. No. RL() Vout(V)
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 10
11 11
12 12
13 13
14 14
15 15
ii) Improved Shunt Voltage Regulator:
Line Regulation: (RL = 10K) Load Regulation: (Vin = 20V)
S. No. Vin(V) Vout(V) S. No. RL() Vout(V)
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 10
11 11
12 12
13 13
14 14
15 15
RL
Vout
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Calculations:
i) Basic Shunt Voltage Regulator:
Percentage Regulation = 100
NL
FLNL
V
VV
VNL =
VFL =
Therefore, % Regulation =
ii) Improved Shunt Voltage Regulator:
Percentage Regulation = 100
NL
FLNL
V
VV
VNL =
VFL =
Therefore, % Regulation =
Inference:
1. The percentage regulation of Basic shunt voltage regulator is _______________.
2. The percentage regulation of improved shunt voltage regulator is ______________.
Criticism:
1. What is Preregulator?
2. What is the purpose of current limiting circuit?
3. What is SMPS?
4. Give one example of non-feedback type of voltage regulator?
5. Give one example of feedback type of voltage regulator?
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5. PART III EXTRA EXPERIMENTS FOR PRACTICE IN PSPICE
5.1 Exp. No. 1: Thevenins Analysis
5.2 Exp. No. 2: Series RLC circuit
5.3 Exp. No. 3: Darlington Pair Amplifier
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Exercise 1:
A DC Circuit is shown in the figure. Use PSpice to calculate and print (a) the voltage gain
Av = V(2,4)/Vin, (b) the input resistance Rin = Vin/Iin , (c) Thevenins (output) resistance Rout=RTh
between nodes 2 and 4, and (d) Thevenins voltage VTh between nodes 2 and 4.
Exercise 2:
A pulse input is applied to the RLC circuit as shown in the figure. Use PSPICE to calculate
and plot the transient response from 0 to 400us with a time increment of 1us. The capacitor
volyage V(3) and the current through R1 i.e., I(R1) are to be plotted.
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Exercise 3:
A bipolar Darlington pair amplifier is shown in figure. Calculate and print the voltage
gain, the input resistance, and the output resistance. The input voltage is 5V.
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