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re Transistor Model
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Page 1: ECAD

re Transistor Model

Page 2: ECAD

The three amplifier networkconfigurations are:

The amplifier is a common-emitter when the emitterterminal is connected directly to the reference point,the input signal is applied to the base, and theoutput signal is connected on the collector.

The amplifier is a common-collector when thecollector terminal is connected directly to thereference point, the input signal is applied to thebase, and the output signal is taken at the emitterterminal.

The amplifier is a common-base when the base isconnected to ground point, the input signal isconnected to the emitter, and the output is on thecollector.

Page 3: ECAD

Steps in obtaining the ac equivalent network:Step 1. Set all dc sources to zero and replace

them by equivalent short-circuit.Step 2. Replace all capacitors by a short-

circuit equivalent.Step 3. Remove all resistors bypassed by the

shorted capacitors.Step 4. Redraw the network.

Page 4: ECAD

CE Fixed-bias Configuration

Input voltage ( Vi) is applied at the base of the transistor.Input voltage ( Vi) is applied at the base of the transistor.

Output voltage ( Vo) is taken at the collector terminal.Output voltage ( Vo) is taken at the collector terminal.

Emitter is the common terminal.Emitter is the common terminal.

CB and CC are coupling capacitors for the input and outputCB and CC are coupling capacitors for the input and outputvoltages.voltages.

There is no emitter resistor.There is no emitter resistor.

The negative sign in the equation for Av tells that a 180The negative sign in the equation for Av tells that a 180°°phase shift occurs between the input and output signals.phase shift occurs between the input and output signals.

The input signal isThe input signal is capacitivelycapacitively coupled to the base throughcoupled to the base throughCB, causing IB to vary above and below its dc bias value.CB, causing IB to vary above and below its dc bias value.

The purpose of biasing is to establish a QThe purpose of biasing is to establish a Q--point about whichpoint about whichvariations in voltage and current occur in response to anvariations in voltage and current occur in response to aninput signal.input signal.

Page 5: ECAD

CE Fixed Bias Configuration

Page 6: ECAD

PARAMETERS AC FORMULAS AC FORMULAS(effect of ro)

Ac emitterresistance, re

26 mV / IE no effect

Rin(base) β re no effect

InputImpedance

Zi

RB // Rin(base) no effect

OutputImpedance Zo

Rc Rc//ro

Voltage GainAv = Vo/Vi

-Rc / re -(Rc//ro)/re

Current GainAi = Io / Ii

Page 7: ECAD

Vi and Vo phase relationship

The negative sign in the equation for Avreveals that a 180˚ phase shift occursbetween the input and output signals.

Page 8: ECAD

CE Emitter-bias Configuration

Input voltage ( Vi) is applied at the base of theInput voltage ( Vi) is applied at the base of thetransistor.transistor.

Output voltage ( Vo) is taken at the collectorOutput voltage ( Vo) is taken at the collectorterminal.terminal.

CB and CC are coupling capacitors for the inputCB and CC are coupling capacitors for the inputand output voltages.and output voltages.

There is no emitterThere is no emitter--bypass capacitor.bypass capacitor. Emitter is at ac ground.Emitter is at ac ground. The negative sign in the equation for Av tellsThe negative sign in the equation for Av tells

that a 180that a 180°° phase shift occurs between the inputphase shift occurs between the inputand output signals.and output signals.

Page 9: ECAD

AC Equivalent Network

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PARAMETERS AC FORMULAS

Ac emitterresistance, re

26 mV / IE

Rin(base) β re

Input ImpedanceZi

RB // ZB

Output ImpedanceZo

Rc

Voltage GainAv = Vo/Vi

- Rc / (re + RE )

Current GainAi = Io/Ii

βRB / ( RB + ZB)

ZB Β(re + RE)

Page 11: ECAD

CE Voltage Divider Configuration

Input voltage ( Vi) is applied at the base of theInput voltage ( Vi) is applied at the base of thetransistor.transistor.

Output voltage ( Vo) is taken at the collectorOutput voltage ( Vo) is taken at the collectorterminal.terminal.

Emitter is the common terminal.Emitter is the common terminal. The negative sign in the equation for Av tellsThe negative sign in the equation for Av tells

that a 180that a 180°° phase shift occurs between the inputphase shift occurs between the inputand output signals.and output signals.

CB and CC are coupling capacitors for the inputCB and CC are coupling capacitors for the inputand output voltages.and output voltages.

CE is the emitterCE is the emitter--bypass capacitor.bypass capacitor.

Page 12: ECAD

Voltage Divider

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PARAMETERS AC FORMULAS

Ac emitterresistance, re

26 mV / IE

Rin(base) β re

Input ImpedanceZi R12 // Rin(base)

Output Impedance Zo Rc

Voltage GainAv = Vo/Vi

-Rc / re

Current GainAi = Io/Ii

R12 / (R12+re )

R12 R1 // R2

Page 14: ECAD

Common Base

Input is applied at the emitter.Input is applied at the emitter.

Output is taken at the collector terminalOutput is taken at the collector terminal

Base is the common terminal.Base is the common terminal.

Used mainly as RF amplifier.Used mainly as RF amplifier.

Current gain is slightly less than one.Current gain is slightly less than one.

Vo and Vi are in phase.Vo and Vi are in phase.

Input impedance is low.Input impedance is low.

Output impedance is high.Output impedance is high.

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AC Equivalent Circuit

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PARAMETERS AC FORMULAS

Ac emitterresistance, re

26 mV / IE

InputImpedance

Zi

RE//re

OutputImpedance Zo

Rc

Voltage GainAv = Vo/Vi

Rc/re

Current GainAi = Io/Ii

- α [ RE / ( RE + re)] ≈ -α ≈ -1

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CC EmitterCC Emitter--follower Configurationfollower Configuration

Input is applied at the base.Input is applied at the base.

Output is taken at the emitter terminalOutput is taken at the emitter terminal

Collector is the common terminal.Collector is the common terminal.

Used for impedanceUsed for impedance--matching purposes.matching purposes.

Used as an isolation amplifier.Used as an isolation amplifier.

Vo and Vi are in phase.Vo and Vi are in phase.

Input impedance is high.Input impedance is high.

Output impedance is low.Output impedance is low.

The output voltage is always slightly less than the inputThe output voltage is always slightly less than the inputsignal.signal.

Capacitors CB and CE must have a negligible reactance atCapacitors CB and CE must have a negligible reactance atthe frequency of operation.the frequency of operation.

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AC Equivalent Circuit

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PARAMETERS AC FORMULAS

Ac emitterresistance, re

26 mV / IE

Rin(base) β re

InputImpedance

Zi

RB //ZB

OutputImpedance Zo

re // RE

Voltage GainAv = Vo/Vi

RE / ( RE + re)

Current GainAi = Io/Ii

-β [ RB / ( RB + ZB)]

ZB β(re + RE)

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Collector DC Feedback

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SUMMARY OF AC PARAMETERSFOR CE, CC, AND CB AMPLIFIERCHARACTERISTI

CSCOMMON

BASECOMMON

EMITTERCOMMONCOLLECTOR

Power Gain, Ap moderate highest moderate

Voltage Gain, Av highest moderate lowest (less than 1)

Current Gain, Ai lowest(lessthan 1)

moderate highest

Input Impedance,Zi

lowest moderate highest

OutputImpedance, Zo

highest moderate lowest

Phase Inversion none 180o out–of-phase

none

Application RF amplifier The most widelyused type ofBJT amplifier

Isolator

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A cascade connection is a series configuration withthe output of one stage then applied as input to thesecond stage.

Two or more transistors can be connected together toincrease the overall gain.

Each transistor that amplifies the signal is considereda stage.

The overall voltage gain ( AVT) is the product of thegain for each stage.

The initial stage of the amplifier must have a very highinput impedance to avoid loading the source.

Coupling capacitors prevent the dc bias of one stagefrom affecting the dc bias of another stage ( capacitorsblock dc).

CASCADE

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Multistage Voltage Gain, AVT

The overall voltage gain of cascaded amplifiers is theproduct of the individual voltage gains.

Voltage gain expressed in decibels (dB)

Av(dB) = 20logAv

Overall voltage gain in dB of multistage system

AVT(dB) = AV1(dB) + AV2(dB) + …..AVn(dB)

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FORMULAS:

AVT = AV1 AV2 AV3 ….. AVn

AVT(dB) = 20 log [AV1 AV2 AV3 ….. AVn]

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Three-Stage Amplifier

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CASCODE

A cascode connection has one transistor inseries with another transistor.

This connection is design to provide a highinput impedance with low voltage gain toensure that the input Miller capacitance isminimum.

The overall voltage gain ( AVT) is the productof the gain for each stage.

The voltage gain for the common-emitterstage is approximately equal to one.

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Example:

Page 30: ECAD

FORMULAS:

Stage 1 ( common-emitter)

Av1 = - re2 / re1 = -1

Stage 2 ( common-base)

Av2 = Rc / re

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DARLINGTON CONNECTION

The purpose of this configuration is toincrease the overall current gain which is theproduct of the current gains of the individualtransistor.

Current gain is very large.

βD = β1β2

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E

B

C

B

E

C

BD

B2

B1

DARLINGTON CONNECTION

βD = β1 + β2 + β1β2 ≈ β1β2

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Darlington emitter-followernetwork.

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AC Equivalent Circuit

Page 35: ECAD

FORMULASInput Impedance, Zi

Zi = RB // (ri + βDRE )

Output Impedance, Zo

Zo = RE // ri // ( ri / βD )

Voltage Gain, Av

Av = ( RE + βDRE ) / [ ri + ( RE + βDRE)]

Current Gain, AiAi = βDRB / ( RB + βDRE)

Page 36: ECAD

Output Section

Page 37: ECAD

Power amplifiers are large-signalamplifiers. The larger part of the loadline is used during signal operation.Power amplifiers are commonly usedas the final stage of thecommunication receiver or transmitterto provide sufficient power to anoutput load to drive the speakers or toa transmitting antenna, typically a fewwatts to tens of watts.

Page 38: ECAD

CLASS A AMPLIFIERS

This amplifier operates entirely in the linear region of thetransistor’s characteristic curves.

The transistor operate and conduct during the full cycle(360°) of the input signal.

In this mode of operation, the network does not go intocutoff or saturation.

The output voltage signal has the same shape as the inputsignal.

Class A can be either be inverting or noninverting amplifier.

For maximum output signal swing, the Q-point must becentered on the load line.

Maximum efficiency of a class A amplifier is 25%.

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Formulas

Maximum currentIc(sat) = IcQ + VCEQ / Rc

AC emitter resistorre = ∆VBE / ∆Ic

Cutoff voltageVCE(CO) = VCEQ + IcQRc

Voltage gain, AvAv = Rc / re

Power gain. ApAp = βDCAv

Q-pointVCEQ = IcQRc

Power (Q-point)PQ = IcQVCEQ

Output load powerPL = V2

CEQ / 2RL

Page 40: ECAD

CLASS B AMPLIFIERS

This amplifiers operates in the linear region for half of theinput cycle.

The transistor is cutoff for the other half cycle of the input.

For class B amplifiers, the Q-point is at cutoff

Operated in a push-pull network in order to produce anoutput that is a replica of the input.

Push-pull configuration is a type of class B amplifier withtwo transistors in which one transistor conducts for onehalf-cycle and the other operates for the other half-cycle.

Crossover distortion is the deformation in the output at thepoint where each transistor changes from the cutoff state tothe on state.4

Maximum efficiency is 79%

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CLASS AB AMPLIFIERS

This amplifier is biased slightly above cutoffand operates in the linear region for slightlymore than the half cycle of the input.

It eliminates crossover distortion in class Bamplifiers.

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CLASS C

Amplifiers that operate in the linear region foronly small part of the input cycle.

This amplifier is biased below cutoff.

Highest efficiency.

Commonly used as tuned amplifier toproduce a sinusoidal output.

The maximum efficiency is higher than that ofeither class A or class B amplifiers.

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ComparisonClass of

OperationEfficiency Bias Operating

cycleDistortion

Class A 25 % to50%

Linearregion

360° Low

Class B 79 %(max)

Cutoff 180° High

Class AB BetweenA and B

Abovecutoff

Between Aand B

Moderate

Class C ≈ 100% Belowcutoff

Less than180°

Extreme

Class D Over 90% Pulseoperation

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AMPLIFIER FREQUENCYRESPONSE

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In the past lessons about amplifiers, thecapacitive reactance, Xc, of the capacitors( CB, CC, and CE) were assumed to beapproximately equal to 0 Ω. Also, the internaltransistor capacitances were assume to besmall enough. We will now consider thefrequency effects introduced by the couplingand bypass capacitors at the low-frequencyend and the internal transistor capacitances(parasitic) at the high frequencies.

Page 47: ECAD

LOW-FREQUENCYAMPLIFIER RESPONSE

The capacitively coupled amplifier above hasthree high-pass RC circuits that affect its gain asthe frequency is reduced below midrange.

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FOUR CATEGORIES Active Low-Pass Filter (LPF)

A type of filter that passes frequencies below the cutofffrequency (fc) while rejecting higher frequencies.

Active High-Pass Filter (HPF)

A type of filter that passes frequencies above the cutofffrequency while rejecting lower frequencies.

Active Band-Pass Filter (BPF)

A type filter that passes the midrange frequencies lyingbetween the lower-cutoff frequency (f1) and the upper-cutofffrequency

Active Band-Stop Filter (BSF)

Band-Elimination Filter

Notch Filter

Band-Reject Filter

A type of filter that rejects a range of frequencies lyingbetween f1 and f2.

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Important Terms

Bandwidth – the usable range offrequencies that pass from input tooutput section

Bode Plot – a comparative plot (graph)of the gain versus frequency used toillustrate the response of an amplifier

Critical Frequency (Cutoff) – frequencyat which the response of a filter is 3 dBless than midrange

Decade – ten times increase ordecrease

Midrange – the part of a responsecurve between the two cutofffrequencies

Octave – two times increase ordecrease

Passband – range of frequencies thatare allowed to pass through a system

Quality Factor – the ratio of the centerfrequency (fo) to its bandwidth (BW)

Page 50: ECAD

CE Voltage-Divider

Page 51: ECAD

RC Network

Page 52: ECAD

Cutoff frequency

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INPUT RC CIRCUITOne RC circuit is formed by the inputcoupling capacitor, Cs, and the inputimpedance of the amplifier.

Cutoff frequency due to Cs

Zi = R1 // R2 // Rin = R1 // R2 // βre

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OUTPUT RC CIRCUITRC network that is formed by the couplingcapacitor, Cc, and the resistance looking in atthe collector and the load resistance.

Cutoff frequency due to Cc

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Considering the effect of ro

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BYPASS RC CIRCUIT

Rth = R1 // R2 // Rs

fCE = 1/ ( 2π RTCE ) = 1 / [ 2π(( re + Rth/Β )// RE ) CE ]

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THE DOMINANT (highest) LOWERCRITICAL FREQUENCY WILL DETERMINETHE LOWER CUTOFF FREQUENCY, f1, OFTHE SYSTEM.

If fCE < fCB < fCC

then f1 = fCC

If fCC < fCE < fCB

then f1 = fCB

If fCB < fCC < fCE

then f1 = fCE

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System Voltage Gain, AVS

Considering the effect of Rs

Page 59: ECAD

HIGH - FREQUENCYAMPLIFIER RESPONSE

At the higher frequency end, the transistor’sinternal capacitances begin to have a significanteffect on the gain.

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MILLER CAPACITANCEThe interelectrode capacitances between terminals canbe used to simplify the analysis of inverting amplifiersat high frequencies. The coupling and bypasscapacitors have all been replaced by their short-circuitequivalent due to their very low reactance.

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Cin(Miller) = Cf ( 1 – Avmid)

Cout(Miller) = Cf ( 1 – 1 / Avmid )

Miller’s theorem states that Cf effectively appears as acapacitance from input to ground. It also states that Cfeffectively appears as a capacitance from output to ground.Avmid = (-Rc//RL)/re

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INPUT RC CIRCUIT

RT = Rs // R1 // R2 // Rin = Rs // R1 // R2 // βreCT = Cw(input) + Cbe + Cin(Miller)

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Upper cutoff frequency due toinput RC network.

fCi = 1/ ( 2π RTCT ) = 1 / [ 2π( Rs // R1 // R2 //βre) (Cw(input) + Cbe + Cin(Miller) ) ]

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OUTPUT RC NETWORK

RT = Rc // RL

CT = Cw(out) + Cce + Cout(Miller)

Page 67: ECAD

Upper cutoff frequency due tooutput RC circuit.

fCo = 1/ ( 2π RTCT ) = 1 / [ 2π( Rc // RL )(Cw(iout) + Cce + Cout(Miller) ) ]

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THE LOWER OF THE TWOCRITICAL HIGH FREQUENCIESIS THE DOMINANT UPPER –CUTOFF FREQUENCY, f2, OFTHE SYSTEM.

Page 69: ECAD

Example1

Page 70: ECAD

DIFFERENTIAL AMPLIFIER,DIFF-AMP

An amplifier that produces an outputsignal proportional to the difference of thetwo input signals. It has a very large gainwhen opposite signals are applied to theinputs as compared to the negligible gainresulting from common inputs. Commonlyused for the input stages of anoperational amplifier.

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BASIC CIRCUITThe circuit has two separate inputs, two outputs,and both emitter terminals are connectedtogether.

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MODES OF SIGNAL OPERATION:SINGLE-ENDED INPUT

Case 1: Vi1 ≠ 0 and Vi2 = 0

Input signal is applied to B1 ( Vi1 ≠ 0 ). B2 is grounded ( Vi2 = 0). Inverted amplified output signal, Vo1, appears at terminal

C1. A signal voltage Ve appears in phase at the emitter of Q1

and Q2 which becomes an input to Q2. Q2 functions as a common-base amplifier. Noninverted amplified output signal, Vo2, appears at

terminal C2. Voltage gain Av1 = - Rc / re. Voltage gain Av2 = +Rc / re.

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Page 74: ECAD

CONFIGURATION

Page 75: ECAD

Case 2: Vi2 ≠ 0 and Vi1 = 0

Input signal is applied to B2 ( Vi2 ≠ 0 ). B1 is grounded ( Vi1 = 0). Inverted amplified output signal, Vo2, appears at terminal

C2. A signal voltage Ve appears in phase at the emitter of Q1

and Q2 which becomes an input to Q1. Q1 functions as a common-base amplifier. Noninverted amplified output signal, Vo1, appears at

terminal C1. Voltage gain Av2 = - Rc / re. Voltage gain Av1 = +Rc / re.

Page 76: ECAD

CONFIGURATION

Page 77: ECAD

DIFFERENTIAL INPUT

Two opposite-polarity input signals areapplied to the inputs ( double-endedoperation).

Vi1 and Vo2 are in phase.

Vi2 and Vo1 are in phase.

There is a 180° out-of-phase relationshipbetween Vo1 and Vo2.

/ Vo1/ = / Vo2/

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COMMON-MODE INPUT

The same input is applied to both inputterminals.

The output signals for both transistors areequal to zero

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COMMON-MODE REJECTIONRATIO, CMRR

The ratio between differential voltage gain andcommon-mode gain.

The measure of an amplifier’s ability to rejectcommon-mode signals.

CMRR = ∞ (ideal).

CMRR = Avd / Acm

Where: Avd = differential voltage gainAcm = common-mode gain

Expressed in decibelsCMRR = 20 log ( Avd / Acm)

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OPERATIONAL AMPLIFIERS(OP-AMPS)

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OPERATIONAL AMPLIFIER

An op-amp is a high gain differential amplifier withhigh input impedance (Zi) and low outputimpedance (Zo). An op-amp contains severalstages of differential amplifier to achieve a veryhigh voltage gain.

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Typical op-amp unit

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The concept of negative feedback is usedin several op-amp applications. Negativefeedback is the process whereby a portionof the output voltage of an amplifier isreturned to the input with a phase angle

that opposes the input signal.

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AC Equivalent Network

Page 88: ECAD

OUTPUT VOLTAGE

Op-amp provides an output component that is due tothe amplification of the difference of the signals (Vd)applied to the two inputs and a component due to thesignals common to both inputs (Vc).

Vo = AdVd + AcVc

Where : Vd = difference voltageVd = Vi1 – Vi2

Vc = common voltage( unwanted)Vi1 + Vi2

Vc = --------------2

Ad = differential gainAc = common mode gainAd >> Ac

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COMMON MODE REJECTIONRATIO, CMRR

The measure of an amplifier’s abilityto reject unwanted signals. The mainpurpose of differential connection isto amplify the difference signal whilerejecting the common signal (noise)at the inputs.

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CMRR = AdAc

CMRRdB= 20 log AdAc

VcVo = AdVd 1 + -------------

CMRR Vd

CMRR = infinite (ideal)the larger the value, the better the circuit operationVo = AdVd + AcVc

Vo = AdVd 1 + AcVcAdVd

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DC OFFSSET PARAMETER(output error voltage)

Unwanted voltage and currentgenerated by the internalcircuitry and not by the appliedinput signal.

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INPUT OFFSET VOLTAGE; VIO

(1mV ~ 6mV)

When Vi = 0, the circuit acts like annoninverting amplifier.

Vo(offset) = VIO [ 1 + Rf / R1 ]

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INPUT OFFSET CURRENT;IIO(20nA ~ 200 nA)

An offset current due to the difference incurrents at the two inputs.

Vo(offset) = IIO Rf

TOTAL OUTPUT OFFSET VOLTAGE

Vo(offset) = VIO [ 1 + Rf / R1 ] + IIO Rf

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INPUT BIAS CURRENT , I IB

I+IB + I-IBIIB = ---------------

2I+IB = IIB + IIO

2I-IB = IIB - IIO

2IIO = I+IB - I-IB

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FREQUENCY PARAMETERS

fc = f1 / AVD

Where B1 = unity- gain BWf1 = unity- gain freqAVD = voltage differential gain

= open loop voltage gain= 200V/mV typical= 20V/mV (min)

CUTOFF FREQUENCY, fc

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SLEW RATE, SR

Slew rate is the maximum permissible rate at which op-ampoutput can change in volts per microsecond. If the rate ofoutput voltage change is greater than SR, the output signalwill be distorted.

SR = ΔVo / Δt

Vo = ACL Vi

ΔVo / Δt = ACL [ ΔVi / Δt ]

SR = ACL [ ΔVi / Δt ]

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MAXIMUM SIGNALFREQUENCY

The input frequency of an op-amp is dependent on both thebandwidth and slew rate parameters

ws < SR/ K

K =output gain factorK = ACL Vi

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APPLICATIONS:INVERTING AMPLIFIER

Vo = - (Rf / R1) Vi

Zi = R1 + Rf / AOL ≈ R1

Zo = [ AOL / ( 1 + AOL)] Rf // Zout

Zo ≈Zout

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Where Zout = open-loop output impedanceZin = open-loop input impedanceAOL = open-loop gainZi = input impedance of the

inverting amplifierZo = output impedance of the

inverting amplifier

B = feedback fractionAOL(mid) = midrange open-loop gainfi = signal frequencyfc = critical frequencyBWCL = closed-loop BW

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NONINVERTING AMPLIFIER

Vo = [ 1 + Rf / R1 ] Vi

Zi = [ 1 + AOLB ] Zin

Zo = Zout / ( 1 + AOLB)

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UNITY FOLLOWER

A voltage buffer configuration provides a means ofisolating an input signal from a load.

Vo = ViB = 1

ACL = 1Zi = ( 1 + AOL) Zin

Zo = Zout / ( 1+ AOL)

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SUMMING AMPLIFIER

Rf Rf RfVo = - ------ V1 + -------- V2 + ---------V3

R1 R2 R3

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INTEGRATOR

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DIFFERENTIATOR

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VOLTAGE DIFFERENCE

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INSTRUMENTATIONAMPLIFIER

Vo = [1 + 2Rf / RG ] ( V1 – V2 )

Let R1 = R3 = R2 = R4 = R

Rf1 = Rf2 = Rf

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PHASE-SHIFT OSCILLATOR

Oscillator is a circuit that produces periodic (repeating)waveforms on its output with only the dc supply as arequired input.

fo = 1_____2Π√6 RC

B = 1 / 29

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ACTIVE FILTERS

First-order LPF Fourth-order LPF

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Values for ButterworthResponse

Order Roll off ratedB/Decade

First stagePoles

First stageDF

Second stagePoles

Second stageDF

Third stagePoles

Third stageDF

1 20 1 Optional

2 40 2 1.414

3 60 2 1.0 1 1.0

4 80 2 1.848 2 0.765

5 100 2 1.0 2 1.618 1 0.618

6 120 2 1.932 2 1.414 2 0.518

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FUNCTION GENERATOR

12

X1k

X10k

R7

C8

X10

C1

12

12

0

X100

Vz2

R8

2

1

1 2

R10

21

X1

1 2

R1

12

0

R2

R6

R11

2

1

C13

12

X10

C7

C12

12

C10

X1k

12

R4

X1

C 5

C140

0

Vz1

12

1 2

X100

C11

C4

C9

C2

X1

1 2

12

X1k

1

3

2

41

1

OUT

+

-

V+

V-

C15 X10k

0

C3

X10k

R921

X100

12

1 2

12

1

3

2

41

1OUT

+

-

V+

V-

R521

X10

12

C6

Vout

12

1

3

2

41

1

OUT

+

-

V+

V-

R3


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