EE 5121: MOS Transistor Modeling for Circuit Simulation Final … · 2011-12-20 · Nirav Desai (...

Final Project Report: BSIM3V3 Non Quasi Static MOSFET Model: Study and Simulations

1 Nirav Desai ( 4280229 ) Dept. of ECE, University of Minnesota, Twin Cities

EE 5121: MOS Transistor Modeling for Circuit Simulation

Final Project Report:

BSIM3V3 Non Quasi Static MOSFET Model: Study and Simulations

Study done and report prepared by:

Nirav Desai ( 4280229 )

Department of Electrical and Computer Engineering,

University of Minnesota Twin Cities



Contents Introduction: Moderate Inversion MOSFET Models ..................................................................................... 3

BSIM3V3 Non-Quasi Static MOSFET Model: ................................................................................................. 4

BSIM3V3 MOSFET Model Fitting to LEVEL=3 HSPICE for simulations ...................................................... 4

AC Non-Quasi Static MOSFET Model: ....................................................................................................... 8

Transient Non-Quasi Static MOSFET Model: .......................................................................................... 10

BSIM3V3 Simulations from reference paper: Drain Current Spike ............................................................. 11

BSIM3V3 Simulations from reference paper: Source Current Spike .......................................................... 12

BSIM3V3: 2 input NAND Gate: 1um & 0.18um channel lengths: ............................................................... 13

BSIM3V3: 2 input NOR Gate: 1um and 0.18um channel lengths ............................................................... 14

Conclusions ................................................................................................................................................. 15

References: ................................................................................................................................................. 16



Introduction: Moderate Inversion MOSFET Models

The original motivation for this project was to develop a moderate inversion model for the MOSFET that

keeps track of the band bending beyond the onset of moderate inversion, at which the minority carrier

concentration at the surface equals the bulk doping. This value of band bending is given by

(

) for an NMOSFET,

Where, Na = Acceptor Doping in the Bulk,

ni = Intrinsic Carrier Concentration,

kT/q = Thermal Voltage = 26mV.

Advanced surface potential based models, such as PSP [1] and Philips MOS Model 11 [2], track the

surface potential very accurately and are thus very suitable for moderate inversion operation. Inversion

charge (Qinv) based models such as BSIM3 [3] and BSIM4 have been designed specifically with

moderate inversion and high frequency operation in mind and various corrections to the surface potential

beyond the point of moderate inversion have been suggested which includes adding a constant 6kT/q to

the surface potential at onset of strong inversion. A specific moderate inversion correction to the surface

potential has been outlined in the text book for the course: Operation and Modeling of The MOS

Transistor by Yannis Tsividis and is given by the following equations [4, Page 78, Second Edition Text

Book]:

( )

(

) ( )

(

√

)

( )

√ ( ) ( )

√

( )

( )

(

) ( )

All symbols follow the standard notation as outlined in the text book followed in the course: Operation

and Modeling of the MOS Transistor: Yannis Tsivids (Third Edition.) The above model equations are

missing in the Third Edition of the text book and have been adapted from the Second Edition.



BSIM3V3 Non-Quasi Static MOSFET Model:

The second part of this project deals with MOSFET models for high frequency and pulsed operation of

the MOSFET and is on the lines of the project proposal 2 outlined on class home page for Quasi Static

MOSFET models. A study of simulations on the 2 input CMOS NOR and NAND gates is presented in

subsequent sections.

The BSIM3V3 Non Quasi Static MOSFET model is studied in this project and all simulations on the

BSIM3V3 have been compared to LEVEL=3 HSPICE MOSFET model.

BSIM3V3 MOSFET Model Fitting to LEVEL=3 HSPICE for simulations

The following plots show the model fit for LEVEL=49 (BSIM3V3) and LEVEL=3 (HSPICE) for models

used in the subsequent simulations:

Fig 1: DC ID-VDS model match for LEVEL=49 (BSIM3V3) and LEVEL=3 (HSPICE) for a 20/1

dimension NMOS used in subsequent simulations.



Figure 2: DC ID-VDS model match for LEVEL=49 (BSIM3V3) and N-Lumped LEVEL=3 (HSPICE)

NMOS MOSFET models used in subsequent simulations. Dimensions for N=1 are 30/30.



Fig 3: DC ID-VDS model match for LEVEL=49 (BSIM3V3) and LEVEL=3 (HSPICE) for 7.2/0.18

NMOS used in 2 input CMOS NAND gates.



Fig 4: DC ID-VDS model match for LEVEL=49 (BSIM3V3) and LEVEL=3 (HSPICE) MOSFET models

for 7.2/0.18 PMOS MOSFETs used in subsequent simulations.

In all of the above graphs, the only parameter varied to achieve the match was the TOX for the LEVEL=3

HSPICE MOSFET model. The saturation region characteristics are an accurate match and linear region

characteristics are not. This was picked as a trade-off as during pulsed operation, the MOSFET would

most likely be in saturation for the entire transient.

The BSIM3V3 MOSFET model has 2 different Non-Quasi Static MOSFET models: AC Non-Quasi Static

Model and Transient Non-Quasi Static MOSFET Model. All of the subsequent discussions are based on

the reference: A Robust and Physical BSIM3 Non-Quasi-Static Transient and AC Small-Signal

Model for Circuit Simulation by Mansun Chan, Kelvin Y. Hui, Chenming Hu and Ping K. Ko

published in IEEE Transactions on Electron Devices, Vol. 45, No. 4, April 1998.



AC Non-Quasi Static MOSFET Model:

Response to high frequency AC signals is modeled by enabling AC Non-Quasi Static Model which is a

distributed channel model. This model breaks down the channel length internally into smaller sections so

that transit time effects across each section are negligible. The figure below depicts the equivalent

distributed model used in BSIM3V3:

Fig 5: Adapted from reference paper: Depicts the AC Non-Quasi-Static MOSFET model used in

BSIM3V3

The specific model equations are:

( )

Relmore models the high frequency gm roll-off of the MOSFET.



An N-lumped model would give identical results asymptotically and the figures below depict the

simulation results for using an N-lumped model versus the AC Non Quasi Static Model on BSIM3V3

(LEVEL = 49) enabled by specifying acnqsmod = 1 in the .model block of statements.

Fig 6: Frequency response for the gain of an NMOS inverter W/L=30/30 with 200kohms resistive load

for BSIM3V3 Non-Quasi Static Model and N-Lumped LEVEL=3 HSPICE MOSFET model. Simulation

adapted from reference paper.



Transient Non-Quasi Static MOSFET Model:

The transient Non-Quasi-Static MOSFET model on BSIM3V3 (LEVEL=49) is a charge deficit model,

where the deficit charge is modeled by a Non-Quasi Static Charge with a relaxation time given by

. This is an El-More Delay based model where the time constant τ is the relaxation

time for the deficit charge. The specific model equations are:

( )

( )

( )

( ) ( )

( ) ( ) ( ) ( )

( )

( )

( )

( ( ))

( ( ) )

( )

( )

Fig 7: Equivalent Circuit used for BSIM3V3 Non Quasi Static MOSFET Model enabled by specifying

nqsmod=1 in .model block of statements. XD and XS is the charge partition ratio taken as 50-50 in the

simulations.

Quasi-Static approaches to deal with the transient currents are to allocate the channel charge to source and

drain in different ratios 40%-60% or 10%-90%. This approach allocates the charge Qcheq(t) in these ratios

instantaneously at time t and this leads to current spikes at source and drain nodes. The Non-Quasi-Static

approach avoids these current spikes and gives more realistic rise and fall times at the associated nodes.

The following sections describe the simulations carried out to study these effects.



BSIM3V3 Simulations from reference paper: Drain Current Spike

Fig 8: Drain current of the NMOSFET during turn-on transient simulated using LEVEL=3 HSPICE and

LEVEL=49 BSIM3V3. Input step had a 1ps rise time. Self loading of the transistor limits the output rise

time. The blue line is for Non-Quasi-Static Model and green is for Quasi-Static model with XQC=0.1.

The labeling in figure is wrong. Quasi Static models give current spikes of varying magnitudes depending

on the charge partitioning ratio leading to faster rise times at output nodes. Simulation adapted from

reference paper.



BSIM3V3 Simulations from reference paper: Source Current Spike

Fig 9: This figure demonstrates the source current spike during the turn-off transient for the Quasi-Static

Model with XQC = 0.4 and 0.1 and for Non-Quasi Static Model with XPART = 0.5. The source current

spike leads to faster fall times at output for Quasi Static MOSFET models. Simulation adapted from

reference paper.



BSIM3V3: 2 input NAND Gate: 1um & 0.18um channel lengths:

Fig 10: Output node voltages and currents for a 2 input NAND gate simulated using Quasi-Static Model

with XQC=0.4 and 0.1 and Non-Quasi-Static MOSFET MODEL with XPART=0.5. The current spikes

for Quasi-Static models give faster rise and fall times. All transistors are 7.2/0.18.

Fig 11: Same simulations as above this time with channel lengths of 1um. Widths changed appropriately.



BSIM3V3: 2 input NOR Gate: 1um and 0.18um channel lengths

Fig 12: Output node voltages and currents for a 2 input NOR gate simulated using Quasi-Static Model

with XQC=0.4 and 0.1 and Non-Quasi-Static MOSFET MODEL with XPART=0.5. The current spikes

for Quasi-Static models give faster rise and fall times. NMOS size: 7.2/0.18 PMOS size: 28.8/0.18 Output

node voltages are not identical for Quasi-Static and Non-Quasi-Static Models. The figure also depicts the

intermediate node voltage for the series connection of 2 PMOS transistors in VINT..

Fig 13: Same simulations as above with NMOS channel length = 1um. The output node voltages are now

identical for Quasi-Static and Non-Quasi-Static models unlike the previous case.



Conclusions A study of the Non-Quasi Static BSIM3V3 MOSFET model was carried out. The reference paper was

used as a template to understand the model and to learn to do simulations using the model. All

simulations from the reference paper could not be reproduced. However, important transient and ac

simulations could be replicated and are outlined in this report. All simulations outlined in the reference

paper use NMOSFETS with channel lengths larger than 1um. There is no reference point for sub-micron

channel length MOSFETs in the reference paper. Simulations for 2 input NOR gate depict an inaccuracy

in the final voltage level at output for 0.18um channel length MOSFETs. Simulations for 2 input NAND

and NOR gates with channel lengths greater than 1um show accurate voltage levels at output. However,

they depict significant current spikes which cannot be explained. There are known inaccuracies in the

BSIM3V3 Non-Quasi-Static MOSFET model as outlined in [6.] Also current spikes in Quasi-Static

MOSFET models lead to faster rise and fall times at the output as compared to Non-Quasi-Static

MOSFET models.



References:

1. PSP: An Advanced Surface-Potential-Based MOSFET Model for Circuit Simulation

Gennady Gildenblat, Xin Li, Weimin Wu, Hailing Wang, Amit Jha, Ronald van Langevelde, Geert D.

J. Smit, Andries J. Scholten, and Dirk B. M. Klaassen

IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 53, NO. 9, SEPTEMBER 2006

2. PHILIPS MOS MODEL 11:

http://www.nxp.com/wcm_documents/models/mos-models/model-11/rvl141200.pdf

3. BSIM3: A Physical and Scalable I-V Model in BSIM3V3 for Analog/Digital Circuit Simulation

Yuhua Cheng, Min-Chie Jeng, Zhihong Liu, Jianhui Huang, Mansun Chan, Kai Chen, Ping Keung Ko,

Chenming Hu

IEEE Transactions on Electron Devices, Vol. 44, No. 2, February 1997

4. AN EXPLICIT PHYSICAL MODEL FOR THE LONG-CHANNEL MOS TRANSISTOR

INCLUDING SMALL-SIGNAL PARAMETERS

ANA ISABELA, ARAUJO CUNHA, MARCIO CHEREM SCHNEIDER and CARLOS GALUP-

MONTORO

Departamento de Engenharia ElCtrica, Universidade Federal de Santa Catarina, C.P. 476,

CEP 88040-900, Florianbpohs. SC, Brazil

Solid-State Electronics~ Vol. 38, No. I I, pp. 1945-1952, 1995

5. A Robust and Physical BSIM3 Non-Quasi-Static Transient and AC Small-Signal Model for Circuit

Simulation by Mansun Chan, Kelvin Y. Hui, Chenming Hu and Ping K. Ko, IEEE

Transactions on Electron Devices, Vol. 45, No. 4, April 1998.

6. A New Approach to Model Nonquasi-Static (NQS) Effects for MOSFETs—Part I: Large-Signal

Analysis

Ananda S. Roy, Juzer M. Vasi, Senior Member, IEEE, and Mahesh B. Patil

IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 50, NO. 12, DECEMBER 2003

http://www.nxp.com/wcm_documents/models/mos-models/model-11/rvl141200.pdf

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