EE105 Fall 2007Lecture 21, Slide 1Prof. Liu, UC Berkeley Lecture 21 OUTLINE Frequency Response –...

EE105 Fall 2007 Lecture 21, Slide 1 Prof. Liu, UC Berkeley

Lecture 21

OUTLINE• Frequency Response

– Review of basic concepts– high-frequency MOSFET model– CS stage– CG stage– Source follower– Cascode stage

Reading: Chapter 11

REMINDERS• Review session: Fri. 11/9, 3-5PM in 306 Soda (HP Auditorium)• Midterm #2 (Thursday 11/15, 3:30-5PM in Sibley Auditorium)


• The impedance of CL decreases at high frequencies, so that it shunts some of the output current to ground.

• In general, if node j in the signal path has a small-signal resistance of Rj to ground and a capacitance Cj to ground, then it contributes a pole at frequency (RjCj)-1

Av Roll-Off due to CL

LDp CR

10

LDmv CjRgA

1

||


Pole Identification Example 1

inGp CR

11

LDp CR

12

0


Pole Identification Example 2

inm

G

p

Cg

R

1||

11

LDp CR

12

0


Dealing with a Floating Capacitance• Recall that a pole is computed by finding the resistance

and capacitance between a node and (AC) GROUND. • It is not straightforward to compute the pole due to CF in

the circuit below, because neither of its terminals is grounded.


Miller’s Theorem • If Av is the voltage gain from node 1 to 2, then a

floating impedance ZF can be converted to two grounded impedances Z1 and Z2:

vFF

F AZ

VV

VZZ

Z

V

Z

VV

1

1

21

11

1

121

v

FFF A

ZVV

VZZ

Z

V

Z

VV11

1

21

22

2

221


Miller Multiplication• Applying Miller’s theorem, we can convert a floating

capacitance between the input and output nodes of an amplifier into two grounded capacitances.

• The capacitance at the input node is larger than the original floating capacitance.

Fvv

F

v

F

CAjA

Cj

A

ZZ

1

1

1

1

11

Fv

v

F

v

F

CAjA

Cj

A

ZZ

11

111

1

112


Application of Miller’s Theorem

FDmGin CRgR

1

1F

DmD

out

CRg

R

1

1

1

0


MOSFET Intrinsic CapacitancesThe MOSFET has intrinsic capacitances which affect its performance at high frequencies:1. gate oxide capacitance between the gate and channel,2. overlap and fringing capacitances between the gate and the

source/drain regions, and3. source-bulk & drain-bulk junction capacitances (CSB & CDB).


High-Frequency MOSFET Model• The gate oxide capacitance can be decomposed into a

capacitance between the gate and the source (C1) and a capacitance between the gate and the drain (C2). – In saturation, C1 (2/3)×Cgate, and C2 0.

– C1 in parallel with the source overlap/fringing capacitance CGS

– C2 in parallel with the drain overlap/fringing capacitance CGD


Example

CS stage…with MOSFET capacitances

explicitly shownSimplified circuit for

high-frequency analysis


Transit Frequency

GS

mT C

gf 2

• The “transit” or “cut-off” frequency, fT, is a measure of the intrinsic speed of a transistor, and is defined as the frequency where the current gain falls to 1.

Conceptual set-up to measure fT

in

mT

inTminm

in

out

C

g

CjgZg

I

I

1

1

in

inin Z

VI

inmout VgI


Small-Signal Model for CS Stage0


… Applying Miller’s Theorem

GDDminThevinp CRgCR

1

1,

GDDm

outD

outp

CRg

CR1

1

1,

Note that p,out > p,in


Direct Analysis of CS Stage• Direct analysis yields slightly different pole locations

and an extra zero:

outinXYoutXYinDThev

outXYDinThevThevXYDmp

outXYDinThevThevXYDmp

XY

mz

CCCCCCRR

CCRCRRCRg

CCRCRRCRg

C

g

1

1

1

2

1


I/O Impedances of CS Stage

GDDmGSin CRgCjZ

1

1

DDBGD

out RCCj

Z ||1

0


CG Stage: Pole Frequencies

Xm

S

Xp

Cg

R

1||

1,

SBGSX CCC

YDYp CR

1,

DBGDY CCC

CG stage with MOSFET capacitances shown

0


AC Analysis of Source Follower• The transfer function of a

source follower can be obtained by direct AC analysis, similarly as for the emitter follower (ref. Lecture 14, Slide 6)

1

1

2

jbja

gC

j

v

v m

GS

in

out

m

SBGDGDS

SBGSSBGDGSGDm

S

g

CCCRb

CCCCCCg

Ra

0


Example

1

22111

22111111

))((

m

DBGDSBGDGDS

DBGDSBGSGDGSGDm

S

g

CCCCCRb

CCCCCCCg

Ra

1

1

2

jbja

gC

j

v

v m

GS

in

out


Source Follower: Input Capacitance

Sm

GSGDin Rg

CCC

1

• Recall that the voltage gain of a source follower isS

m

Sv

Rg

RA

1

Follower stage with MOSFET capacitances shown

0

Sm

GSGSvX Rg

CCAC

11

• CXY can be decomposed into CX and CY at the input and output nodes, respectively:


Example

1211

1 ||1

1GS

OOmGDin C

rrgCC

0


Source Follower: Output Impedance

mGS

GSG

X

X

gCj

CRj

i

v

1

• The output impedance of a source follower can be obtained by direct AC analysis, similarly as for the emitter follower (ref. Lecture 14, Slide 9)

0


Source Follower as Active Inductor

CASE 1: RG < 1/gm CASE 2: RG > 1/gm

• A follower is typically used to lower the driving impedance, i.e. RG is large compared to 1/gm, so that the “active inductor” characteristic on the right is usually observed.

mGS

GSGout gCj

CRjZ

1


Example

33

321 1||

mGS

GSOOout gCj

CrrjZ

03


MOS Cascode Stage• For a cascode stage, Miller multiplication is smaller

than in the CS stage.

11

21,

mm

Y

XXYv g

gv

vA

XYX CC 2


Cascode Stage: Pole Frequencies

12

11

,

1

1

GDm

mGSG

Xp

Cg

gCR

211

221

2

,

11

1

SBGDm

mGSDB

m

Yp

CCgg

CCg

22,

1

GDDBDoutp CCR

Cascode stage with MOSFET capacitances shown

(Miller approximation applied)0


Cascode Stage: I/O Impedances

12

11 1

1

GDm

mGS

in

Cgg

Cj

Z

22

1||

DBGDDout CCjRZ

0

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EE105 Fall 2007Lecture 21, Slide 1Prof. Liu, UC Berkeley Lecture 21 OUTLINE Frequency Response –...

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