EEWeb Pulse - Issue 70

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EEWeb PULSE INTERVIEW

Electrical Engineering Community

Issue 70 October 30, 2012

Andrew YaungPresident and CEOSchmartboard

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EEWeb PULSE TABLE OF CONTENTS


Andrew Yaung SCHMARTBOARD

Interview with Andrew Yaung - President, CEO and Co-Founder

How advancements made in EDA tools means it is becoming easier to simulate a product’s form, fit and function before they are manufactured

RTZ - Return to Zero Comic

Featured Products

BY FRANK KRÄMER WITH ALTIUM

4

11

12

22

E-CAD Meets M-CAD

Inside the TL431 Architecture: Choosing

29

BY CHRISTOPHE BASSO WITH ON SEMICONDUCTOR

How, unlike a classical op amp-based configuration, the way you wire the TL431 gives birth to two control lanes: a fast and a slow one.

The Fast or Slow Path

4


EEWeb | Electrical Engineering Community

SCHMARTBOARD

AndrewYaung

2726 Visit www.eeweb.com





SCHMARTBOARD

AndrewYaung

2726 Visit www.eeweb.com



Schmartboard’s mantra is “Electronics for Everyone,” meaning they provide

one of the easiest circuit prototyp-ing systems on the market. We spoke with Andrew Yaung, the CEO and co-founder, about his

inspiration in starting the company, the patented “EZ” technology, and what it means to design the “Schmart Way.”

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What was your work experience before co-founding SchmartBoard?

My family always stressed on education and academic excellence during my upbringing. I have always been good with Mathematics and Science as a kid, and this naturally took me to the path of Electrical Engineering in college full-time while working for Hewlett-Packard (HP) part-time.

I worked at HP as a product assembler and technician while attending San Jose State University for my engineering degree. After graduation, I started to work at HP as an engineer. There, I discovered that I got very bored with doing the same thing day in and day out. I changed several jobs during my engineering career at HP. One job that I really enjoyed doing was New Product Introduction Engineer. The job required working with folks from various disciplines such as marketing, sales, operations, finance, suppliers, and even understanding whether a product with its current defined specification would meet customers’ requirements. I found myself spending quite some time in that position since I have always been interested in creating things and making things work better.

Through that job I recognized that I wanted to start a company some day. I then decided that it was important for me to be in a much smaller environment than HP to further experience and gain “real business operation” experiences. In 1991, I left HP after receiving my graduate degree from Santa Clara University and went to a start-up. There after I joined another start-up, and those two start-up’s gave me an eye opening, real life experience and what it means to wear multiple hats, how to select the right folks for

the right position to get things done effectively, how to kick off strategic products and align sales channels with a very small core team, and more importantly how to control the cost.

After several years of cross functional leadership experiences along with my high volume hardware product development background, I founded and ran Shark Multimedia from 1995 - 2001; a company that designed, manufactured, and marketed various PC audio and

“We then asked ourselves ‘wouldn’t it

be better and definitely cheaper if one can try out to ensure the target

circuits work the way it intends prior to spending lots of

engineering dollars?’”

communication products. I exited the company after the company grew from infancy to $8 million in sales in less than 3 years. I then co-founded an engineering design and service company called Intellect Lab in 2001. There we noticed that companies were paying us to design PCB’s then redesigning them over and over again to correct minor design errors or mistakes. We then asked ourselves “wouldn’t it be better and definitely cheaper if one can try out to ensure the target circuits work the way it intends prior

to spending lots of engineering dollars?”

This hypothesis led us to invent the first SchmartBoard in 2003.

What kind of products and services does SchmartBoard provide?

After introducing the first generation of SchmartBoard’s, we very quickly

discovered that most people aren’t able to hand solder miniature surface mount ICs and components. We immediately jumped at the chance to try to solve this real life problem that engineers and hobbyists are facing. This led to the invention of SchmartBoard|ez technology. We spun SchmartBoard off as a separate corporation from Intellect Lab in 2005. SchmartBoard’s technology immediately gained the notice of the engineering community. SchmartBoard|ez was launched at the DEMOfall 2005 conference,


EEWeb PULSE INTERVIEW which is a showcase for the most promising new technologies. At that show we were given an INNY award by The Tech Museum in San Jose CA for having one of the most innovative technologies at that show.

SchmartBoard’s patented “EZ” technology allows one to easily hand solder small or tight pitched surface mount IC’s without any prior soldering skills. DIP parts are

our technology for the betterment of the prototyping community, and this business continues to grow organically. Additionally, SchmartBoard has partnered with other companies such as Parallax, Texas Instruments, and Microchip to add value to their products using our technology. SchmartBoard will soon release a board to support Cypress Semiconductor’s PSOC family of microcontrollers and the first real usable family of surface mount prototyping shields for Arduino users. Our products are available on our website and at distribution partners such as Fry’s Electronics, Jameco, Mouser Electronics and Radio Shack.

Do you provide full development boards for the companies you work with or do you integrate some of their components into an existing prototyping board?

Both. For example, we are developing a special development board for Cypress using our cost-effective technology. There are times when an IC company will approach us to see if they can use our prototyping board technology internally to save time and money when testing a new IC. However, they want to make sure it is a collaborative effort and that both of our imprints are on the new prototype, so in that sense, it is a partnership.

Can you explain the Microchip and TI board technology?

Cypress PSOC is a particular board where you can mount either a PSOCs 3 or PSOCs 5—whichever board you choose to use. Our technology supports multiple footprints—4 or 6 different chips as of now. In the case of Microchip, our board supports 115 different

microcontrollers. A customer can purchase our board without it being populated with microcontrollers and choose to populate it with whichever one they need. That flexibility allows us to market a product to any user

“SchmartBoard’s patented ‘EZ’

technology allows one to easily hand solder small or tight pitched

surface mount IC’s without any prior soldering skills.“

for a relatively inexpensive price. It also allows the user to create a custom board with a variety of ICs depending on their specific needs, which creates a unique product. It’s a win-win situation for everybody.

What is the process of designing a circuit the “Schmart” way?

Our company’s mantra is “Electronics for Everyone,” and we mean it. Our hope is to allow anyone to be able to design and put together an electronic circuit of his/her dream using SchmartBoard|ez based circuit boards and circuit modules. We call this designing a circuit the “Schmart” way! Introducing a “game-changing technology” and letting people know about our unique technology has been and will continue to be the most challenging aspects of the business. We are not resting on our laurels though. We have many plans

going away and outside of using expensive sockets, we are the only real game in town. SchmartBoard supports most types and sizes of SOIC, QFP, and QFN packages. SchmartBoard is the only company in the world to offer a true patented solution for soldering surface mount electronic parts and is used by engineers, students, and hobbyists.

Where will this technology be implemented?

We have successfully marketed

8



to continue innovating and growing SchmartBoard in many other ways.

What are some new technologies we can expect to see from SchmartBoard in the near future?

An example of another market segment that we will also be introducing products for is the IC “Socket” market, based on SchmartBoard|ez. This “Socket” product line will allow an engineer to use EZ technology to functional use/test expensive IC’s with relatively low cost. Today, due to the highly mechanical and customized properties of IC sockets, the cost can be prohibitive to many who need a solution. We will offer a much lower cost alternative for packages such as BGA, QFN, DFN, and less ICs.

We also believe our “EZ” technology can be further fine-tuned to implement in volume manufacturing operations to improve manufacturing reliability and yield concerns. We have identified several companies and institutions that we think may

have interest in the technology. We are actively pursuing relationships with entities that have the need and resources to utilize this technology to resolve the serious problems which plague the circuit board assembly community. These issues have become more pronounced with the miniaturization of parts and the advent of RoHS standards. Once we prove this concept and successfully implement our technology as a solution, significant financial and unnecessary waste of labor resources can be eliminated

How many employees does SchmartBoard have?

Today, Schmartboard is a less than 10 person small company with a very nimble, get the job done culture. I started it, and I was there at the beginning in the development of the products and company. It will be some time before I am phased out.

“Society tends to admire instant success, but I think the most

important thing is to make sure that you are providing long lasting value, and endure the process by taking a step-by-step approach

to achieve final success.”


EEWeb PULSE INTERVIEW What is the most valuable thing you have learned from your experience?

In my 21+ years involved with various start-ups, I’ve learned many things. Of that, I believe continued innovation in making great things that offer real values, should be combined with hard work, persistence, and most importantly long-term thinking. The start-up world, and our society in general, has an instant-gratification thing. Society tends to admire instant success, but I think the most important thing is to make sure that you are providing long lasting value, and endure the process by taking

a step-by-step approach to achieve final success.

Is there anything that you have not accomplished yet, that you have your sights on accomplishing in the near future?

I have 2 beautiful children. Alexander is 17 and Amanda is 12. My vision of the future revolves around them, and I have in mind 2 important things to accomplish in the near future. One has to do with practical science and engineering/technology education beyond just a textbook based teaching for children in this country. The other has to do with physical well being of individuals since I fundamentally believe that a healthy body is a healthy mind and a healthy mind is a happy soul, and one can take on extraordinary tasks only when all three are there.

For more information about Schmartboard, visit their website at:

www.schmartboard.com

www.schmartboard.com

Optocouplers are the only isolation devices that meet or exceed the IEC 60747-5-5 International Safety Standard for insulation and isolation. Stringent evaluation tests show Avago’s optocouplers deliver outstanding performance on essential safety and deliver exceptional High Voltage protection for your equipment. Alternative isolation technologies such as ADI’s magnetic or TI’s capacitive isolators do not deliver anywhere near the high voltage insulation protection or noise isolation capabilities that optocouplers deliver.

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Piezo Haptic Driver with Boost ConverterThe DRV8662 is a single-chip piezo haptic driver with integrated 105 V boost switch, integrated power diode, and integrated fully-differential amplifier. This versatile device is capable of driving both high-voltage and low-voltage piezo haptic actuators. The DRV8662 supports four GPIO-controlled gains: 28.8 dB, 34.8 dB, 38.4 dB, and 40.7 dB. The boost voltage is set using two external resistors, and the boost current limit is programmable via the REXT resistor. The boost converter architecture will not allow the demand on the supply current to exceed the limit set by the REXT resistor; therefore, the DRV8662 is well-suited for portable applications. For more information, please click here.

Rail-to-Rail Out VFB Op AmpFabricated using the industry-leading BiCom-3x (SiGe complimentary bipolar) process, the OPA835 and OPA2835 are single and dual ultra low-power, rail-to-rail output, negative rail input, voltage-feedback operational amplifiers designed to operate over a power supply range of 2.5 V to 5.5 V Single Supply and ±1.25 V to ±2.75 V dual supply. Consuming only 250 µA per channel and a unity gain bandwidth of 56MHz, these amplifiers set an industry leading power-to-performance ratio for rail-to-rail amplifiers. Coupled with a power savings mode to reduce current to <1.5 µA, the device offers an attractive solution for high frequency amplifiers in battery powered applications. For more information, please click here.

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Bidirectional Voltage Level TranslatorsNXP’s NVT20xx family is a series of bidirectional voltage level translations that operate from 1.0 to 3.6 V (Vref(A)) and 1.8 to 5.5 V (Vref(B)). They perform bidirectional translations between 1.0 and 5 V without the need for a directional output pin in open-drain and push-pull applications and support widths from 1 to 10 bits. They are designed for applications that use a transmission speed of less than 33 MHz, an open-drain system with a 50 pF capacitance, and a pull-up of 197 Ω. When the An or Bn port is LOW, the clamp is in the ON-state and a low-resistance connection exists between the An andBn ports. The low ON-state resistance (RON) of the switch allows connections to be made with minimal propagation delay. For more information, please click here.

Optocouplers are the only isolation devices that meet or exceed the IEC 60747-5-5 International Safety Standard for insulation and isolation. Stringent evaluation tests show Avago’s optocouplers deliver outstanding performance on essential safety and deliver exceptional High Voltage protection for your equipment. Alternative isolation technologies such as ADI’s magnetic or TI’s capacitive isolators do not deliver anywhere near the high voltage insulation protection or noise isolation capabilities that optocouplers deliver.

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Avago Technologies Optocouplers

A Superior Technologyfor High Voltage Protection!

Technology You Can Trust

IEC 60747-5-5 Certifi ed

-140

-120

-100

-80

-60

-40

-20

0

0 20,000 40,000 60,000 80,000 100,000 120,000

Frequency (Hz)

A-

dB

cIN

2.7V

ADS8326

+In

-In

100

2.2nF

2k

2k

VIN

OPA835

VS-

2k

4.02k

4.02k

2.5V5VVS+

VDD REF

2.7V

0V

VSIG

1.35V

VSIG

OPA835OPA2835

www.ti.com SLOS713D –JANUARY 2011–REVISED OCTOBER 2011

Ultra Low-Power, Rail-to-Rail Out, Negative Rail In, VFB Op AmpCheck for Samples: OPA835, OPA2835

1FEATURES DESCRIPTIONFabricated using the industry-leading BiCom-3x• Ultra Low Power(SiGe complimentary bipolar) process, the OPA835– Supply Voltage: 2.5 V to 5.5 V and OPA2835 are single and dual ultra low-power,

– Quiescent Current: 250 µA (typ) rail-to-rail output, negative rail input, voltage-feedbackoperational amplifiers designed to operate over a– Power Down Mode: 0.5 µA (typ)power supply range of 2.5 V to 5.5 V Single Supply• Bandwidth: 56 MHz and ±1.25 V to ±2.75 V dual supply. Consuming only

• Slew Rate: 160 V/µs 250 µA per channel and a unity gain bandwidth of56MHz, these amplifiers set an industry leading• Rise Time: 10 ns (2 VSTEP)power-to-performance ratio for rail-to-rail amplifiers.• Settling Time: 45 ns (2VSTEP)For battery powered portable applications where• Overdrive Recovery Time: 195nspower is of key importance, the OPA835's and• SNR: 0.00015% (–116.4dBc) at 1 kHz (1V RMS) OPA2835's low power consumption and high

• THD: 0.00003% (–130 dBc) at 1 kHz (1 VRMS) frequency performance offers designers performanceversus power not attainable in other devices. Coupled• HD2/HD3: –70 dBc/–73 dBc at 1 MHz (2 Vpp)with a power savings mode to reduce current to <1.5• Input Voltage Noise: 9.3 nV/rtHz (f = 100 kHz) μA, the device offers an attractive solution for high

• Input Offset Voltage: 100 µV (500 µV max) frequency amplifiers in battery powered applications.• CMRR: 113 dB The OPA835 and OPA2835 are offered in following• Output Current Drive: 40 mA package options:• RRO – Rail-to-Rail Output • OPA835 Single: SOT23-6 (DBV), and 10 pin

WQFN (RUN) with integrated gain resistors.• Input Voltage Range: –0.2 V to 3.9 V• OPA2835 Dual: SOIC-8 (D), VSSOP (MSOP) -10(5 V supply)

(DGS), and 10 pin WQFN (RUN).• Operating Temperature Range:–40°C–125°C The OPA835 RUN package option includes

integrated gain setting resistors for smallest possiblefootprint on a printed circuit board (≈ 2mm x 2mm).APPLICATIONSBy adding circuit traces on the PCB, gains of +1, -1,• Low Power Signal Conditioning -1.33, +2, +2.33, -3, +4, -4, +5, -5.33, +6.33, -7, +8

• Audio ADC Input Buffer and inverting attenuations of -0.1429, -0.1875, -0.25,-0.33, -0.75 can be achieved. See Application• Low Power SAR and ΔΣ ADC DriverInformation section for details.• Portable SystemsThe devices are characterized for operation over the• Low Power Systemsextended industrial temperature range –40°C to• High Density Systems 125°C.

• Ultrasonic Flow MeterOPA835 Related Products

DESCRIPTION SINGLES DUALS TRIPLES QUADS

Rail-to-Rail — OPA2830 — OPA4830

Rail-to-Rail, Low OPA836 OPA2836 — —Power

Rail-to-Rail, Fixed OPA832 OPA2832 OPA3832 —Gain

General-Purpose, High OPA690 OPA2690 OPA3690 —Slew Rate

Low-Noise, DC OPA820 OPA2822 — OPA4820Precision

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Copyright © 2011, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.

http://www.eeweb.com/company-news/texas_instruments/piezo-haptic-driver-with-integrated-boost-converter/

http://www.eeweb.com/news/energy-star-compliant-ac-dc-power-system/

http://www.ti.com/product/drv8662

http://www.eeweb.com/company-news/texas_instruments/rail-to-rail-out-vfb-op-amp/

http://www.ti.com/product/opa835

http://www.eeweb.com/news/integrated-touch-and-sensor-hub-mcus/

http://ir.atmel.com/releasedetail.cfm?ReleaseID=716784

http://www.eeweb.com/company-news/nxp/bidirectional-voltage-level-translators/

http://www.nxp.com/documents/leaflet/75017135.pdf

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http://www.eeweb.com/news/integrated-touch-and-sensor-hub-mcus/

http://www.eeweb.com/company-news/nxp/bidirectional-voltage-level-translators/

http://www.eeweb.com/company-news/texas_instruments/piezo-haptic-driver-with-integrated-boost-converter/


EEWeb PULSE TECH ARTICLE

12 EEWeb | Electrical Engineering Community

Frank KrämerAltium Europe - MarketingDirector For EMEA

E-CAD

M-CADMeets



Frank KrämerAltium Europe - MarketingDirector For EMEA

E-CAD

M-CADMeets

It is often felt that because manufacturing processes naturally migrate to the region with the lowest cost, developed economies suffer. However, another viewpoint is that by outsourcing repetitive tasks, the resources previously occupied with low value activities are presented with greater opportunities. The same is true with design; by employing design automation tools, engineers are able to increase their productivity. It would be unthinkable today for an engineer to use a non-computerised approach to designing a PCB, for instance, even though it is entirely possible to do so.



And just as economies must adapt to changing global conditions, engineering teams are encouraged and incentivised to make use of every productivity tool at their disposal. For electronic design engineers, the use of EDA tools has vastly improved the design process, from component to end product. As well as accelerating the design process, it is now becoming possible to simulate or emulate every part of an electronic design before a single component is even purchased. In the field of integrated circuit development, for example, the very last step in a long and expensive process is to commit — or ‘tape out’ — a design to silicon. This is largely due to the enormous costs involved with manufacturing integrated devices; a cost that is only borne by the opportunity of selling the final device in large volumes. The same is not yet true for all electronic products developed today; most incur much lower non-recurring engineering costs, but for mechanical design there are significant cost implications of re-designing tooling due, for example, to a clearance issue with the PCB inside the product.

The advances made in EDA tools means it is becoming easier to simulate a product’s form fit and function before they are manufactured. Even so, with the obvious exception of IC design, the progress of design automation tools in the electronics sector has been relatively focused on niche applications and vertical markets. PCB design is an example; there are any number of low cost PCB design tools that are adequate for creating simple single- or double-sided layouts, but fewer that are capable of tackling multi-layer PCBs with very high speed signals and mixed-signal domains, and fewer still that incorporate effective analysis tools that ensure signal integrity isn’t compromised.

For those designs that need these features, the tools are invaluable. They offer the only realistic solution to developing the kind of end products that we now take for granted to deliver our digital lifestyle. For example, mobile telecommunications would not be possible without sophisticated EDA tools; they enable talented engineers to develop the complex mixed-signal devices and systems needed to make 3G networks and smart phones a reality.

The examples are numerous but the underlying trend is that the more complex the design, the more sophisticated the tools. However, there is one aspect of design that is applicable to practically every single product developed, irrespective of its functional complexity or end market value.

The integration of electronic and mechanical design is inexorable; with few exceptions PCB design is not only influenced by the components it carries but by the space it can occupy. Many products today feature a single PCB and in such cases the size and shape of the PCB is dictated less by its functionality and more by its environment. In fact, in some cases — particularly in consumer devices — the shape and size of the end product will actually define the available space for the PCB and all its components. In these cases mechanical design dictates both domains, yet there remains limited interaction between CAD tools targeting the mechanical and electronic domains.

While the focus of electronic CAD tool vendors has, understandably, been on addressing the complexity of electronic design, their counterparts have been industrious in improving M-CAD tools to make full use of the processing and graphical capabilities of the latest PCs and desktop computers. It is now commonplace for mechanical design engineers to have access to three-dimensional representations of their designs, rendered in real-time. As a productivity enhancement it is hard to deny the value of seeing the product of an engineer’s efforts in a 3D environment that supports real-time manipulation to vary the viewing angle.

It’s also valid to mention that while ICs continue to shrink in size, their supporting components are less likely or able to do so. Specifically, fundamental principals limit the physical size of passive components such as transformers, resistors, capacitors and inductors, and while there is less need for numerous connectors in modern equipment, those that remain have physical restrictions on how small they can be and where they must be placed on a board. This has its benefits, however, as there now exist numerous 3D models for standard components such as passives and connectors that can be used and manipulated in a growing number of CAD packages.

CROSSING DESIGN DOMAINS



The widespread creation of these 3D models indicated renewed commitment from vendors towards E-CAD/M-CAD integration; a trend that many in the industry believe will continue, bringing significant productivity gains to engineers across both domains.

Perhaps the most significant development along this path to full integration was the introduction of a design interchange protocol that both E-CAD and M-CAD tool vendors could adopt with confidence. While there have been many attempts in the past to integrate the two domains, they have been impeded by a lack of cooperation between vendors, which resulted in adding complexity rather than removing it. But, with the introduction of STEP (Standard for the Exchange of Product model data), specifically version AP214 which defines 3D models, the interchange of design data has become much simpler. The M-CAD sector

has been quick to integrate STEP AP214 compliance in to its value chain, but the same isn’t true for the E-CAD sector. However, Altium Designer, the unified design environment from Altium, does support STEP file import/export and manipulation, and coupled with its comprehensive PCB design functionality it brings a new level of productivity to all electronic engineers.



3D CAPABILITIES IN THE PCB SPACE

Many M-CAD tools now support 3D models of populated PCBs created by a 3rd Party tool; but while this offers valuable visualisation of how the PCB and the casing will ultimately interact, it doesn’t provide the ability for the mechanical environment to feed back to the PCB designer critical dimensions, clearances or other spatial compliance issues. In addition, mechanical design engineers are less equipped to appreciate the need for certain component positioning, particularly when high speed, mixed signal or high voltage signals are present.

The adoption of the STEP format within Altium Designer overcomes this restriction. It enables engineers to not only use a 3D model of an enclosure to visualise the end product, but actively adopt a three-dimensional approach to their design. Embedded within the AP214 format is enough data to allow an imported model of an enclosure to actually be used to define the dimensions of a PCB, overcoming the issue of accurately and manually transferring critical measurements from one domain to another. This capability takes a significant step towards enabling electronic design engineers to design for manufacture, by closely linking the mechanical domain to the electronic design process.

Furthermore, the ability to define clearance requirements within a 3D format means engineers in both domains can instantly see the impact of design changes. By combining the models of the enclosure and the PCB, within Altium Designer, an engineer can manipulate the resulting 3D representation to actively measure clearances. This unprecedented feature means the electronic engineer will have complete confidence in the compliance of the final PCB long before manufacturing.





To make the process even more productive, models can be linked so that any changes made in one domain are reliably reflected in the other. It means that any changes made to the enclosure will be seen by the electronic engineer and any alterations to the PCB or its components will be automatically relayed to the mechanical engineer.

Key to this functionality is the ability to not only manipulate a single 3D model, but coordinate multiple models in a virtual 3D space, using reference points. By precisely aligning models for the parts of an enclosure and a populated PCB, design engineers can verify critical clearances, as well as the way the PCB will fit within the enclosure or the need for support bosses and fixings, while preserving the product’s overall market objectives.

Another benefit of working in a virtual world is that engineers can experiment without cost. For example, if a component is aligned using three reference points it is possible to place one component such that it passes through the second. Imagine a PCB oriented such that it protrudes through an enclosure; it may seem unconventional but it could just solve a design dilemma. Achieving this using real models would require hours of effort but in a virtual domain it is as simple as changing a single reference point. This close interaction between the electronic and mechanical domains is only possible today through the use of the STEP format. Embodying the STEP format in to a PCB design environment marks a significant move towards creating a truly unified approach to product development.



About the AuthorFrank Krämer holds a degree in Electrical Engineering from the Technical University of Karlsruhe, Germany and has been working in the field of EDA sales and support since 1997. He joined Altium in 2002, first heading the pre- and post-sales team for all Altium clients in Europe and progressing to his current position as Technical Marketing Director for the EMEA region in 2010.

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InsideThe TL431ArchitectureChoosing the Fastor Slow PathChristophe BassoToulouse, FranceON Semiconductor



InsideThe TL431ArchitectureChoosing the Fastor Slow PathChristophe BassoToulouse, France

The TL431 is one of the most popular elements found

in switching power supplies. Hosting a self-contained open-

collector operational amplifier and a precise 2.5-V reference voltage,

the device lends itself very well to controlling an ac-dc converter with the

help of an optocoupler. However, unlike a classical op amp-based configuration,

the way you wire the TL431 gives birth to two control lanes: a fast and a slow one.

Figure 1 shows the typical architecture of a TL431-based compensator architecture.



The two lanes are created because ac changes in Vout

give birth to an ac current flowing in R22 but also in R20. As feedback information is transmitted from the isolated secondary side to the primary side by the LED current, you have two paths to drive it: through R20 or R22. At high frequencies, when C9 is a short circuit, changes in Vout no longer drive the LED current via the TL431. The cathode is fixed to maintain the dc point, but ac modulation on the upper terminal of R22 is not propagated to the TL431 output: the slow lane is off for these frequencies. However, as the TL431 cathode is fixed, any change in Vout will induce a current change in the LED via resistance R20 and there is nothing you can do about it. This is the fast lane contribution. It is easy to show that this configuration brings an origin pole and a zero. The high-frequency pole is created by Rpullup and C6, together with the optocoupler parasitic capacitance. As depicted in Figure 1, you have a true type 2 compensator. It can be shown that the transfer function of such a compensator is described by:

The Common Mistake

Novice designers have little experience with the TL431 and its two lanes. They believe the part operates like a classical op amp and there is no difference with the implementation of a classical type 2 compensator. Very often, they end up wiring extra RC elements in parallel with C9 as shown below, in Figure 2.

CTR

Vdd Vout(s)

VFB(s)

R20Rpullup R22

C9

C6

CTR

Vdd Vout

VFB(s)

R20Rpullup R22

C9

C10 R2

ZfC6

VTL431(s)

Figure 1: the TL431 has two lanes, a fast one and a slow one.

Figure 2: an extra RC network is useless to the TL431 network.

( )( ) 0

1

1

zFB

out

p

V s sGsV s

ω

ω

+= −

+

(s)



Deriving the transfer function for this network is not really complicated. First, express the impedance made by the series-parallel combination of C10C9 and R2:

( )2

10 9

210 9

1 1

1 1f

RsC sC

Z sR

sC sC

+

=

+ +

Then derive the ac current flowing in the LED:

( ) ( ) ( ) ( ) ( )431

20 20 22

1 fout TL outLED

Z sV s V s V sI s

R R R −

= = +

The right term can be developed as follows:( )22

1 fZ sR

+

( )

( )

210 2 9 22 10 22 9 10 2 22

22 2 10 99 22 10 22

9 10

11

1

fZ s C R s C R s C R s C C R R sR R C Cs C R C R s

C C

+ + + ++ =

+ + +

We have a second-order polynomial form in the numerator and two poles in the denominator. This expression can be re-arranged to fit the following format:

( ) ( )

( )1

2

20 010 2 9 22 10 22 9 10 2 22

22 2 10 922 9 10

9 10

11

11 1

f

po p

s sZ s Qs C R C R C R s C C R R

R R C C s ssR C C sC C

ω ω

ω ω

+ + + + + + + = =

+ + + +

In this expression, we can identify a quality factor, a resonant frequency and two poles:

09 10 22 2

1C C R R

ω =

( )9 10 2 22

22 9 10 10 2

C C R RQ

R C C C R=

+ +

( )22 9 10

1po R C C

ω =+

1

9 10

2 10 9p

C CR C C

ω+

=

Now that we have a nice-looking polynomial form, we can express the feedback voltage expression, VFB(s):

( ) ( )

2

CTR1

pullupFB LED

p

RV s I s

sω

= −+

In this expression, CTR stands for the optocoupler current transfer ration, Ic / IF where Ic is the collector current obtained from a certain LED current IF.

If we now substitute (3) in (10), we are close to our final expression:

( ) ( )

21

2

0 0

20

1CTR

1 1

pullupoutFB

p po p

s sR QV s

V ssR s s

ω ω

ω ω ω

+ +

= − + +

Rearranging a little, we obtain:

( )( )

21

2

0 0

11

11

FB

out

ppo p

s sQV s

GsV s s s

ω ω

ωω ω

+ +

= − ++

In this equation, the term G is a gain involving the optocoupler current transfer ratio with Rpullup and R20:

20CTRpullupR

GR

=

You recognize the second-order polynomial form in the numerator indicative of two zeros. In the denominator, we have three poles with one at the origin: far away from the type 2 definition, isn’t it? This is because the fast lane distorts the classical analysis by providing a high-frequency parallel path. You will agree that the second-order polynomial form is not really practical. The roots - actually the zeros - of this expression are given by:

20

1 2

1 1 4,

2Q

s sQω ± −

=

If the quality factor Q is weak, well below 1, the square root in which Q appears can be approximated as:

( )1 1nx nx+ ≈ +



Capitalizing on this result, the new roots can be expressed as:

01s Q

ω≈

2 0s Qω≈

Using (6) and (7), we have the definition of our two separate zeros:

1

2 22

10 2 9 2 22

1z

R RC R C R R

ω+

≈ +

( )222 9 10 10 2

1z R C C C R

ω ≈+ +

Then (12) can be rearranged using the split zeros and by factoring s/ z2:

( )( )

2

1

21

0

1 11

11

z

zFB

out

pp

ssV s

GsV s s

ωω

ωω

+ + ≈ − ++

G0 now includes the previous gain G multiplied by po

and divided by z2:

2

020

CTRpullup po

z

RG

Rωω

=

If you carry the analysis further, you should unveil the poles and zeros positions as follows, considering C9 []

C10:

22 10

1po R C

ω ≈

12 9

1p R C

ω ≈

26

1p

pullupR Cω =

( )110 2 9 2 22

1 1||z C R C R R

ω ≈ +

( )222 9 10 10 2

1z R C C C R

ω ≈+ +

p1 and p2 are both located in the high frequency portion of the spectrum and simply cancel each other. The transfer function now simplifies to:

( )( )

2 2

1

21 2

0 0

1 1 11

11 1

z z

zFB

out

pp p

ss sV s

G GsV s s s

ω ωω

ωω ω

+ + + ≈ − ≈ − ++ +

This is the equation of a classical type 2 compensator. To check what is its ac transfer function, we have plotted (27) in Mathcad® but we also simulated the electrical schematic given in Figure 2. The text fixture appears in Figure 3.

4

6 5

3

1

12

2

10

7

9

err

330pCpole

470pCzero

10nC4

10kR3

AC=1V3

0 : V(err)V(err)<0 ?VoltageB1

1kC3

1kL1 -1k

E1

100mR5

+2.5V2

38kR2

TL431_GX1

20kRpullup

1.8kRLED

15kR6

V4

5V1

+

+

++

+

–+

–

CTR=0.3Cpole=2nOptocouplerX2

dB º171

153

135

117

99.0

34.0

22.0

10.0

-2.00

-14.0

10 100 1k 10k 100k

|G( f )|

arg G( f )

dB º180

160

140

120

100

40

20

0

-2010 100 1x103 1x104 1x105

|G( f )|

fk

arg G( f )

Figure 3: this test fixture provides an automatic bias point to the TL431-based compensator.

Figure 4: results show perfect agreement between the computed expression and the simulation results.



4

6 5

3

1

12

2

10

7

9

err

330pCpole

470pCzero

10nC4

10kR3

AC=1V3

0 : V(err)V(err)<0 ?VoltageB1

1kC3

1kL1 -1k

E1

100mR5

+2.5V2

38kR2

TL431_GX1

20kRpullup

1.8kRLED

15kR6

V4

5V1

+

+

++

+

–+

–

CTR=0.3Cpole=2nOptocouplerX2

These plots confirm that we are back to the opening equation (1), describing Figure 1 architecture with single capacitor C9 in the return path. As you can see, adding the extra RC network R2-C10 does nothing but complicating the final transfer function! As a summary, keep a single capacitor C9 to build your type 2 compensator.

A New Book Entirely Dedicated to Loop Control

The TL431 is a complex device and its implementation in compensation stage is often overlooked, furthermore if an optocoupler is added in the chain. In his new book “Designing Control Loops for Linear and Switching Power Supplies: a Tutorial Guide”, Christophe Basso

dedicated an entire 70-page chapter to the TL431, detailing internals of this popular component. He then described the three compensation types (1, 2 and 3) for isolated and non-isolated converters built around the 3-leg self-contained reference voltage op amp. The book explores in details other compensation structures made with op amps but also transconductance amplifiers and popular shunt regulators.

Loop control is an important topic to the student and the electronics engineer. Theory can be extremely complex and encompasses a lot of different fields: electronics, mechanics and fluid mechanics to cite a few. Available theory books often attempt to cover the subject exhaustively, quickly drowning readers into a sea of mathematical details they will never use or are irrelevant to their professional field. Furthermore, these textbooks remain highly theoretical and the link to practical applications is often overlooked. Trying to apply what has been learned to a real case quickly ends up in a dead-end: equations or descriptions simply do not match the environment the engineer is confronted with.

This book explores a different path. It purposely narrows down the field to what power electronics engineers really need to know for compensating or stabilizing the system they are working on. The book builds the necessary theoretical foundations but shows how to apply what is analytically explored to practical cases. For this reason, this work will please the practicing engineer but also students looking for a link between theory classes and their future work.

You will find a complete description of the book content and documents pertaining to switching power supplies on the author website at: http://cbasso.pagesperso-orange.fr/Spice.htm

dB º171

153

135

117

99.0

34.0

22.0

10.0

-2.00

-14.0

10 100 1k 10k 100k

|G( f )|

arg G( f )

dB º180

160

140

120

100

40

20

0

-2010 100 1x103 1x104 1x105

|G( f )|

fk

arg G( f )

Figure 3: this test fixture provides an automatic bias point to the TL431-based compensator.

Figure 4: results show perfect agreement between the computed expression and the simulation results.

http://cbasso.pagesperso-orange.fr/Spice.htm



Low Voltage ORing FET ControllerISL6146The ISL6146 represents a family of ORing MOSFET controllers capable of ORing voltages from 1V to 18V. Together with suitably sized N-channel power MOSFETs, the ISL6146 increases power distribution efficiency when replacing a power ORing diode in high current applications. It provides gate drive voltage for the MOSFET(s) with a fully integrated charge pump.

The ISL6146 allows users to adjust with external resistor(s) the VOUT - VIN trip point, which adjusts the control sensitivity to system power supply noise. An open drain FAULT pin will indicate if a conditional or FET fault has occurred.

The ISL6146A and ISL6146B are optimized for very low voltage operation, down to 1V with an additional independent bias of 3V or greater.

The ISL6146C provides a voltage compliant mode of operation down to 3V with programmable Undervoltage Lock Out and Overvoltage Protection threshold levels

The ISL6146D and ISL6146E are like the ISL6146A and ISL6146B respectively but do not have conduction state reporting via the fault output.

Features• ORing Down to 1V and Up to 20V with ISL6146A, ISL6146B,

ISL6146D and ISL6146E

• Programmable Voltage Compliant Operation with ISL6146C

• VIN Hot Swap Transient Protection Rating to +24V

• High Speed Comparator Provides Fast <0.3µs Turn-off in Response to Shorts on Sourcing Supply

• Fastest Reverse Current Fault Isolation with 6A Turn-off Current

• Very Smooth Switching Transition

• Internal Charge Pump to Drive N-channel MOSFET

• User Programmable VIN - VOUT Vth for Noise Immunity

• Open Drain FAULT Output with Delay- Short between any two of the ORing FET Terminals- GATE Voltage and Excessive FET VDS- Power-Good Indicator (ISL6146C)

• MSOP and DFN Package Options

Applications• N+1 Industrial and Telecom Power Distribution Systems

• Uninterruptable Power Supplies

• Low Voltage Processor and Memory

• Storage and Datacom Systems

TABLE 1. KEY DIFFERENCES BETWEEN PARTS IN FAMILY

PART NUMBER KEY DIFFERENCES

ISL6146A Separate BIAS and VIN with Active High Enable

ISL6146B Separate BIAS and VIN with Active Low Enable

ISL6146C VIN with OVP/UVLO Inputs

ISL6146D ISL6146A wo Conduction Monitor & Reporting

ISL6146E ISL6146B wo Conduction Monitor & Reporting

FIGURE 1. TYPICAL APPLICATION FIGURE 2. ISL6146 GATE HIGH CURRENT PULL-DOWN

VIN GATE VOUT

GND

ADJ

+

-

+

VOUT

+

-

+ COMMONPOWERBUS

Q1

ISL6146BFLT

BIAS

VOLTAGE

DC/DCVOLTAGE

DC/DC

EN

(3V - 20V)

(3V - 20V)

Q2

COMMONPOWERBUS

VIN GATE VOUT

GND

ADJISL6146B

FLT

BIAS

EN

GATE FAST OFF, ~200ns FALL TIME~70ns FROM 20V TO 12.6V ACROSS 57nFGATE OUTPUT SINKING ~ 6A

October 5, 2012FN7667.3

Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2011, 2012All Rights Reserved. All other trademarks mentioned are the property of their respective owners.

Get the Datasheet and Order Samples

http://www.intersil.com

http://bit.ly/nHxRhB

http://www.eeweb.com/register

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