Embedded SystemSpring, 2011Lecture 6: Branch, Call and Time Delay LoopEng. Wazen M. Shbair

2IUG- Embedded System

Today’s Lecture

Unconditional branch instruction Call instructions and Stack Stack Pointer (SP)

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Unconditional branch instruction

Control is transferred unconditionally to the target location (at ROM)

Tow unconditional branches GOTO BRA

Decide which to use is depend on the target address

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GOTO( LONG JUMP)

It can go to any memery location in the 2M address space of the PIC 18.

Its 4-Byte (32 bit) instruction 12 bit Opcode 20 bit Address

The 20-bit target address allow addressing 1M of memory location (00000-FFFFF), instead of 2M !!!

Some of the PIC 18 family members have only 4k-32k of ROM. For this reason there is another 2-byte instruction (BRA).

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BRA (branch)

This is 2-byte (16 bit ) instruction First 5 bit opcode Lower 11 bit relative address of the target

000-FFFH is divided into forward and backward jumps

If the jump is forward, then target address is positive.

If the jump is backward then the target address is negative.

The 2-byte insruction is prefered because it take less ROM space.

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Branch

GOTO to itself using $ sign HERE GOTO HERE GOTO $ BRA $

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Call instructions and Stack

CALL instruction is used to call a subroutine. Subroutines are often used to perform tasks the

need to performed frequently. In the PIC18 there are two instruction for call

CALL (long call) RCALL (relative call)

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CALL

This is 4-Byte(32-bit) instruction 12 bit Opcode 20 bit target subroutines address.

To make sure the PIC knows where to come back after execution of the called subroutines, the microcontroller automatically saves on the stack the address of the instruction immediately below the CALL.

After finishing execution of the subroutine, the instruction RETURN transfers control back to caller.

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Stack and stack pointer in the PIC18

The Stack is read/write memory (RAM) used by the CPU to store some very critical information temporarily.

The information can be address or data. The stack is 21-bit. The Stack Pointer (SP) is register used to access

the stack SP is 5-bit, this give use 32 location each 21bit wide

When the PIC18 is powered up , the SP register contains value 0.

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Stack Pointer (SP)

The stack location 1 is the first location used to stack , because SP point to last-used location.

The location 0 of the stack is not available and we have only 31 stack location in the PIC18

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Stack Pointer (SP)

The storing of CPU information such as PC on the stack is called PUSH, and loading back the contents into CPU register is called POP.

Push in the stack As data is pushed onto the stack, the stack pointer is

incremented. For every program counter saved on the tack, SP is

incremented only once.

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Stack Pointer (SP)

Popping from the stack Popping the contents of the stack back into a given

register such as program counter is the opposite of pushing.

When the RETURN instruction at the end of the subroutine is executed, the top location of the stack is copied back to the program counter.

The stack pointer is decremented. The Stack is (LIFO) memory.

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Calling many subroutines form the main

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RCALL (Relative Call)

2-Byte instruction The target address must be within 2K

11 bits of the 2 Byte is used

Save a number of bytes.

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PIC18 Time Delay and instruction pipeline

Two factors can affect the accuracy of the delay

1. The duration of the clock period, which is function of the Crystal freq Connected to OSC! And OSC2

2. The instruction cycle duration Most of the PIC18 instructions consumes 1 cycle

Use Harvard Architecture Use RISC Architecture Use the pipeline concept between fetch and execute.

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Pipelining

The idea of pipelining in its simplest from to allow the CPU to Fetch and execute at the same time.

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PIC multistage execution pipeline

Superpipiling is used to speed up execution of instruction.

The Process of exe. Instruction is split into many small steps that are executed in parallel. So the exe. Of many instruction is overlapped.

Limited to the slowest step

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PIC multistage execution pipeline

In PIC18, the execution unit takes 4 clock periods of the oscillator.

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PIC multistage execution pipeline

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Instruction cycle time for the PIC

Instruction cycles : is a certain amount of the time for the CPU to execute an instruction.

Because all instructions in the PIC are either 2-byte of 4-byte, most instruction take one or two instruction cycles to execute.

Instruction Cycle depends on the freq. of oscillator Clock source: Crystal oscillator and on-chip

circuitry One instruction cycle consists of four oscillator

period.

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Example

Find the period of the instruction cycle you chose 4 MHz crystal? And what is required time for fetching an instruction?

Solution 4 MHz/4 =1 MHz Instruction Cycle = 1/1MHz = 1 usec Fetch cycle = 4 * 1 usec = 4 usec

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Branch Penalty

For the concept of pipelining to work, we need a buffer or queue in which an instruction is perfected and ready to be executed.

In some cases, the CPU must flush the queue .. Why ???

When the branch instruction is executed , the CPU starts to fetched codes from the new memory location.

In this case, the execution unit must wait until fetches the new instruction (Branch Penalty)

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Branch Penalty

For this reason there are some instruction take more than one instruction cycle such as GOTO, BRA,CALL and all conditional branch such as BNZ, BC …

The conditional branch can take one instruction cycle if it dose not jump.

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Delay Calculation of PIC18

The delay of subroutines consist of two parts: Setting counter. Loop

Most of time delay is performed by boody of loop.

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Quiz

True of False 1. On power-up the PIC uses location 1 as the first location

of the stack.

2. The RCALL target address can be any ware in the 2M address space.

3. In the PIC18, the instruction cycle lasts 4 clock periods of the crystal frequency.

4. BRA and CALL will always take 2 instruction cycles.

5. The BNZ instruction will always take 2 instruction cycles.

31IUG- Embedded System 31

References

Jie Hu , ECE692 Embedded Computing Systems , Fall 2010.

PIC Microcontroller And Embedded Systems: using Assembly and C for PIC 18, M. Mazidi, R. McKinlay and D. Causey, Prentice Fall, 2008.

Eng. Husam Alzaq, Embedded System Course, IUG, 2010