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-FTL: A Memory-EfficientFlash Translation Layer
Supporting MultipleMapping Granularities
Yong-Goo Lee
Computer Architecture Laboratory
Korea Advanced Institute of Science and Technology (KAIST)
South Korea
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Advantages of NAND Flash Memory
Non-volatility
Short read/write latency
Low power consumption
Small size and light weight
Solid state reliability
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NAND Flash Memory Characteristics
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page A A
A unit of NAND flash memory operation
Page: a read/write unit (4KB)
Block: an erase unit (512KB)
Erase-before-write
A page once written cannot be overwritten until it is
erased
NAND flash memoryblock
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Flash Translation Layer
Legacy disk-based host systems cannot be
directly used with NAND flash memory
FTL translates a logical address used by
the host into a physical address in NANDflash memory
Two major factors affecting the
performance of FTL
Address mapping mechanism
Garbage collection policy
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FTL
NAND Flash memory
Host system(file system, device
driver)
Logicaladdress
Physicaladdress
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Motivation
6RAM usage
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Main Ideas of -FTL
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Workload Characteristics
Multiple mapping granularities
Reducing both the RAM usage and the overhead Using -Tree as a main data-structure
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Characteristic(write requests)
Example Appropriate mappinggranularity
Small &Random
File system meta dataTemporary Internet files
Fine-grained
Large & SequentialMultimedia filesInstalled applications Coarse-grained
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-Tree [D. Kang, EMSOFT2007] Handling any insertion/deletion/update operation of the tree
with only one flash write operation
By storing multiple nodes from the leaf to the root in a single page
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LRU
head
-Tree cache
cachemiss cache full
(dirty pagesonly)
A
B C
D E F
A
C
F
A
B C
D E F
A
B C
D E F F
A
B C C
D E F F
A A
B C C
D E F F
-Tree block
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Address Mapping
-FTL implements multiple mapping granularities Extent: A variable-sized mapping entry (a pair of key and record)
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Logical
blocks
Physical
blocks 5
0 4 5 6
100,4
105,1
104,1
106,2
Key
Record
-FTL mapping
example
The implementation of
mapping example
100101102103
104105106107
0123
4567
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Main Ideas of -FTL
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Garbage Collection
Victim selection policy
Having the largest # of invalid pages
Garbage collection information
Per-block invalid page counter
Maintaining the number of invalid pages in each
physical block
Bitmap information
Distinguishing valid pages from invalid pages
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5 25
Bitmap Information
Bitmap information is too large to be stored in RAM
We store the bitmap information in -tree
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0 4 5 6
100,4
105,1
104,1
106,2
Physicalblocks100101102103
104105106107
25 26
(0001)2
(1111)2
Key (bitmap)
Record
1 125 26
Key(mapping)
1
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Bitmap Cache
The -Tree cache is polluted by bitmap entries The cache hit ratio of extents severely impaired
Bitmap cache
A hash table structure
for buffering bitmap updates
Invalid extent Physically adjacent
invalid pages
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(Physical Page Number,Length)
Pointer
InvalidExtent
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Main Ideas of -FTL
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Logical Address Space Partitioning
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A global update
block
Many update blocks
for each partition
Logical addressspace
Logical addressspace
Separating hot data from cold data has a beneficial effect onthe performance of an FTL
Each part of the logical address space exhibits different
degree of hotness
Update block being charged for receiving data from incoming write requests
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Main Ideas of -FTL
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-FTL Design Summary
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Write
Bitmap
Cache-Tree
Cache
Partition 1
Partition 2
Partition 3
Partition 4-Tree
Free block list
Data
Extentupdate
Bitmapupdate
Bitmap updateflush
Cache
full
Cachemiss
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Evaluation Methodology
Trace-driven simulators for several FTLs Block-mapped: the log block, FAST, the super block
Page-mapped: DAC
6 traces 3 multimedia traces: PIC(8GB), MP3(8GB), MOV(8GB)
3 PC traces: WEB(32GB), GENERAL(32GB), SYSMARK(40GB)
The standard configurations
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Partition Size Bitmap cache size The portion ofextra blocks
256MB(512 logical blocks)
4KB for multimedia traces32KB for PC traces
3%
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The RAM Usage
Block-mapped FTL -FTL (A+B+C) Page-mappedFTL
8GB 64KB 16KB+44KB+4KB= 64KB
8MB
32GB 256KB 64KB+160KB+32KB= 256KB
32MB
40GB 320KB 80KB+208KB+32KB= 320KB
40MB
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(A) Per-block invalid page counter
(B) The -Tree cache size
(C) The bitmap cache size
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The Comparison of FTL Performance
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GENERAL (32GB) SYSMARK (40GB)
56.8%89.7%
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The Effect of Bitmap Cache Size
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WEB (32GB) PIC (8GB)
52.5% 33.3%
-Tree cacheoverhead
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The Effect of Partitioning
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WEB (32GB) GENERAL (32GB)
23.6% 39.6%
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Conclusion
-FTL Small and fixed RAM usage
As small as block-mapped FTLs
Low management overhead As low as DAC (a page-mapped FTL)
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Thank you for listening
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