Energy efficient bit-flipping LDPC decoders

Energy efficient bit-flipping LDPC decoders

Chris Winstead

Emmanuel Boutillon, Gopal Sundar, Tasnuva Tithi

LE/FT LabDepartment of Electrical and Computer Engineering

Utah State University

June 8, 2016

http://left.usu.edu

Outline

1 Background: message-passing vs bit-flipping LDPC decoders2 Recent advances:

Noisy and Probabilistic bit-flipping1

Differential Decoding2

Rewinding3

3 Architecture comparisons

4 Hardware results for 10GBase-T ethernet

5 Conclusions

1Sundararajan, Winstead, and Boutillon 2014; Rasheed et al. 2014.2Cushon et al. 2014.3Tithi, Winstead, and Sundararajan 2015.

Preview

Bit-flipping decoders used to be “toy” algorithms.

In the past few years, they became competitive with standard algorithms.

Noise enhancement and message memory have seemingly magical properties,but are hard to analyze

Results for a commercial 10 Gigabit ethernet standard:

Best energy efficiency reported (up to 34× lower than benchmark)

Lowest gate area reported (up to 6.6× lower than benchmark)

Little or no loss in performance compared to benchmark

Good throughput and average latency

Some tradeoff in worst-case latency

Preview










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Background on LDPC Algorithms

Short Introduction to Coding Theory

1963

2016

Classicalera

Iterativeera

Gallager1963

BP

1996

Gallager’s LDPC Codes

Gallager introduced the main ideas:

Decoding with probability calculations.Bit-flipping algorithms for binary symmetricchannels.

After 1996, a general theory of iterative messagepassing emerged based on belief propataion.

After 2001, bit-flipping algorithms were extended toAWGN and other channels, but got comparativelylittle attention.


1963

2016

Classicalera

Iterativeera

Gallager1963

BP

1996







1963

2016

Classicalera

Iterativeera

Gallager1963

BP

1996

WBF

2001







2000

2016

Stochasticdecoding

2003

StochLDPC

2006FaultyLDPC

NoisyLDPC

2009

DD-BMP

Stoch

10GB-T

2010

Single-Bit Message Passing (SBM)

Reduced-complexity decoding was introducedwith stochastic decoding, and later differentialdecoding with binary message passing(DD-BMP).

Message-passing is close to BP, but onlyexchange one bit per message instead ofcomputing probabilities.

SBM is distinct from bit-flipping.


2000

2016

WBF2001

MWBFBMWBF

2002

IMWBFPBFA

2005

GDBF

2010

RRWGDBFIGDBF

2012AT-GDBF

2013NGDBFPGDBFIDB...

2014

Bit-Flipping Algorithms

Bit-flipping algorithms diversified into manyheuristic approaches with partial theoreticalbasis.

Acronyms grew longer.

After 2012, big improvements appeared with“Noisy”, “Probabilistic” and “Differential”methods (NGDBF, PGDBF, IDB, resp.).


2000

2016

WBF2001

MWBFBMWBF

2002

IMWBFPBFA

2005

GDBF

2010

RRWGDBFIGDBF

2012AT-GDBF


2014






2000

2016

WBF2001

MWBFBMWBF

2002

IMWBFPBFA

2005

GDBF

2010

RRWGDBFIGDBF

2012AT-GDBF


2014






2000

2016

WBF2001

MWBFBMWBF

2002

IMWBFPBFA

2005

GDBF

2010

RRWGDBFIGDBF

2012AT-GDBF


2014


Are these just new exhibits in the “zoo” ofdecoding algorithms?

Answer: No! The latest algorithms are highlycompetitive with message-passing and canbeat BP in some cases.

But... the research is still mostly empiricaland heuristic.


2000

2016

WBF2001

MWBFBMWBF

2002

IMWBFPBFA

2005

GDBF

2010

RRWGDBFIGDBF

2012AT-GDBF


2014






2000

2016

WBF2001

MWBFBMWBF

2002

IMWBFPBFA

2005

GDBF

2010

RRWGDBFIGDBF

2012AT-GDBF


2014






2000

2016

Standards

DVB-S2

802.16e

802.3an

2006

802.11n2009

WRAN

2011 DOCSIS

3.1

DVB-S2X

. . .2014

Standards

To assess applicability, it helps to look at performance oncommercial standard codes.

LDPC codes are now adopted in numerous standards:

Digital Video Broadcast (DVB-S2)

WiMAX (802.16e)

Wifi (802.11n and 802.11ac)

10GBase-T ethernet (802.3an)

Home network (G.hn)

Mobile connectivity (3GPP2-UMB)


2000

2016

Standards

DVB-S2

802.16e

802.3an

2006

802.11n2009

WRAN

2011 DOCSIS

3.1

DVB-S2X

. . .2014

StandardsToday we’ll look at 10GBase-T. Red curves: bit-flipping.Green curves: benchmark OMS.

2 3 4 5 6 7 8

10−7

10−5

10−3

10−1

uncoded

Eb/N0 (dB)

BE

R

OMS 1

OMS 2

IDB

NGDBF

R-NGDBF

Classifications: Message Passing

n symbols

m paritychecks LDPC codes are usually modeled by a Tanner graph.

Symbol node (code bits)

Check nodes (parity constraints): adjacent bits musthave even parity

If there are a few errors, then at least one parity constraintis violated.

Objective: make minimum corrections to satisfy all paritychecks.

Classifications: Message Passing

n symbols

m paritychecks

Message passing decoders compute extrinsic messages foreach edge in the graph.

A extrinsic message on edge E is a function of receivedmessages on adjacent edges excluding E .

Memoryless messages depend solely on the most recentreceived message values.

Memoryless extrinsic message-passing is most amenable toanalysis.

Classifications: Memory

n symbols

m paritychecks

Memoryless messages depend solely on the most recentreceived message values.

Messages with memory depend also on some state variablein the local node, and that state variable is a function ofpreviously received messages.

Memoryless extrinsic message-passing is most amenable toanalysis.

Memory is very hard to analyze.

Classifications: Bit-Flipping

n symbols

m paritychecks

Bit-flipping algorithms are not extrinsic and have memory.

The node’s state S is a function of all received messages.

The same message is transmitted on all edges.

S S

Classifications

Memoryless Memory

Extrinsic

Bit-Flip

BP

Min-Sum

Offset MS

Stochastic

Offset MS

Stochastic

DD-BMP

WBF

IDBIDB

(N/P)GDBF

GDBF

GDBF Algorithm (parallel flipping)

Parameter: global threshold θ.

Inputs (AWGN channel)

channel sample yi .

hypothesis (memory state) xi ∈ {−1, +1}.

parity checks sj ∈ {−1, +1}

Operations

Flip function ∆i = xi yi +∑

j∈Misj

Threshold update: flip xi if ∆i < θ

Then transmit xi to adjacent parity nodes.

in

xy

s1

s2

s3

out

xy

x

x

x

Noisy GDBF

Modifies the flip function:

∆i = xi yi + w∑j∈Mi

sj + qi

Key changes:

w weight parameter to optimize parity contribution

qi Gaussian noise perturbation, variance proportional to channel noise

Other heuristics have been studied, but are not used for 10GBase-T.

IDB

“Improved Differential Binary” is based on DD-BMP.

Inputs (AWGN channel)

Channel sample (yi ) and hypothesis (xi ) are same as GDBF.

parity checks si, j ∈ {−1, +1}

Parity messages are extrinsic in IDB.

Operations

State Memory M(t+1)i = M

(t)i + w

∑j∈Mi\j si, j − d x

(t)i

Sign update: x(t+1)i = sgnr

(M

(t)i

)

IDB Dynamics

IDB uses a degeneration parameter d to push the memory toward zero.

M(t+1)i = M

(t)i + w

∑j∈Mi\j

si, j − d x(t)i

This causes oscillation when∑

si, j is close to zero.

The oscillation is desirable; believed to help escape from trapping sets.

Noisy GDBF perturbations have the same interpretation: noise disrupts thestability of trapping sets.

Rewinding

Repeated decoding of failed frames was used in stochastic decoders and otheralgorithms.

The decoding trajectory is non-deterministic, so by starting over you could get abetter answer.

Works especially well with NGDBF.

IDB Relaunching

IDB uses a deterministic rewinding scheme.

If a frame fails, it is restarted with modified channel samples:

M(0)i = sgnr (yi ) ·max

(1− sgnr (yi )

2, |yi | − F (p, i)

)where p is the number of repetition attempts,

F (p, i) is an empirically determined adjustment function

F (p, i) =

{1, p < 2

(p + i − 1) mod 5 + 1, otherwise

The adjustment introduces a periodic perturbation, intended to disrupt strongertrapping sets.

Architectures

Datapath comparison

Standard message-passing algorithm (belief propagation):

message registers

(1 per edge)

Symbol Node

Check Node

4bits

perm

essa

ge → parity messages

(1 per edge)

← 4 bit per message

Datapath comparison

Stochastic algorithm (successive relaxation):

message registers

(1 per edge)

Symbol Node

Check Node

1bit

perm

essa

ge →parity messages

(1 per edge)


Edge

Mem

ory

Datapath comparison

Bit-flipping algorithm:

message registers

(1 per node)

Symbol Node

Check Node

1bit

perm

essa

ge → parity messages

(1 per node)


Symbol Node Designs

NGDBF IDB

yi

qi − θ

Σ

Σ1

TFF

s1s2

sdv..

.

xi

Σ

Σ1

M Reg

...

xi

s1

s2

sdv

Very similar structures; IDB has a larger register and more XOR gates.

Top Architecture

IDB and NGDBF are nearly the same, except NGDBF needs noise generation.

The final design eliminates the RNG.

Noise samples are hard-coded, circulated ina shift-register.

Frame completion times contribute arandomized phase in the shift buffer.

S1y1

S2y2

S3y3

SNyN

SRq1

x1

P1/

dv

SRq2

x2

P2/

dv

SRq3

x3

P3/

dv

SRqN

xN

PN/

dv...

...

...

RNGq0

Interleaver

Network

P1

P2

P3

PM

...

/

dc X1

s1

/

dc X2

s2

/

dc X3

s3

/

dc XM

sM

...

stop

Hardware Comparisons

Application to the 802.3an 10GBaseT standard

This standard uses a rate 0.8143 (2048, 1723) code with regular (6, 32) degreedistribution.

We implemented a demonstrationNGDBF decoder in an ST Micro65 nm technology.

Close comparisons are available inthe literature for 65 nm decoders,which include

Offset Min-Sum (OMS)a

OMS Split-Row architectureb

IDBc

aZhang et al. 2010.bMohsenin et al. 2010.cCushon et al. 2014.

Chip layout from Encounter

Performance Comparison on 802.3

3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5

10−7

10−5

10−3

10−1

Eb/N0 (dB)

BE

R

IEEE 802.3 standard LDPC code

OMS (T = 20)

Zhang (T = 8)

IDB (T = 45, Φ = 7)

OMS (T = 20) represents the limit of performance.The Zhang design uses T = 8 iterations to meet the throughput spec.IDB comes relatively close to the OMS performance.


3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5

10−7

10−5

10−3

10−1

Eb/N0 (dB)

BE

R


OMS (T = 20)

Zhang (T = 8)

IDB (T = 45, Φ = 7)

NGDBF (T = 600)

NGDBF comes quite close to the Zhang benchmark.


3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5

10−7

10−5

10−3

10−1

Eb/N0 (dB)

BE

R


OMS (T = 20)

Zhang (T = 8)

IDB (T = 45, Φ = 7)

NGDBF (T = 600)

NGDBF (Φ = 8)

Repeated NGDBF with up to 8 attempts equals the limiting OMS performance.

ASIC Comparison for the 802.3 code

All designs are in 65 nm CMOS. These are post-P&R results:

Design: NGDBF IDB 4 Split-Row MS5 OMS 6

Quantization (bits) 7 6 5 4Area (mm2) 0.81 1.44 4.84 5.35

Clock (MHz) 188.67 520 195 700Eb/N0 at BER = 10−7 4.45 4.5 4.55 4.25

At SNR = 4.55 dB:Power (mW) 61.6 462 1359 -

Throughput (Gbps) 14.6 126.3 92.8 -EpB (pJ/bit) 4.21 3.65 14.6 -

At SNR = 5.5 dB:Power (mW) 63 478 - 2800

Throughput (Gbps) 36.4 171.8 - 47.7EpB (pJ/bit) 1.73 2.78 - 58.7

Bit-flipping disadvantage:Worst-case Throughput (Gbps) 0.645 3.38 36.3 14.9

4Cushon et al. 20145Mohsenin et al. 20106Zhang et al. 2010

Average Latency

NGDBF uses a maximum of 600 clock cycles per decoding phase, with up to 8 phases.This is a large worst case latency, however the average latency is less than the Zhangbenchmark at high SNR.

3 3.5 4 4.5 5 5.5

101

102

103

104

SNR

Ave

rag

ela

ten

cy

NGDBF

NGDBF (Φ = 6)

Zhang, T = 8

Throughput vs SNR

4 4.1 4.2 4.3 4.4 4.5 4.60

20

40

60

80

Eb/N0 (dB)

Iter

atio

ns

0

5

10

15

20

25

Th

rou

gh

pu

t(G

BP

S)

Iterations

Throughput(GBPS)

Energy Efficiency vs SNR

4 4.1 4.2 4.3 4.4 4.5 4.6

56

58

60

62

64

Eb/N0 (dB)

Ave

rag

eP

ower

(mW

)

0

5

10

15

20

25

En

erg

yp

erb

it(p

J/b

it)

Average Power

Energy per bit

Energy Efficiency vs Area Efficiency

0 2 4 6 8 10 12 1410−2

10−1

100

101

NGDBF (4.55 dB)

IDB (4.55 dB)Split-Row

NGDBF (5.5 dB)IDB (5.5 dB)

OMS (5.5 dB)

Area Efficiency (GBPS/mm2)

En

erg

yE

ffici

ency

(bit

/p

J)

Re-decoding statistics

Re-decoding is needed for rare frames, but significantly improves performance.

2 4 6 8 10

10−5

10−3

10−1

Phase

Fra

ctio

no

ffr

ames

SNR 3.25 SNR 3.0 SNR 2.5

Conclusions

IDB and NGDBF both rely on dynamic perturbations to disrupt local attractors (i.e.trapping sets).

These could be called “fiddle factors”, but the benefits are hard to ignore.

For now, heuristic progress is more rapid than theoretical insight, but we’re working toclose that gap.

Acknowledgements

This research was supported by the US National Science Foundation under awardECCS-0954747, and by the Franco-American Fulbright Commission for theinternational exchange of scholars.

Thank you for listening!

Questions?

References I

Sundararajan, Gopalakrishnan, Chris Winstead, and Emmanuel Boutillon(2014). “Noisy Gradient Descent Bit-Flip Decoding for LDPC Codes”. In:IEEE Transactions on Communications.

Rasheed, O.-A. et al. (2014). “Fault-Tolerant Probabilistic Gradient-Descent BitFlipping Decoders”. In: IEEE Commun. Letters 18.9, pp. 1487 –1490.

Cushon, K. et al. (2014). “High-Throughput Energy-Efficient LDPC DecodersUsing Differential Binary Message Passing”. In: Signal Processing, IEEETransactions on 62.3, pp. 619–631. issn: 1053-587X. doi:10.1109/TSP.2013.2293116.

Tithi, Tasnuva, Chris Winstead, and Gopalakrishnan Sundararajan (2015).Decoding LDPC codes via Noisy Gradient Descent Bit-Flipping withRe-Decoding. arXiv:1503.08913. url: http://arxiv.org/abs/1503.08913.

Zhang, Zhengya et al. (2010). “An Efficient 10GBASE-T Ethernet LDPCDecoder Design With Low Error Floors”. In: IEEE J. Solid-State Circ. 45,pp. 843–855. issn: 0018-9200. doi: 10.1109/JSSC.2010.2042255.

http://dx.doi.org/10.1109/TSP.2013.2293116

http://arxiv.org/abs/1503.08913

http://dx.doi.org/10.1109/JSSC.2010.2042255

References II

Mohsenin, T. et al. (2010). “A Low-Complexity Message-Passing Algorithm forReduced Routing Congestion in LDPC Decoders”. In: IEEE Trans. Circ. Syst.I, Reg. Papers 57, pp. 1048–1061. issn: 1549-8328. doi:10.1109/TCSI.2010.2046957.

http://dx.doi.org/10.1109/TCSI.2010.2046957

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Energy efficient bit-flipping LDPC decoders

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