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ENGG 32A Homework Assignments th(from the 5 edition of the ...

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ENGG 32A Homework Assignments (from the 5 th edition of the textbook) HW1 -- Ch1: 7, 10, 11, 15, 16, and 25. Ch3: 52, 54, and 55. HW2 -- Ch2: 1, 2, 6, 7, 8, and 9. Ch3: 16 and 17. Use CircuitVerse, a digital simulator, to create the test circuits and truth tables of 3- input OR, AND, NAND, NOR, XOR, and XNOR gates. (Note: Need to submit all 8 input patterns for each gate in your report. This means that there will be a total of 48 simulation circuits for these 8 gates. Your report will also include one truth table summarizing the outputs of the 8 circuits of every gate.) Afterward, create the test circuits and truth tables in order to prove the DeMorgan’s theorem of $ $ $ $ $ $ = $ + $ + ̅ and +++ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ = ̅ $ ̅ - in p. 7 of Lecture Note #2. (Note: All I need are just one simulation circuit for left side and one simulation circuit for the right side of each one of the two expressions. Then, your report shows that the truth tables of the left-side circuit and right-side circuit of the expression are identical in order to prove the theorem.) HW3 -- Ch2: 10, 15, 17, 18, 20, 22, and 26. Use CircuitVerse to create the test circuits and truth tables in order to prove the Consensus Theorem of + $ + = + $ and ( + )( $ + )( + ) = ( + )( $ + ) in p. 9 of Lecture Note #2. (Note: All I need are just one simulation circuit for left side and one simulation circuit for the right side of each one of the two expressions. Then, your report shows that the truth tables of the left-side circuit and the right-side circuit of the expression are identical in order to prove the theorem.) Afterward, create the test circuits and truth tables to prove that the 4-NAND-gate circuit in p. 14 of Lecture Note #2 is identical to a 2-input XOR gate. (Note: Need to submit 4 simulation circuits with the four input patterns to the 4-NAND-gate circuit. Then, your report shows that the truth table is identical to that of the XOR gate.) Simulate the 8-bit even-parity generator and checker in p. 16 of Lecture Note #2. (Note: Give four examples of the input patterns to the simulation circuits to show that the generator and checker are working as expected. No truth table is needed.)
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Page 1: ENGG 32A Homework Assignments th(from the 5 edition of the ...

ENGG32AHomeworkAssignments(fromthe5theditionofthetextbook)

HW1--Ch1:7,10,11,15,16,and25.

Ch3:52,54,and55.

HW2--Ch2:1,2,6,7,8,and9.

Ch3:16and17.

UseCircuitVerse,adigitalsimulator,tocreatethetestcircuitsandtruthtablesof3-inputOR,AND,NAND,NOR,XOR,andXNORgates.(Note:Needtosubmitall8inputpatternsforeachgateinyourreport.Thismeansthattherewillbeatotalof48simulationcircuitsforthese8gates.Yourreportwillalsoincludeonetruthtablesummarizingtheoutputsofthe8circuitsofeverygate.)

Afterward,createthetestcircuitsandtruthtablesinordertoprovetheDeMorgan’stheoremof𝑋𝑌𝑍$$$$$$ = 𝑋$ + 𝑌$ + �̅�and𝐴 + 𝐵 + 𝐶 + 𝐷$$$$$$$$$$$$$$$$$$$ = �̅� ∙ 𝐵$ ∙ �̅� ∙ 𝐷-inp.7ofLectureNote#2.(Note:AllIneedarejustonesimulationcircuitforleftsideandonesimulationcircuitfortherightsideofeachoneofthetwoexpressions.Then,yourreportshowsthatthetruthtablesoftheleft-sidecircuitandright-sidecircuitoftheexpressionareidenticalinordertoprovethetheorem.)

HW3--Ch2:10,15,17,18,20,22,and26.

UseCircuitVersetocreatethetestcircuitsandtruthtablesinordertoprovetheConsensusTheoremof𝑋𝑌 + 𝑋$𝑍 + 𝑌𝑍 = 𝑋𝑌 + 𝑋$𝑍and(𝑋 + 𝑌)(𝑋$ + 𝑍)(𝑌 + 𝑍) =(𝑋 + 𝑌)(𝑋$ + 𝑍)inp.9ofLectureNote#2.(Note:AllIneedarejustonesimulationcircuitforleftsideandonesimulationcircuitfortherightsideofeachoneofthetwoexpressions.Then,yourreportshowsthatthetruthtablesoftheleft-sidecircuitandtheright-sidecircuitoftheexpressionareidenticalinordertoprovethetheorem.)

Afterward, create the test circuits and truth tables to prove that the 4-NAND-gate circuit in p. 14 of Lecture Note #2 is identical to a 2-input XOR gate. (Note: Need to submit 4 simulation circuits with the four input patterns to the 4-NAND-gate circuit. Then, your report shows that the truth table is identical to that of the XOR gate.)

Simulatethe8-biteven-paritygeneratorandcheckerinp.16ofLectureNote#2.(Note:Givefourexamplesoftheinputpatternstothesimulationcircuitstoshowthatthegeneratorandcheckerareworkingasexpected.Notruthtableisneeded.)

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HW4--Ch3:1,2,8,10,29,44,46,47,and48.

UseCircuitVersetocreatetheBCDdecoderand7-segmentdisplaycircuitusingtheequationinp.10ofLectureNote3.[First,select“NewCircuit+”undertheCircuitmenu.Then,buildtheBCDdecoderwith4“inputindicators”asinputsand8“outputindicators”asoutputs.Afterward,addtheBCDcircuitasasub-circuitbyselecting“Main,”“InsertSubCircuit”undertheCircuitmenu,andfinallyselectthe“BCDdecoder”circuit.Add4“inputindicators”astheinputsanda7-segmentdisplayastheoutputsofthesubcircuit.Showfoursimulationcircuitswith4differentBCDinputpatternsinyourreport.]

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UseCircuitVersetocreatethe4-bitAdder-Subtractorinp.27ofLectureNote3.(UsetheSubCircuitfeaturetobuildoneFullAdderfirst.Then,connectfourFullAdderinachaintocreatea4-bitAddersubcircuit.Finally,createthe4-bitAdder-Subtractorbyusingthis4-bitAddersubcircuit.Showthesimulationcircuitswithoneexampleofadditionandoneexampleofsubtractioninyourreport.)

HW5–Ch4:4,6,7,9,10,11,26,and33.

UseCircuitVersetocreatethepositive-edge-triggeredDflip-flopinp.7ofLectureNote4asasubcircuit.Connectthe“inputindicators”totheDandclockinputsandthe“outputindicator”totheQoutput.TestthecircuittomakesurethatthecontentofD-inputisstoredandshowsupattheQ-outputwheneverthereisarisingedgeintheclockinput.

Afterward,usethesubcircuitsofyour“positive-edge-triggeredDflip-flop”and“BCD-to-7-segmentconverter”(fromHW4)tocreatetheSequenceGeneratorinpp.25-27ofLectureNote4.Selectthe“Clock”inthe“SequentialElements”menuofCircuitVerseandconnectittotheclockinputsofthethreeDflip-flops.SettheClockTimeofthecircuitto1,000ms.Youshouldseethedigits0,1,4,2,and6cyclingthroughthe7-segmentdisplay,onedigitpersecond.

(Important:TheABCDinputsofyour“BCD-to-7-segmentconverter”isoppositetotheABCDinputsofthe“BCDdecoder”inp.27.Youwillneedtoreversetheconnectionsinthegeneratorcircuit.)

Includethescreenshotsofthesimulationcircuitsofthe“positive-edge-triggeredDflip-flop”andtheSequencewiththedigits4and2onthe7-segmentdisplayGeneratorinyourreport.

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HW6–Ch6:5,11,12,15,16,andrepeat#16withTandalsoJKflip-flops.

Followthestepsinpp.20&21ofLectureNote5toimplementa2-digitaldecadecounterusingDflip-flops(notTflip-flops).YouwillneedtocreatefournewcolumnsinthestatetablefortheinputequationsoftheDflip-flops(toreplacethoseoftheTflip-flops).Afterward,applyK-maps(usingdon’tcaresintheunusedstates)toobtainthesimplestexpressionsofthefourinputequations.

UseCircuitVersetoimplementthefourinputequationsoftheDflip-flopsandtheexternaloutputequationYwithlogicgatesandfourDflip-flops,similartowhatyouhavedoneinHW5.

Totestyourcircuit,settheClockto1Hz(i.e.,1cyclepersecond=periodof1second).Then,the2-digitaldecadecountercancount100secondsfrom0to99repeatedly.Ifyousettheclockto100Hz(i.e.,100cyclepersecond=periodof10ms),itcancountevery1/100ofasecondandupto1second,potentiallyusefulasastopwatch.

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Inyourreport,includethecompletedstatetable(withdon’tcaresintheunusedstates),fourinputequations,thesimulationcircuit,andthescreenshot(use“shift”“printscreen”tocapture)withthenumber89displayed.

HW7–Ch5:4,7,8,10,11,and13.

Ch7:1,8,and9.

Asadesignproject,asimple4-bitcentralprocessingunit(CPU)willbebuiltandsimulatedafterHW8.Beforethat,youneedtobuildthenecessarycomponentsas“subcircuits”inthisandnextassignment.Theyarethe2x4decoder(p.11ofLectureNote3),2x1MUX(p.20;don’tneedtheEnableinput),4x1MUX(p.19),4-bitparallelloadregister(p.3ofLectureNote5;usingfourofyourDflip-flopsubcircuit),and4-bitparalleladder(usingtheoneyoubuiltinHW4).

Buildthemassubcircuitsandtestthemcompletelytomakesurethattheyworkasexpected.Includeallthesesimulationcircuitsinyourreport.Includetwoscreenshotsofeachdeviceinthesubcircuitformwithtwodifferentinputcombinationstoshowthattheyworkproperly.

Foryourreference,belowaretheCircuitVersescreenshotsofthesimulationcircuits.

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2x1Mux

4x1MUX 2x4Decoder

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4-bitParallelLoadRegister

HW8--Ch6:19,20,22,24(usea4x1MUX),and31.

Ch8:4,5,9,10,and11.

Continuetobuildthenecessarycomponentsas“subcircuits”foryour4-bitCPUproject.Theyarethe4-bit2x1MUX,4-bit4x1MUX,1-bitlogiccircuit(p.18ofLectureNote7),and4-bitarithmeticcircuit(p.20ofLectureNote7;usingyour4-bitaddersubcircuit).

The4-bit2x1MUXsubcircuitisbuiltbyconnectingtheselectioninputSoffourofyour2x1MUXsubcircuittogetherasonecommonselectioninputSsothatthefinalsubcircuitissimilartop.21inLectureNote3buthereusingfourofyour2x1MUXsubcircuits.Makesuretolabeltheselectioninput,8datainputs,and4dataoutputsinyoursubcircuitproperly.Similarly,the4-bit4x1MUXisbuiltbyconnectingthetwoselectioninputsS1S0offourofyour4x1MUXsubcircuittogetherastwocommonselectioninputsS1S0.Makesuretolabelthetwoselectioninputs,16datainputs,and16dataoutputsinyoursubcircuitproperly.

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Buildthemassubcircuitsandtestthemcompletelytomakesurethattheyworkasexpected.Includeallthesesimulationcircuitsinyourreport.Includetwoscreenshotsofeachdeviceinthesubcircuitformwithtwodifferentinputcombinations.

Foryourreference,belowaretheCircuitVersescreenshotsofthesimulationcircuits.

1-BitLogicCircuit

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4-Bit4x1MUX 4-Bit2x1MUX

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4-BitArithmeticCircuit

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FinalProject:Asimple4-bitcentralprocessingunitwillbebuiltandsimulated.Thiswillaccountforthe8%ofyourgrade.

Continuetobuildthenecessarycomponentsas“subcircuits”foryour4-bitCPUproject.Theyarethe4-bitlogiccircuit(usingfourofyour“1-stagelogiccircuit”subcircuit)and4-bitALU(pp.17ofLectureNote7;usingyour“4-bitarithmeticcircuit”subcircuit,andone4-bit2x1MUXsubcircuit).Theinternalconfigurationofthis4-bitALUisshowninp.18,whichonlyshowstheconnectionofonestage(i.e.,onebit).Youhavetomakeit4stagesforthe4-bitALU.

Buildthemassubcircuitsandtestthemcompletelytomakesurethattheyworkasexpected.Includethesesimulationcircuitsinyourreport.Includetwoscreenshotsofeachdeviceinthesubcircuitformwithtwodifferentinputcombinations.

Foryourreference,belowaretheCircuitVersescreenshotsofthesimulationcircuits.

4-BitLogicCircuit

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4-bitALU

This4-bitALUcanperformthefollowingmicro-operationsbysettingS2S1S0Cinaccordingly.

18

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Now,connectyoursubcircuitsaccordingtothefollowingdiagramofthe4-bitCPU.Groupalltheinputsandoutputstogetherforeaseofcontrolandtesting.(Notetheclockinputandexternaldatainputs.)

Foryourreference,theCircuitVersescreenshotoftheCPUisshowninnextpage.Payattentiontohowalltheinputsandoutputsaregroupedtogether.

A B D F

n = 4

22

4

2

Input datan

I3 I2 I1 I0

O3 O2 O1 O0

n=4

Input indicators

output indicators

Input indicator

Input indicator A

Input indicator F

Input indicator B

Input indicator D

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This4-bitCPUiscontrtolledbythebitsof“AMUXselect,”“BMUXselect,”“Ddestinationselect,”and“Foperationselect.”Theyaregroupedtogethertoformthecontrolword.

Controlword:

Toexecuteaninstruction(ormicro-operation)ofauserprogram,thecorrespondingcontrolwordwillbestoredintoanInstructionRegister(IR),whoseoutputsareconnectedtotheselectioninputsofthetwoMUXes,decoderofthethreeregisters,andALU(e.g.,seetheupperrightcornerofthesimulationcircuit).

A B D F

n = 4

22

4

2

Input datan

I3 I2 I1 I0

O3 O2 O1 O0

n=4

Input indicators

output indicators

Input indicator

Input indicator A

Input indicator F

Input indicator B

Input indicator D

A1 A0 B1 B0 D1 D0 S2 S1 S0 Cin

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ThefollowingtablessummarizehowthesourceanddestinationregistersandtheALUoperationsareselectedbysettingthebitsatA,B,D,andFsectionsofthecontrolword.

A B D00 R0 R0 R001 R1 R1 R110 R2 R2 R211 input input --

S2S1S0 Cin=0 Cin=1000 F=A F=A+1001 F=A+B F=A+B+1010 F=A+𝐵 F=A-B011 F=A-1 F=A100 F=AandB 101 F=AorB 110 F=AxorB 111 F=𝐴

Toexecuteonemicro-operation(orinstructionofauserprogram),youfirstloadthecontrolwordintotheIR.Inthesimulation,thisisdonebysettingtheinputindicatorsoftheIRaccordingtothebitpatternofthecontrolword.

Forexamples,themicro-operationsandcontrolwordstosetR0=4andR1=3:

first,setexternalinput=0100 firstsetexternalinput=0011Microoperation: R0ßinput R1ßinputField: A B D F A B D FSymbol: input -- R0 A input -- R1 AControlword: 11 11 00 0000 11 11 01 0000Microoperation: R2ßR0orR1 R2ßR0-R1Field: A B D F A B D FSymbol: R0 R1 R2 AorB R0 R1 R2 A-BControlword: ? ? ? ? 00 01 10 0101Microoperation: R1ßR0 R2ßR0+R1Field: A B D F A B D FSymbol: R0 -- R1 A R0 R1 R2 A+BControlword: ? ? ? ? ? ? ? ?--=don’tcarecondition.Forsimplicity,hereletitbe11.

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Wehavecoveredtheworkingprincipleofthe4-bitALU.Nowisthetimetotestyoursimulationcircuit.Youaregoingtoperformthefollowingtests,whichincludeonelogicoperation(i.e.,or),onesubtraction(i.e.,4-3),andonemultiplication(i.e.,4x3):

1. Loadaninteger4(i.e.,0100)fromtheexternalinputintoR0inoneclockcycle.(Warning:Tosimulateoneclockcycle,youneedtoclicktheclockinputindicatorfrom0to1andthenbackto0(onetimeonly)togeneratearisingedgeattheclockinputoftheregisters.Onlydothis0-1-0clockcycleonceforeachmicro-operation.)Youshouldseetheresult,CoutF3F2F1F0=00100,atthefiveoutputindicatorsconnectingtotheALUoutputandthedigit“4”onthe7-segmentdisplay.

2. Loadaninteger3(i.e.,0011)fromtheexternalinputintoR1inanotherclockcycle(i.e.,0-1-0clockcycleonce.)YoushouldseeCoutF3F2F1F0=0011andthedigit“3”.

3. Perform“R0orR1”andstoretheresultintoR2inoneclockcycle.YoushouldseeCoutF3F2F1F0=00111anddigit“7”.)

4. Perform“R0-R1”andstoretheresultintoR2inoneclockcycle.(Youshouldseetheresult,10001,atthefiveoutputindicatorsconnectingtotheALUoutput.Don’tworryabouttheCout=1,whichmeansthesumispositivewhenperformsubtraction.)

5. TransferthecontentofR0toR1.(Note:Steps5-7willperformthe4x3multiplication.)

6. perform“R0+R1”andstoretheresultintoR2inoneclockcycle.(Youshouldseetheresult,01000(=8),atthefiveoutputindicatorsconnectingtotheALUoutput.)

7. perform“R0+R2”againandstoretheresultintoR1inoneclockcycle.(Youshouldseetheresult,01100(=12),atthefiveoutputindicatorsconnectingtotheALUoutput.)

Writeyourprogram(i.e.,controlwords)inthefollowingtable(nextpage)andthenexecutethemonebyone.FirstsettheinputindicatorsI3I2I1I0tothebitpatternoftheexternalinputandthentheinputindicatorsattheIRtothebitpatternofthecontrolword.

Afterward,clicktheclockinputindicatorfrom0to1andthenbackto0togeneratearisingedgeattheclockinputoftheregisters.(Warning:Onlydo0-1-0onceattheclockinputforeachcontrolword.)Then,youhavecompletedtheexecutionofonecontrolword.

Theresultisshownatthe4outputindicatorsconnectingtotheALUoutput.Recordthebitpatternofthe4outputindicatorsinthetable.

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Micro-Operations ExternalInput(I3I2I1I0)

ControlWords ALUOutput(CoutF3F2F1F0)afterone0-1-0clockcycle

R0ßinput(0100) 0100 1111000000 00100R1ßinput(0011) 0011 R2ßR0vR1 -- R2ßR0-R1 -- 10001R1ßR0 -- 00100R2ßR0+R1 -- R1ßR0+R2 --

Includethesimulationcircuitsofthe4-bitlogiccircuitandALUinyourreport.Includetwoscreenshotsofeachdeviceinthesubcircuitformwithtwodifferentinputcombinations.

Includingtheabovetableinthereport.Alsoincludethescreenshotsofthewhole4-bitCPUwiththeALUoutputshowingthe(correct)resultsofthemicro-operationsinthetable.


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