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Experiment Using Capture CMOS & NMOS

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Page 1: Experiment Using Capture CMOS & NMOS

Ex. No.: STUDY OF CMOS AND NMOS CIRCUITS USING PSPICE

Date:

AIM

To simulate the circuits of AND gate using CMOS in PSPICE and comparing the simulated results with the AND truth table for various values of input voltages. To calculate the propagation times for various values of W/L of the MOS transistors.

APPARATUS

PSPICE software

Procedure for simulation of circuits on ORCAD capture tool:

1) Click the capture icon from desktop or from the start menu.2) Click on file, then on new, and then click on project.3) Write the name of the project and choose the location to store it, then

click “OK” and make sure to choose analog or mixed A/D option and then again click “OK”.

4) Next pop-up window opens Pspice project on this choose a blank project option, then click “OK”.

5) Now realize the circuits using proper components.6) Now choose Pspice option on top toolbar and click on new simulation

profile.7) Enter the name of the profile and then click on “OK”.8) In the next window choose options and then choose gate level

simulation. Choose the option and initialize all flip-flops to zero, then click on “OK”.

V place voltage where we need to see the outputs.

9)Lastly click the “Run” button in Pspice or Run option to see the resulting output

Page 2: Experiment Using Capture CMOS & NMOS

Procedure for simulation of circuits on ORCAD capture tool:

The use of resistors and capacitors:-

1) Click on “place part” on the right hand side of the window.2) Then click on analog library and select the required resistor and capacitor.

The use of Transistor:-

1) Click on “place part” on the right hand side of the window.2) Click on the EVAL library and select the required transistor (E.G. Q2N2222).

The use of source:-

1) Click on “place part” on the right hand side of the window.2) Then click on source library.

The use of ground:-

1) Click on ‘GND’ on the right hand side of the window.2) Select CAPSYM library.3) Select GND.4) Click OK.5) Edit properties to set “Name=0”.

To change the value of any component:-

1) Select the component.2) Right click on it.3) Click “edit properties “ .4) Change the values of desired components.

Page 3: Experiment Using Capture CMOS & NMOS

To change the name of any component:-

1) Select NI on the right hand side of the window (not alias).2) Change name.3) Right click on it4) Edit properties and click “OK”.5) Box with the required name will be placed.

To change the direction of any of selected component:-

1) Place it on the required place and right click on it.2) Select rotate and it will rotate by 90 degrees.3) Select it as many times as rotation is required.4) After placing all the components join them through the wire and you will obtain the

required circuit.

For Output:-

1) Click Pspice simulation.2) Select new simulation.3) Select analysis type which can be different for different experiments.

THEORY

A MOS transistor is termed as a majority-carrier device, in which the current in conducting channel between the source and the drain is modulated by the voltage applied to the gate. In an n-type MOS transistor, the majority carriers are electrons. A positive voltage on the gate with respect to the substrate enhances the number of electrons in the channel. Electrically, a MOS devices acts as a voltage-controlled switch that conducts initially when the gate to source voltage ,Vgs, is equal to the threshold voltage

PSPICE overview:

To design an electronic circuit or to analyze, it requires accurate methods forevaluating circuit performance Modern electronic circuits are so complex that computer aided circuit analysis is indispensable. On this introductory homepage, PSPICE is used as the simulation tool to analyses the working of three different circuits.

Page 4: Experiment Using Capture CMOS & NMOS

Pspice from MicroSim Corporation is one of the many commercial derivatives of U.C. Berkeley SPICE (Simulation Program with Integrated Circuit Emphasis). It is widely used for analog circuit simulation.

Simulation, can take on various levels of device and component modeling, depending on the objective of the simulation. Most of the simulation work in this course use idealized or default component models, making the results first-order approximations.

Writing a circuit file for Pspice simulation is quite easy. First of all, a circuit diagram must be drawn and all the nodes numbered.

All the special devices like the diode, SCRS or transistors must be modeled before using them. Sometimes it may be possible to use the default models provided with the software package.

Probe is a separate program that comes with Pspice. It allows the user to look at the waveforms of different current and voltages. After running the Pspice file, the output required for running the probe is written to a dat file if the probe command was included in the original Pspice circuit file.

Probe is also capable of mathematical computations involving currents and/or voltages, including numerical determination of rms and average values, and Fourier analysis.

THEORY:

A MOS transistor evolves from the use of a voltage on the gate to induce a charge in the channel between source drain, which may then be caused to move from source to drain under the influence of an electric field created by voltage Vds applied between drain and source voltage Vgs then Ids is depent on both Vgs and Vds

The ideal equations describing the behavior of an MOS (n-type) device in three regions are shown below. The same equation with

Cutoff Region

IdS = 0

\/gs – Vt < 0

Page 5: Experiment Using Capture CMOS & NMOS

Non-saturation, linear or triode region:

Ids = β[(Vgs < Vt) Vds - V2ds /2] Vgs - Vt > Vds

Saturation region or active region

Ids = β(Vgs < Vt)2 /2 0 ≤ -Vgs - Vt ≤ Vds

Where Ids is drain to source current, Vgs is gate-to-source voltage, Vt is device threshold, β is MOS transistor gain factor, 13 is dependent on both the process parameters and device geometry.

B = µ€ / Tox (W/L)

p - Effective surface mobility of the carriers in the channel

E - The permittivity if the gate insulator.

Tox - Thickness of gate insulator.

W - Width of the channel

L - Length of channel

CIRCUIT DESCRPTION

CMOS INVERTER

A CMOS inverter use both NMOS and PMOS. If input is zero, PMOS is closed and NMOS is open. So output capacitance is charged to Vdd. if input is Vdd, PMOS is open and NMOS conducts so output discharges to zero.

Page 6: Experiment Using Capture CMOS & NMOS

CMOS INVERTER:

PER = 50ms

PW = 20ms M2

V1 = 0 V

V2 = 10V IRF9130

TD = 0s +

TR = 1ms 5.000 V 10V DC V2

TF = 1ms M1

Fig.1 CMOS INVERTER

V1

0 V

IRF840V

V

R3

0

Page 7: Experiment Using Capture CMOS & NMOS

CMOS inverter input output waveform

Ouput waveform – Dc sweep

Input waveform:

Page 8: Experiment Using Capture CMOS & NMOS

Output waveform:

Page 9: Experiment Using Capture CMOS & NMOS

NMOS INVERTER

The NMOS inverter uses NMOS enhancement and depletion mode transistor. The pull up depletion mode transistor is always on. If input is zero, the pull down transistor is open and the output is Vdd. If input is Vdd, the pull down transistor is closed and the output will be zero.

NMOS INVERTER:

PER = 50ms

PW = 20ms M2

V1 = 0 V

V2 = 10V IRF840

TD = 0s +

TR = 1ms 5.000 V 10V DC V2

TF = 1ms M1

0V IRF840

+

V1

-

0

Page 10: Experiment Using Capture CMOS & NMOS

Fig.2 NMOS INVERTER

PROCEDURE

Open capture CIS Go to tile->New-> Project. Create a new project using Analog / Mixed A/D Browse for location and give tile name. Construct the circuit. 4

In place part various components are present. In the PWRMOS Select the NMOS and PMOS. From the source library select the power supply and the ground. Set the various parameters for the input. Connect the components using wire. Create a new simulation profile. In the simulation setting menu select the analysis type as Time Domain Analysis. . Place the voltage probes at the input and output and save. Click run command to view the input and output waveform. In the simulation setting menu select the analysis type as DC sweep provide the name for

voltage source, specify the sweep type as linear and enter start and end value. Place voltage probes at the input and output and save. Run PSPICE to view the input and output waveform

Nmos circuit:

Page 11: Experiment Using Capture CMOS & NMOS

Output waveform:

Input waveform:

Page 12: Experiment Using Capture CMOS & NMOS

Dc sweep:

RESULT:

The AND gate is simulated using PSPICE in NMOS logic and it is verified with various test inputs. The propagation delay is calculated for W/L ratio of 100um / l.5um. The transfer characteristics for various W/L ratios are studied.


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