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Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav...

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Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid Kazovsky Stanford University Shinji Yamashita Fujitsu Laboratories, Japan http://openflowswitch.org
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Page 1: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

Experimental Demonstration of OpenFlow Control of

Packet & Circuit Switches

Vinesh Gudla, Saurav Das, Anujit Shastri,Guru Parulkar, Nick McKeown, Leonid Kazovsky

Stanford University

Shinji YamashitaFujitsu Laboratories, Japan

http://www.openflowswitch.org/wk/index.php/PAC.C

http://openflowswitch.org

Page 2: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

2

Controller

OpenFlow Switch

FlowTableFlowTable

SecureChannelSecureChannel

OpenFlow

Protocol

SSL

hw

sw

OpenFlow Switching

• Add/delete flow entry• Encapsulated packets• Controller discovery

A Flow is any combination of above fields described in the Rule

Page 3: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

ControllerFlow Example

OpenFlowProtocol

Rule Action Statistics

Rule Action Statistics Rule Action Statistics

A Flow is the fundamentalunit of manipulation within a switch

Routing

Page 4: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

Video Clients Video Server

OpenFlow Testbed

192.168.3.12192.168.3.10λ1 1553.3 nm

λ2 1554.1 nm

192.168.3.15

OpenFlowController

OpenFlow Protocol

GE to DWDM SFP convertor

GE

O-E

NF2

GE

E-O

NetFPGA based OpenFlow packet switch NF1

25 km SMF

to OSA

to OSA

AWG

WSS based OpenFlow circuit switch

1X9 Wavelength Selective Switch (WSS)

Page 5: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

An Open Platform for Gigabit-Rate Network Switching and Routing. A complete network hardware platform implemented with FPGA logicwww.netfpga.org

Page 6: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

6

Grating Lens

FiberCollimatorArray

IN

OUT

MEMS Mirror Array

OUT2

IN

OUT1

IN

Switching outputport by tilting MEMS mirror

Output

Input 2

5

63

41

DEMUX MUXSW1

2

3

7

7

2

5

6

3

4

1

7

Control

WSS

Page 7: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

Openflow Circuit Switch

25 km SMF

OpenFlow packet switch OpenFlow packet switch

GE-Optical

GE-Optical

Mux/Demux

Lab Setup

Page 8: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

Video Clients Video Server

OpenFlow Testbed

192.168.3.12192.168.3.10λ1 1553.3 nm

λ2 1554.1 nm

192.168.3.15

OpenFlowController

OpenFlow Protocol

GE to DWDM SFP convertor

GE

O-E

NF2

GE

E-O

NetFPGA based OpenFlow packet switch NF1

25 km SMF

to OSA

to OSA

AWG

WSS based OpenFlow circuit switch

1X9 Wavelength Selective Switch (WSS)

Page 9: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

Measurements

Page 10: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

/* Description of a physical port */struct ofp_phy_port {

uint16_t port_no;uint8_t hw_addr[OFP_ETH_ALEN]; /* 00:00:00:00:00:00 if not an Ethernet port */uint8_t name[OFP_MAX_PORT_NAME_LEN]; /* Null-terminated*/

uint32_t config; /* Bitmap of OFPPC_* flags */uint32_t state; /* Bitmap of OFPPS_* flags */

/* Bitmaps of OFPPF_* that describe features. All bits zeroed if * unsupported or unavailable. */

uint32_t curr; /* Current features. */uint32_t advertised; /* Features being advertised by the port. */uint32_t supported; /* Features supported by the port. */uint32_t peer; /* Features advertised by peer. */

 uint16_t supp_swtype; /* Bitmap of switching type OFPST_* flags */unit16_t peer_swtype; /* Bitmap of peer’s switching type */uint32_t supp_sw_tdm_gran; /* TDM switching granularity OFPTSG_* flags uint32_t peer_sw_tdm_gran; /* Bitmap of peer’s switching granularity */unit64_t bandwidth1; /* Bitmap of the OFPCBL_* or OFPCBT_* flags */uint64_t bandwidth2; /* Same type as supp_bandwidth1 */

};OFP_ASSERT(sizeof ( struct ofp_phy_cport) == 80);

Page 11: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

Wavelength Switch Port

SONET/SDH Switch Port (OC-768 line rate)

ITU grid Frequencies supported

ITU grid Frequencies currently being used

Page 12: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

/*Description of a cross-connection*/struct ofp_connect{

uint16_t wildcards; /* identifies which two ports to use below */uint16_t num_components; /* identifies number of cross-connect to be made uint8_t pad[4]; /*– ie. num array elems*/

 uint16_t in_port[0]; /* OFPP_* ports – real or virtual */uint16_t out_port[0]; /* OFPP_* ports – real or virtual */

 struct ofp_tdm_port in_tport[0]; /* description of TDM channel */ struct ofp_tdm_port out_tport[0];

 struct ofp_wave_port in_wport[0]; /* description of lambda channel */struct ofp_wave_port out_wport[0];

};OFP_ASSERT(sizeof(struct ofp_connect) == 8 );

/* Description of a TDM port */struct ofp_tdm_port {

uint16_t tport;uint16_t tstart; uint32_t tsignal;

};

/*Description of a wavelength port */struct ofp_wave_port {

uint16_t wport;uint8_t pad[6];uint64_t wavelength

};

Page 13: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

TrafficEngineering

Example Application

Page 14: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

TrafficEngineering

Example Application

..via Dynamic Automated Optical Bypass

Page 15: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

Controller

OpenFlowprotocol

AWGWSS(1×9)

AWG Fujitsu WSS basedOF circuit switch

Ethernet

Hosts

NOX

WSS(1×9)

NetFPGA basedOF packet switch

Page 16: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

More Applications• Integrated network recovery

• Service classification and Quality-of-service- Identify aggregated packet flows & classify them- some take all packet paths, all circuit paths, or mix of circuit/packet paths- some allocated different levels of bandwidths, some unallocated

• In - Datacenter – variable bandwidth between clusters

• Unified slicing of network resources – both packet & circuit

• Integrated routing

Page 17: Experimental Demonstration of OpenFlow Control of Packet & Circuit Switches Vinesh Gudla, Saurav Das, Anujit Shastri, Guru Parulkar, Nick McKeown, Leonid.

Summary• OpenFlow is a large clean-slate program with many motivations and goals

• convergence of packet & circuit networks is one such goal

• OpenFlow simplifies and unifies across layers and technologies

• packet and circuit infrastructures• electronics and photonics

• and enables new capabilities in converged networks• with real circuits or virtual circuits

• Next Demos• larger demo of QoS capabilities enabled in converged networks• business models for ISPs and TSPs enabled by unified virtualization


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