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Explosion of poly-silicide links in laser programmable redundancy for VLSI memory repair

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1056 lEEE TRANSACTIONS ON ELECTRON DEVICES. VOL 36. NO 6. JUNE 1989 Explosion of Poly-Silicide Links in Laser Programmable Redundancy for VLSI Memory Repair Abstract-Laser programmable redundancy has been used in very large scale memory devices to increase yield through the replacement of defective elements with spare rows and/or columns. In this work, we first discuss the scaling effect on the laser repair rate due to chip size and density increase in VLSI. The laser target link material sys- tems that were used to implement redundancy in recent generations of DRAM and the laser pulse characteristics are described. Various laser explosion patterns in poly-silicide links have been observed. The causes of their formation and their effects on repair rate are discussed. Sev- eral experiments of laser link explosion under various conditions were perfumed to compare the observed facts with a theoretical model. Good correlations have been obtained. I. INTRODUCTION HE yield of integrated circuits has always been one T of the most important measures of their commercial success in mass production. It has been clearly demon- strated that the implementation of redundancy in very large scale integrated (VLSI) circuits, such as high-den- sity dynamic random-access memory (DRAM), has dra- matically increased the yield through the replacement of defective elements with spare rows or columns. More- over, programmable redundancy is not only a yield im- provement aid for the early stages of memory develop- ment but also serves as an extremely cost-effective wafer fabrication tool for mass production [ 11-13]. There are two approaches in programmable redundancy technology today, electrical fusing and laser explosion. In the 1-Mbit DRAM chip developed by AT&T Bell Lab- oratories and manufactured by AT&T Microelectronics, laser programmable redundancy has been used. There are 32 spare rows of 512 bits and 32 pairs of spare columns of 256 bits. These are arranged with four pairs of spare columns and four spare rows available per 128-kbit block of memory. A typical repairable chip requires laser cut- ting of several tens to many hundreds of links. Therefore, it is very important that the link explosion be consistently Manuscript received February 19, 1988; revised January 14, 1989. The C:Y. Lu and J. D. Chlipala are with AT&T Bell Laboratories, Allen- L. M. Scarfone is with the University of Vermont, Burlington, VT IEEE Log Number 8927651. review of this paper was arranged by Associate Editor P. K. KO. town, PA 18103-1285. 05404. successful for every laser target link. Even a small amount of degradation in the link explosion consistency will greatly reduce the laser repair rate and therefore the yield of the chip. In this work, we will first briefly discuss the effects of scaling on the laser repair rate due to chip size and density increase in VLSI. In Section 111, the laser target link ma- terial systems that were used to implement redundancy in recent generations of DRAM are listed and compared. The laser pulse characteristics are also briefly described. In Section IV, various laser explosion patterns are described and their effects on the repair rate are discussed. Several interesting experiments have been performed and com- pared with theory. Finally, we conclude with some rec- ommendations about laser programmable redundancy is- sues. 11. SCALING EFFECT ON LASER REPAIR RATE Since the number of memory cells has increased stead- ily from 64 kbit to 256 kbit to 1 Mbit, the number of spare elements (row/column) has increased accordingly in order to cover the defective elements as completely as possible. In addition, the number of links needed to be cut for sep- arating the defective elements and encoding the replace- ments also increased. For example, replacement of a de- fective column in an AT&T 64-kbit DRAM required the cutting of 14 links, 18 for a 256-kbit DRAM, and 23 for a 1-Mbit DRAM. If the random defect density for fabri- cation of these circuits is about the same, then the number of defective row/column elements in a 1-Mbit chip should be about 1.7 times that in a 256-kbit DRAM, since the chip area of the 1-Mbit DRAM is 73.2 mm2 versus 45.8 mm2 for the 256-kbit DRAM. If we assume the other fac- tors such as laser beam positioning, focusing, etc. are the same for these codes (although they are not the same in practice and they do affect the repair rate) and the chance of failure for laser explosion per link is the same, then the repair rates can be easily compared by a scaling rule. For instance, supposing the successful rate of explosion per link is 99.5 percent (although in practice this rate is much higher), the following repair rates of a chip with a defect density of one defective column per 64-kbit chip area can 0018-9383/89/0600-1056$01 .OO 0 1989 IEEE
Transcript

1056 lEEE TRANSACTIONS ON ELECTRON DEVICES. VOL 36. NO 6. JUNE 1989

Explosion of Poly-Silicide Links in Laser Programmable Redundancy for VLSI

Memory Repair

Abstract-Laser programmable redundancy has been used in very large scale memory devices to increase yield through the replacement of defective elements with spare rows and/or columns. In this work, we first discuss the scaling effect on the laser repair rate due to chip size and density increase in VLSI. The laser target link material sys- tems that were used to implement redundancy in recent generations of DRAM and the laser pulse characteristics are described. Various laser explosion patterns in poly-silicide links have been observed. The causes of their formation and their effects on repair rate are discussed. Sev- eral experiments of laser link explosion under various conditions were perfumed to compare the observed facts with a theoretical model. Good correlations have been obtained.

I. INTRODUCTION HE yield of integrated circuits has always been one T of the most important measures of their commercial

success in mass production. It has been clearly demon- strated that the implementation of redundancy in very large scale integrated (VLSI) circuits, such as high-den- sity dynamic random-access memory (DRAM), has dra- matically increased the yield through the replacement of defective elements with spare rows or columns. More- over, programmable redundancy is not only a yield im- provement aid for the early stages of memory develop- ment but also serves as an extremely cost-effective wafer fabrication tool for mass production [ 11-13].

There are two approaches in programmable redundancy technology today, electrical fusing and laser explosion. In the 1-Mbit DRAM chip developed by AT&T Bell Lab- oratories and manufactured by AT&T Microelectronics, laser programmable redundancy has been used. There are 32 spare rows of 512 bits and 32 pairs of spare columns of 256 bits. These are arranged with four pairs of spare columns and four spare rows available per 128-kbit block of memory. A typical repairable chip requires laser cut- ting of several tens to many hundreds of links. Therefore, it is very important that the link explosion be consistently

Manuscript received February 19, 1988; revised January 14, 1989. The

C:Y. Lu and J . D. Chlipala are with AT&T Bell Laboratories, Allen-

L. M . Scarfone is with the University of Vermont, Burlington, VT

IEEE Log Number 8927651.

review of this paper was arranged by Associate Editor P. K . KO.

town, PA 18103-1285.

05404.

successful for every laser target link. Even a small amount of degradation in the link explosion consistency will greatly reduce the laser repair rate and therefore the yield of the chip.

In this work, we will first briefly discuss the effects of scaling on the laser repair rate due to chip size and density increase in VLSI. In Section 111, the laser target link ma- terial systems that were used to implement redundancy in recent generations of DRAM are listed and compared. The laser pulse characteristics are also briefly described. In Section IV, various laser explosion patterns are described and their effects on the repair rate are discussed. Several interesting experiments have been performed and com- pared with theory. Finally, we conclude with some rec- ommendations about laser programmable redundancy is- sues.

11. SCALING EFFECT ON LASER REPAIR RATE

Since the number of memory cells has increased stead- ily from 64 kbit to 256 kbit to 1 Mbit, the number of spare elements (row/column) has increased accordingly in order to cover the defective elements as completely as possible. In addition, the number of links needed to be cut for sep- arating the defective elements and encoding the replace- ments also increased. For example, replacement of a de- fective column in an AT&T 64-kbit DRAM required the cutting of 14 links, 18 for a 256-kbit DRAM, and 23 for a 1-Mbit DRAM. If the random defect density for fabri- cation of these circuits is about the same, then the number of defective row/column elements in a 1-Mbit chip should be about 1.7 times that in a 256-kbit DRAM, since the chip area of the 1-Mbit DRAM is 73.2 mm2 versus 45.8 mm2 for the 256-kbit DRAM. If we assume the other fac- tors such as laser beam positioning, focusing, etc. are the same for these codes (although they are not the same in practice and they do affect the repair rate) and the chance of failure for laser explosion per link is the same, then the repair rates can be easily compared by a scaling rule. For instance, supposing the successful rate of explosion per link is 99.5 percent (although in practice this rate is much higher), the following repair rates of a chip with a defect density of one defective column per 64-kbit chip area can

0018-9383/89/0600-1056$01 .OO 0 1989 IEEE

LU cf U / . : EXPLOSION OF POLY-SILICIDE LINKS 1057

be compared as:

64-kbit DRAM: (99.5 percent)14

= 93.2 percent ( 1 8 x 1 6 ) 256-kbit DRAM: (99.5 percent)

= 86.6 percent ( 2 3 x 1 6 ~ 1 7 ) 1-Mbit DRAM: (99.5 percent)

= 73.1 percent

The exact percentages should not be stressed here. The point we would like to emphasize is that the larger the chip size and the number of bits, the larger the number of target links needed to be cut to repair a chip, therefore affecting the repair rate. If the defect density cannot be scaled down accordingly, the amount of redundancy has to be increased. Unless the laser explosion technology can be significantly improved from one level of IC integration to another, eventually the redundancy replacement itself will become another yield bottleneck. This scaling effect becomes more obvious the greater the size and integration level difference between two chips. Notice the chip size dependence of the exponents in (1). Since the sensitivity of repair rate to laser link cutting probability increases with size, we expect lot to lot fluctuations to grow with advancing integration level. For example, if the success- ful rate of a single link explosion decreases from 99.5 to 99.0 percent, then the repair rate of a 1-Mbit chip will drop from 73.3 to 53.3 percent while a 64-kbit DRAM will only experience a drop of 6 .3 percent.

Therefore, in order to keep the chip repair rate as good and stable as that of 64- or 256-kbit DRAM, the success- ful rate of a single target link explosion must be advanced accordingly. Many factors affect the rate of success per link such as the material system composing the target link, the positioning accuracy, the focusing algorithm, the laser beam characteristics, the repair algorithm, etc. Every possible factor may become a major limiter of repair rate and deserves close monitoring on a continuous basis. This work is aimed at an understanding of link explosion and the advancement of this technology.

111. MATERIALS SYSTEMS OF TARGET LINKS AND

LASER PULSE CHARACTERISTICS

The material systems composing the target links of var- ious generations of AT&T’s DRAM’s are shown in Fig. 1. The link consists of a doped polysilicon film (64-kbit DRAM) or poly-silicide (polycide) sandwich ( 256-kbit DRAM and 1-Mbit DRAM) over field oxide. The links are covered by a thin layer of oxide and passivation glass. The material system may affect the link explosion in var- ious ways. For example, the optical and thermal proper- ties of silicide film are quite different from those of poly- silicon film 141. This suggests that the explosion patterns of different target systems may vary as has been investi- gated by a theoretical link explosion model [4].

FOX M K DRAM

/ PSG

256 K DRAM FOX

BPSG

TEOS CVD OXIDE

FOX tm DRM

Fig. 1 . The materials systems composing the target links of various gen- erations of AT&T DRAM’S.

The laser used for link explosion is a 1.064-pm Q- switched Nd-doped YAG laser. The laser pulse energy level can be adjusted from 0.1 to 40 p J , and is usually operated in the range of 0.85 to 1.2 p J. The effective ra- dius ( l / e2) is 3 pm. The laser pulse duration (FWHM) is about 35 ns. The depth of focus may be quantified by noting that the laser power decreases by 20 percent in a plane 1 mil from the plane containing the laser waist (smallest spot size).

IV. VARIOUS LINK EXPLOSION PATTERNS Fig. 2 schematically shows various laser link explosion

patterns, most of which are undesirable. The “peanut” or “S-shape” may trap exploding conductive material on the overhanging wall to form a partial conductive path. The “football” or “half-moon” is usually accompanied by excessive debris that might short to adjacent metal run- ners. “Evil eye” is an indication of substrate melting while “pin-prick’’ is the explosion of melted silicon sub- strate. Both of these are certainly undesirable conditions since they might cause adjacent device degradation or hidden reliability problems. It is commonly accepted that heavily doped polysilicon links are the easiest to laser cut and that metal links, such as AI, are the most difficult. The poly-silicide (polycide) links in the 1-Mbit chips are more difficult than polysilicon and perhaps easier than metal links. However, their sandwich structure makes the explosion complicated as predicted by theoretical simu- lation [4]. Fig. 3 shows a typical good link explosion in the 1-Mbit chip, a clean link cut having been created by the laser.

In Fig. 4, a “football” explosion pattern is shown (Fig. 4(a)) as compared with the good/clean cut (Fig. 4(b)). Usually a lot of “debris” accompanies “football” and “half-moon” patterns. From our experience, if the pas- sivation glass is thick, “football” and “half-moon” are most likely to appear. The nominal passivation glass thickness is spout 7000 A on the runner. It was found that if 1750 A or more BPSG was etched back, the ex-

1058 I E t E TRANSACTIONS ON ELECTRON DtVICES. VOL 36. NO 6. J U N E 1989

DEFINITION OF LASER BURNING PATTERNS GOOD, CLEAN BURN - - _ _ _ _

HALF-MOON FOX

B’ FOOTBALL

I++ 7&J- FOX RESIDUE

S-SHAPE

A FOX A‘

LIP PIN-PRICK (FOX CRATER) Fox

Fig. 2 . Definition of laser burning patterns of link explosion.

Fig. 3 . A typical good link explosion in I-Mbit DRAM chip. (a)

plosion patterns usually become le\\ ”football”-like with le\\ debris. In order to find out whether thi4 etch-back efiect II mainly due to glass mechanical 4trength differ- ences or composition differences of the skin layer of the passivation glass, several 1 -Mbit wafers were subjected to SIMS analysis. SIMS results either before AI deposi- tion or after AI patterning show the glass composition is uniform with no anomalous composition skin layer evi- dent.

Laser power level adjustment is another important fac- tor in achieving good explosion patterns. If the power is too low, the link may not be totally severed. If the power is too high, the silicon substrate underneath the field oxide will start melting and may cause adjacent device degra- dation or long-term reliability problems. In Fig. 5(a), a higher laser power was used to cut the link. The link was totally severed but a circular lid-shaped pattern was formed. We call this pattern “evil eye.” The lid is a popped portion of field oxide under which the silicon was melted. The covering field oxide warms by heat diffusion from the target link and substrate and “buckles” under the high pressure exerted by the liquid silicon underneath it. Fig. 5(b) is a closer picture of this structure. It can be

Fig. 4. (a) A “football” explosion pattern. (b) A good and clean explo- sion pattern.

seen that some portion of the BPSG glass layer was vio- lently fractured by the expansion.

In Fig. 6(a) we show a large opened “Evil eye.” With increasing laser power, eventually the field oxide will ex- plode resulting in a large crater. We call this pattern “cra- ter” or “pin-prick’’ as shown in Fig. 6(b). On examina- tion under an optical microscope, a shiny crater can be

LU e / o / . : EXPLOSION OF POLY-SILICIDE LINKS I OS9

observed. This is the exposed silicon substrate material. The reason for “crater” formation can be understood by the optical properties of the material system. The field oxide is essentially transparent to the 1.064-pm laser light. The lightly doped silicon substrate, with a bandgap of about 1.10 eV, will (weakly) absorb the 1.166-eV in- frared photons. In the normal operating condition the Si substrate acts like a large heat sink that dissipates the laser-supplied heat rapidly enough such that the irradiated spot will not be melted. However, if the input laser power is too high, the heat cannot be dissipated rapidly enough. Therefore, the temperature of the irradiated spot will in-

. . . crease and eventually cause a local melted spot. This melted spot is encapsulated by field oxide. Hence, a high pressure is built up as temperature increases. Field oxide may be popped by the pressure resulting in an “evil eye” or even exploded away when forming a “crater.” It is obvious that for normal operation the laser power should always be adjusted well below the “evil eye” appear- ance.

V. LASER LINK EXPLOSION UNDER VARIOUS CONDITIONS AND THEIR COMPARISONS WITH

THEORETICAL MODEL

Several interesting experiments about laser link explo- sion under various conditions have been done in order to compare the observations with theoretical predictions [4]. The first one is ambient temperature variation. The laser testing and shooting are usually performed at 90°C due to testing requirements. However, it is interesting to see the difference, if any, when operating at room temperature. The explosion patterns are about the same, but the amount of debris is greatly increased and looks like broken spider webs. It seems that the exploded debris quenched much more rapidly in room-temperature ambient and a large part of the vaporized material condensed and deposited on the adjacent areas. This behavior is qualitatively consistent with the theoretical prediction; however, it is not yet clear why only 65°C difference will alter the debris character- istics to such an extent. The spider web-like debris of room-temperature link explosion is shown in Fig. 7(a) and (b).

The second interesting observation that has been made is shown in Fig. 8(a) and (b). In this experiment, we opened a BPSG window on every polycide laser link area. The BPSG passivation glass in these window areas was totally etched away to leave the polycide links completely exposed (Fig. 8(a)). Fig. 8(b) shows a laser cut link. It can be seen that along the original link boundary two par- allel lines of some material still remained. Careful ex- amination of typical link explosion reveals these two par- allel lines in the patterns such as “football” or “S- shape.” Because of the BPSG wall in the typical explo- sion patterns, it is difficult to tell if all these have the two parallel lines. These lines must be insulating material since all the link explosions with their presence were elec- trically opened. It is believed that they are polycide link

(b)

eye” explosion pattern. Fig. 5 . (a) An “evil eye” explosion pattern. (b) A closer picture of “evil

(b) Fig, 6 , (a) A large opened eye .33 (b) A .scrater.. or ..pin-prick33

explosion pattern.

1060 IEEE TRANSACTIONS ON FLkCTRON DEVICES. VOL. 36. NO. 6. JUNk 1989

(b) Fig. 7 . Spider web-like debris from room-temperature link explosion

etching sidewall materials that were deposited on the polycide links during silicide-poly sandwich structure plasma etching. These sidewalls have been observed by etching engineers before. Since they can remain after link explosion, these materials must be very hard and also very difficult to melt.

The third experiment is to test the effects of a short- pulse laser versus a long-pulse laser. The typical laser pulse we used in the above investigations is a short-pulse laser. Fig. 9 illustrates the two laser pulse shapes used. Each represents a type of laser that is commercially avail- able. The long-pulse laser has a pulse duration of 190 ns (FWHM). In Fig. 9, the two laser pulses were scaled to deliver the same amount of total energy to the target. In the real experiment, we have adjusted the power level of each laser system such that they can result in the best ex- plosion patterns.

It is predicted by the theoretical model [4] that, by using a short-pulse la!er, most of the laser energy is absorbed in the top 290 A of tantalum disilicide. As the link sur- face layer explodes and ruptures the glass dielectric, some “cold” lower materials are ejected and result in debris surrounding the link site. By using a long-pulse laser, the resultant improvement in heat diffusion down into the link depth leads us to conjecture that the entire depth of the target link will be throughly cleaned out, and therefore we would expect less debris in the vicinity of the target link.

(b) Fig. 8. (a) Exposed polycide link with BPSG passivation glass etched away

in a BPSG window area. (b) A laser-cut link of exposed polycide links without BPSG glass cap

0 200 400 600 800

TIME (NANOSECONDS)

Fig. 9. Long- and short-pulse laser shape with equal energy

Typical link bums for short- and long-pulse laser are illustrated in Fig. 10(a) and (b), respectively. Note the cleaner cosmetic appearance of the long-pulse burns as compared to those of the short. These results correlate well with the model prediction.

However, the long-pulse explosion simulation also brings attention to some possible undesirable character- istics [4]. According to the theory, the top glass dielectric

LU Cf a l . . EXPLOSION OF POLY-SILICIDE LINKS 1061

(b) Fig i 0 (a) Typical link burns for short-pulse laser. (b) Typical link burns

for long-pulse laser

and the bottom field oxide are melted at explosion. There- fore, a certain portion of field oxide is expected to be ejected and significant heat may diffuse down into the sil- icon substrate and laterally into neighboring structures unless possible pre-mature explosion happened due to top dielectric glass softening. Either case is undesirable and may cause yield loss or later reliability problems.

Split lot repair rate experiments were run to compare long- and short-pulse laser results. The long-pulse results appeared to enjoy a repair rate advantage over the short, supported by the cleaner link explosions with the long- pulse laser. However, the apparent yield advantage of the long- over the short-pulse laser system did not survive subsequent final testing and burn-in. In addition, both the “good” to “functional” chip ratio and the speed distri- bution of chips repaired by the long-pulse laser are de- graded. These facts imply that the long-pulse laser gen- erates some undesirable thermal and/or mechanical damage to the adjacent structures or the substrate as pre- dicted by the model.

VI. CONCLUSIONS Various laser link explosion patterns in DRAM repair

with polycide links have been observed. The causes of their formation and their effects on laser repair rate are discussed. In order to understand these observations, a theoretical model has been used to explain some of these

complicated laser-materials interactions [4]. Several in- teresting experiments have been performed and compared with theory; good correlations were obtained. As the number of memory cells increases rapidly in future gen- erations of DRAM, scaling effects on laser repair rate will eventually become another yield limiter unless laser ex- plosion technology and random defect density are im- proved accordingly.

ACKNOWLEDGMENT We would like to thank R. T . Smith, D. S . Yaney, and

E. Majka for valuable discussion and encouragement and A. Harms, E. A. Johnson, A. J . Mesessa, W. Lauer, K. H. Lee, A. M.-R. Lin, D. J. Oberholzer, J. M. Pan, C. W. Pearce, D. E. Schrope, J. A. Swiderski, M. S . Twi- ford, and W. E. Willenbrock for their technical help and discussions.

REFERENCES [ I ] R. T. Smith et al.. “Laser programmable redundance and yield im-

provement in a 64K DRAM,” IEEE J . Solid-State Circuits. vol. SC- 16, p . 506, 1981.

121 R. P. Cenker er a l . , “A fault-tolerant 64K dynamic random access memory.” IEEE Trans. Elertrorl Devires. vol. ED-26, p. 853, 1979.

[3] W. R. Moore, “A review of fault-tolerant techniques for the enhance- ment of integrated circuit yield.” Proc. IEEE, vol. 74, p. 684, 1986.

[4] J . D. Chlipala, L. M. Scarfone, and C. Y. Lu, “Computer-simulated explosion of poly-silicide links in laser programmable redundancy for VLSI memory repair,” IEEE Trans. Elecrroii Devires. to be pub- lished

*

Chih-Yuan Lu (M’78-SM’84) received the B.S. degree in physics from National Taiwan Univer- sity, ROC, in 1972, and the M.A., M.Ph.. and Ph.D. degrees from Columbia University, New York, NY, in 1974. 1975, and 1977, respectively. all in physics. He was Columbia Faculty Fellow and then Pfister Fellow in Columbia Univcrsity from 1972 to 1977.

In 1978, he became an Associate Professor and in 1981 was promoted to full Professor of the In- stitute of Electronics, National Chiao-Tung Uni-

versity, Taiwan, ROC. In 1983, he visited North Carolina State Univer- sity, Raleigh, as an Associate Professor and an Adjunct Research Staff member of the Microelectronic Center of North Carolina (MCNC) at Re- search Triangle Park, NC. In 1984, he joined AT&T Bell Laboratories where he has been engaged in research and development of high-voltage bipolar-CMOS-DMOS (BCDMOS) integrated circuits technology for tele- communication applications, I-Mbit DRAM technology. laser program- mable redundancy, and now is a major investigator in submicrorneter CMOS VLSI technology development. super-densed CMOS structure. and novel interconnection technology. and is responsible for design rules and process integration. He has authored more than 60 technical papers and many in- vention disclosures and patents. He also authored more than 20 articles in science education and R&D nolicy in magazines and news papers.

Dr. Lu is a member of Si;ma Pi Sigma. Phi Tau Phi. and Phi Lambda. and is a Life Member of the American Physical Society, the Physical So- ciety of ROC, and the Chineses Institute of Engineers. He has been listed in Who’s Who in America. Who ‘s Who in Frontiers of Science clrid T e d - nology, Who’s Who in the World. and many more.

1062 IEEE TRANSACTIONS ON ELECTRON DEVICES. VOL 36. NO 6. J U N E 1989

JameT D. Chlipala (S’75-M’78) was born in Buf- falo, NY, on August 24, 1946 He received the B S degree in physics from Canisius College, Buffalo, in 1968 and the Ph.D. degree in physics from the University of Vermont, Burlington, in 1978. He performed graduate research in sheet re- sistance of heavily doped semiconductors and Burlington computer networking for laboratory data acquisi- tion and experiment control His Ph.D. disserta- tion was a study of the surface properties of vac- uum quenched molybdenum utilizing ultraviolet

Leonard M. Scarfone received the B A and M.A degrees in phyrics from Williams College and the Ph D degree in physics from Rensselaer Polytechnic Institute

He is currently Professor ot Physic5 in the Physics Department at the University of Vermont,

His research areas include theoretical-numeri- cal modeling of the thermal response of multilay- ered materials in interaction with intense laser ra- diation, density-functional theory and descriptions

photoelectron spectroscopy. He joined AT&T Bell Laboratories, Allentown, PA, in 1978. He was

involved in the initial development of laser programmable redundancy and development and introduction to manufacturing of this technology for 64K and 256K DRAM’S and a variety of static memories. His current activities involve the theoretical and experimental study of laser redundancy relia- bility issues and the improvement of the application of this technology through statistical process control.

of the dielectric response of a semiconductor to an external perturbation, the coherent-potential approximation and single-particle properties of ele- mentary excitations in disordered alloys and mixed crystals. including or- der-disorder phase transitions, and multiple-time-scale perturbation theory with applications in atomic physics. He has authored numerous articles in theoretical physics.

Dr. Scarfone serves as a referee for several professional journals.

Dr. Chlipala is a member of the American Physical Society.


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