F1: Beamforming Techniques and RF Transceiver Design Vector...

F1: Beamforming Techniques and RF Transceiver Design

Vector Modulation Techniques and

Interference Nulling

Jeyanandh Paramesh

Carnegie Mellon University

Feb 19, 2012

Jeyanandh Paramesh 1 Vector Modulation Techniques and Interference Nulling

Outline

Introduction to multi-antenna (MIMO) systems

Analog/RF antenna weight implementation approaches

Vector modulator based integrated MIMO systems

Recent variations based on vector modulation

Cartesian combining technique

Phase oversampling technique

Switched-capacitor technique

Interference cancellation


Outline










MIMO Classification

Spatial Diversity

Beamformers &

Adaptive Arrays

Spatial Multiplexing

Multiple-Antenna

Systems


Spatial Multiplexing

Concurrent data streams

Linear increase in data rate C = N∙B∙log2(1+SNR) bits/s/Hz

Exploits rich multipath fading

Need complete receive chains Analog/RF implementation impractical

b0 b1 b2 b3 b4 b5

Mo

du

latio

n M

ap

pin

g

b0

b1

b2

b3

b4

b5

Sig

na

l Pro

ce

ssin

g

c0

c1

c2

c3

c4

c5

c0 c1 c2 c3 c4 c5

A1

A2

A3

B1

B2

B3

C1

C2

C3

A1

A2

A3

**

**

**

**

**

**

B1

B2

B3

**

**

**

**

*

**

*

**

*

* *

**

***

**

** *

** *

* *

* *

**

**

**

**

*

C1

C2

C3

**

**

******

*** ***

**

**

** *** * ** *

* **

* *

* *

*** ***

******


Receive Beamforming Tightly-correlated receive signals at

antennas

3dB SNR improvement for uncorrelated noise for every doubling of antenna elements, N

Steer beam by adjusting delays

Spatial filtering + beam-steering interference rejection

Variable delay elements difficult to implement on-chip

Narrowband: Replace variable time delays with variable phase-shifts

r1(t)

r2(t)r3(t)r4(t)

y(t)

d(t) d(t-t) d(t-2t) d(t-3t)

d q


Fourier transform

( ) exp( 2 ) exp 2 ct n j fn j f nd t t t

Narrowband Beamformer

Narrowband input for line array: B∙Nt << 1 t = travel time between adjancent antennas )

Use variable phase-shifters instead of variable delays Also known as phased array

0.2

0.4

0.6

0.8

1

30

210

60

240

90

270

120

300

150

330

180 0

0.2

0.4

0.6

0.8

1

30

210

60

240

90

270

120

300

150

330

180 0

y

z

x

z

r1(t)

r2(t)r3(t)r4(t)

y(t)

A0ej0

A1ejφ

A2ej2φ

A3ej3φ

d q


Bandwidth Considerations

-80 -60 -40 -20 0 20 40 60 80-60

-50

-40

-30

-20

-10

0

10

Incidence angle

Array G

ain

(d

B)

q

q

0.8*fc

1.0*fc

1.2*fc

-80 -60 -40 -20 0 20 40 60 80-60

-50

-40

-30

-20

-10

0

10

Incidence angle

Array G

ain

(d

B)

0.8*fc

1.0*fc

1.2*fc

Incidence Angle

Arr

ay G

ain

(dB)

0

Time-delay

Phased-array

Differential delay in line array

Equivalent delay in phased-

array

But at equivalent

delay in phased-array is

smaller equivalent delay!

Beamformer is “looking” at a

smaller angle

0 0sind

ct q

0 0 2 cft

cf f fd

, 0 00 (1 )

2 ( ) 2c c c

f

f f f f

dt

d

0 0 0tanc

f

f

dq q q


Spatial Diversity

Maximal Ratio Receive Combining SNR N∙SNR BER BERN

(uncorrelated fading)

Improves link robustness

Logarithmic increase in channel capacity

r1(t)

r2(t)

r3(t)

r4(t)

s1(t)

TX

Complex weights

kj

ke

1w

2w

3w

4w

MRC Solution (flat fading):

*

k kj j

k k kw e e


Spatial Diversity

r1(t)

r2(t)

r3(t)

r4(t)

s1(t)

TX

Complex weights

kj

ke

1w

2w

3w

4w

Weights determined during channel estimation Performed one antenna

at a time in RF/analog combiner

For OFDM, optimal MRC requires one weight per sub-carrier in each channel MRC sub-optimal for

OFDM in RF/analog combining

*n n

k k kj j jn n n

k k k kw e e e

(Sub-optimal)

Optimal MRC Solution (kth antenna, nth OFDM sub-carrier):


Outline

Introduction to multi-antenna systems






Switched-capacitor Technique



Antenna Weighting Techniques (I)

Mostly-digital approach, most flexible

Only practical approach for spatial multiplexing

Power/Area hungry (Multiple RF, LO distribution & ADC’s)

Want less expensive architectures for beamforming, diversity and adaptive arrays

LNA

ADC

ADC

DSP

cos(wct)

sin(wct)

Direct conversion SISO receiver

LNA

ADC

ADC

LNA

ADC

ADC

DSP

cos(wct)

sin(wct)cos(wct)

sin(wct)

x1(t)

x2(t)

Direct conversion MIMO receiver


Antenna Weighting Techniques (II)

Narrowband, non-multiplexed

MIMO

Antenna weight = Aejf

want signal processing @ RF

RF shift vs. LO-shift phase-shift

Silicon phase-shifters

Large & lossy

Often < 360° phase-shift

Relatively narrowband

Poorly controlled

Desire transistor-only approach

Signal path phase-shift

LNA F

LNA F

+

ADC

ADC

DSPx2(t)

x1(t)

cos(wct)

sin(wct)

LO path phase-shift

LNA

F

LNA

F

+

ADC

ADC

DSP

cos(wLO1t+fk)

sin(wLO1t+fk)

x2(t)

x1(t)

cos(wLO2t)

sin(wLO2t)


Outline










Cartesian Weighting

Different ways to implement 90° splitter

Passive HP-LP Filters, Quadrature hybrids, Polyphase filters

Active

Can use for different kinds of modulation in transmitters

Also called vector modulation

Ar

Ai LO90o 90

o

Ar

Ai LO

1 2

34

26.5°+1

+0.5

1

2

3


Early Vector Modulators

Split input into multiple phase-shifted paths

Two-path HP/LP Filter Splitter

Three-path LP/HP/AP Filter Splitter

Full 360 phase shift

Ellinger, F. et. al., "Novel principle for vector modulator-based phase shifters operating with only one control voltage," JSSC Oct 2002 Ellinger F et. al.,. "An antenna diversity MMIC vector modulator for HIPERLAN with low power consumption and calibration, TMTT May 2001

sin(wLOt)

cos(wLOt)

HPF

LPF

Amplifiers/

Attenuators

HPF

LPF

Directsin(wLOt)

cos(wLOt)


RF Vector Modulator

Quadrature hybrid splits input power between two ports with a relative phase-shift of 90°

Equal power splitting required in phase shifter application

Can get full 360° phase shift by switching sign of amplifier gain

LNA

cos(wLOt)

sin(wLOt)

LNA

Quadrature Hybrids


Integrated Quadrature Hybrids

Lumped element design necessary for on-chip implementation

Amplitude and phase accuracy achieved within limited BW

Both have relatively low BW, but coupled version BW is higher

a

4

4

Input1

Isolated

4

Direct2

Coupled

3

a

b b CC CC

CG CG

CG CG

1 2

34

INP DIR

CPLISO

Input1

Direct2

Coupled

3

Isolated

4

CC CC

CG CG

CG CG

1 2

34

DIR

CPL

INP

ISO

k

Branchline

Coupled


Phase Compensated Hybrid

ISO

DIR

1 2

34

CPL

1' 2'

4' 3'

1'’ 2'’

4'’ 3'’

Coupling K1 Coupling K2

INP

CC CC

CG CG

CG CG

1 2

34

CC CC

CG CG

CG CG

k

ISO

DIR

CPL

INP

2 2

1 2 1 2 2 11 1K K K K K

2 2

1 3 1 2 1 21 1K K K K K

2 2

1 2 1 3

1 2 1 3

1

8.3

K K

K K dB

BranchLine

Lange

Composite

Inductor loss introduces opposing phase shifts in each type of coupler phase-compensation


Cascaded Coupled Hybrid

“Loosely coupled” two-stage cascade

Low-k transformer CC CC

CG CG

CG CG

1

4

INP

ISO

kCC CC

CG CG

CG CG

k

2

3

DIR

CPL

CC CC

CG CG

CG CG

1

4

INP

ISO

CC CC

CG CG

CG CG

2

3

DIR

CPL

0.707 0.707

“Tightly coupled” two-stage coupler

Wideband

High-k transformer

D. Ozis, J. Paramesh and D. J. Allstot, “Integrated Quadrature Couplers and Their Application in Image Reject Receivers,” IEEE J. Solid-State Circuits, vol. 44, No. 5, May 2009.


Active Phase Splitting


1SW 2SW1SW 2SW

1V 2V 2V 1V

1SW 2SW

1IV 2IV

1V

2V 2V

1V

Path1

Path2

From

LNA

Tiku Yu, Rebeiz, G.M., "A 22–24 GHz 4-Element CMOS Phased Array With On-Chip Coupling Characterization", Solid-State Circuits, IEEE Journal of, On page(s): 2134 - 2143, Volume: 43 Issue: 9, Sept. 2008

Splitter Combiner

Active Phase Splitting

Phase difference: 103°±2.5°

Gain difference 0 ± 0.5 dB

Acceptable since any phase can be synthesized


Tiku Yu, Rebeiz, G.M., "A 22–24 GHz 4-Element CMOS Phased Array With On-Chip Coupling Characterization", Solid-State Circuits, IEEE Journal of, On page(s): 2134 - 2143, Volume: 43 Issue: 9, Sept. 2008

18 20 22 24 26 28-10

-8

-6

-4

-2

0

18 20 22 24 26 28-20

0

20

40

60

80

100

18 20 22 24 26 28-10

-8

-6

-4

-2

0

18 20 22 24 26 28-20

0

20

40

60

80

100

Freq. (GHz)

dB

degre

es

Phase difference

Freq. (GHz)

Path1

Path2

Baseband Vector Modulation

LO distribution network can dominate power @ mm-wave frequencies

Distribute low frequency LO and multiply locally

Perform combining at baseband

Highly digital solution shown

I/Q

Downconverter

Ar

Ai

Ar

Ai

I/Q

Downconverter

Antenna weight

gm

gm

gm

gm

gm

gm gm

8X 4X 2X 1X


Outline


Antenna weight implementation approaches

Classical vector modulator based MIMO systems







Cartesian Phase Shifter

Eliminate explicit 90° splitter

Combine weighting with quadrature downconversion

Inherently broadband

90o

Ar

Ai 2 LOj f te

2sin2cos)()(

2sin2cos)()(

)()( 2

tfAtfAtxtx

tfAtfAtxtx

ejAAtxtx

LOrLOiQ

LOiLOrI

tfj

irIF

LO

cos(2fLOt)

sin(2fLOt)

cos(2fLOt)

x(t)Ar

Ai

xIF(t)


Cartesian Combining

Exploit linearity to achieve single downcoversion path

Reduces power dissipation in LO distribution

VGA’s must have sign-invertible gains AR’s and AI’s

Ar1+jAi1

Ar2+jAi2

+exp(j2fLOt)

x1(t)

x2(t)xIF(t)

Ar1+jAi1

x1(t)

+

Ar2+jAi2

x2(t)

exp(j2fLOt)

xIF(t)


J. Paramesh, R. Bishop, K. Soumyanath and D.J. Allstot, “A four-antenna Cartesian-combining receiver in 90nm CMOS,” IEEE J. Solid-State Circuits, vol. 40, pp. 2515-2524, Dec. 2005.

Two-channel Cartesian Combiner

Full 360o phase shift at any input frequency

Simplified LO distribution with combining realized before mixers

Continuously programmable phase

cos(2fLOt)

-

+

cos(2fLOt)

Ai1

Ar1

Ai2

Ar2

+

+

sin(2fLOt) xIF(t)


+

_

Weight

Amplifier #1

LOI LOQ

Weight

Amplifier #2

+

_

Circuit Implementation


From LNA #1

From LNA #2

- +

Ai1

Ar1

Ai2

Ar2

+ +

xIF(t)

+

_

4b+2b segmented

current-streeing DAC

Vref

6b

DAC

Vector Modulation in RF-LO Path

Other ways to generate quadrature LO Fundamental quadrature VCO 2X VCO with divide-by-2 Quadrature hybrids, Polyphase filters

A. Natarajan, A. Komijani, X. Guan, A. Babakhani, and A. Hajimiri, “A 77-GHz Phased-Array Transceiver with On-Chip Antennas in

Silicon: Transmitter and Local LO-Path Phase Shifting,” IEEE Journal of Solid-State Circuits, vol. 41, no. 12, pp. 2807-19, Dec. 2006.

Ar1

Ai1Ai2

Ar2

0° 90°

ANT1 ANT2

ILO ILO QLOQLO

ILO QLO

cos sin sincos

λ/4 @ fVCO

ILOQLOILO QLO

From

VCO


http://www.chic.caltech.edu/Publication05/Journals/Natarajan_JSSC_2006.pdf










22.5o

±1

0o

±1

135o

±1

157.5o

±1

112.5o

±1

90o

±1

247.5o

±1

225o

±1

cos(2 )LOf t

sin(2 )LOf t

I

Q

Phase Oversampling

Employ multiple phases

VGA’s with gain +/-1 sufficient

Fixed phase-shifter options

RC-CR filters

Multiphase LO

Trade-off between complexity and grid resolution

M phases between

0 and 180°

M phases with 90 °offset

Tseng, R.; Li, H.; Kwon, D.H.; Chiu, Y.; Poon, A.S.Y.; , "A Four-Channel Beamforming Down-Converter in 90-nm CMOS Utilizing Phase-Oversampling," Solid-State Circuits, IEEE Journal of , vol.45, no.11, pp.2262-2272, Nov. 2010


-6 -4 -2 0 2 4 6-6

-4

-2

0

2

4

6

Phase Oversampling

Synthesizable amplitudes and phase shifts

-4 -2 0 2 4-4

-3

-2

-1

0

1

2

3

4

M=5 M=8

Re(w)

Im(w

)

Re(w)


Multi-phase LO Generation

PFD CP LF

Delay Line

Interpolation

Delay

Locked Loop

0° 22.5°

Buffers

8 phases

@ fLO/2

16 phases

@ fLO/2

Edge Combiner

8 phases

@ fLO

τ τ τ


Obtaining Uniform Phase Steps

Want uniform phase steps, but sin(∙) and cos(∙) are quite non-linear

Need finer granularity if uniform weight steps are used

phase

Need more steps in weight

for uniform phase steps


M. Soer, E. Klumperink, B. Nauta, F. van Vliet, “A 4-Element Phased Array Receiver Front-End in 65nm CMOS using a Switched-Capacitor Vector Modulator,” Solid-State Circuits, IEEE Journal of , vol.46, no.12, Dec 2011.

Rational sin/cos Approximation

Implement sin(∙) and cos(∙) as rational approximation

Uniform steps in α uniform steps in phase

Leads to elegant switched-capacitor implementation


0

0.2

0.4

0.6

0.8

1

0 0.25 0.5 0.75 1 0 22.5 45 67.5 90

Y

phase ?

s i n ( p h a s e )

7

4 ×

α

α

3 / 4

Switched Capacitor Technique

Charge sharing provides both rational approximation and sin(∙)/cos(∙) summing

Z

I

Q

X

Y

Sum on node Z

LO+

LO-


Switched Capacitor Beamformer

VM

fLOI

fLOQ

VM

gm

fLOI

fLOQ

gm

gm

gm

αC 3C/4

αC 3C/4

(1-α)C 3C/4

(1-α)C 3C/4

(1-α)C 3C/4

(1-α)C 3C/4

αC 3C/4

αC 3C/4

C

C

C

C

Sign

InversionBuffers sin(∙)/cos(∙) Summation

A C

C A

B D

D B

B D

D B

A C

C A


Outline


Antenna weight implementation approaches

Classical vector modulator based MIMO systems







Interference Cancellation

Analytical approach: Assume co-channel interference

1 0


w2 w1

( (

)

)

( ) (

)

u t

t D f

f

d

U2

2

( ) (

( ) ( )

) c

c d

uj f

u

j f

d

u

d

t U f e

t D f e

( )y t

Desired

Undesired

1 2

2 2

1 2

2

1 2

2( ) ( )

(

( )

( )

( )

( )

) c d

c ud c

c u

j f

j f

f

f j

jY f w w

w w e w w e

U f U f eD f

f U

f e

D f

D

Null synthesis using beam cancellation

Separate array factor into two parts

First part with weight vector wd points in desired signal direction

Second part with weight vector wu points in interferer direction

Scale second part and subtract from first part

Alternatively can view new array factor as a perturbation of the quiescent array factor

int

1int ( 1)sin

0

max

= max

INT

Q Q

INT

NQ j k

kd ku

k INT

AFAF AF AF

AF

AFw w e

AF

q

qq q q

q

q

q

New weight


Null Synthesis Example #1

4X rectangular array

0.2

0.4

0.6

0.8

1

30

210

60

240

90

270

120

300

150

330

180 0

0.2

0.4

0.6

0.8

1

30

210

60

240

90

270

120

300

150

330

180 0

0.2

0.4

0.6

0.8

1

30

210

60

240

90

270

120

300

150

330

180 00 50 100 150

-60

-50

-40

-30

-20

-10

0

10

Quiescent pattern Perturbation

Overall pattern

Signal cancellation tolerable with sufficient DoA separation

Desired

Interferer

Quiescent Perturbation


0.2

0.4

0.6

0.8

1

30

210

60

240

90

270

120

300

150

330

180 0

Null Synthesis Example #2

8X circular array

Quiescent pattern Perturbation

Overall pattern

0.2

0.4

0.6

0.8

1

30

210

60

240

90

270

120

300

150

330

180 0

0.2

0.4

0.6

0.8

1

30

210

60

240

90

270

120

300

150

330

180 0

0 100 200 300-60

-50

-40

-30

-20

-10

0

10

Desired

Interferer

Angle (deg.)

dB

Quiescent Perturbation


Interference Cancellation Demo

One Channel A Second Channel Enabled

Interferer @ 30°

64-QAM


Conclusions

Vector (Cartesian) techniques popular in integrated phased array transceivers

Friendly to implementation in CMOS

New digital-friendly variations developed to exploit CMOS scaling

Sufficient precision for interference cancellation


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