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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 37, NO. 7, JULY 2018 1473 Fault Group Pattern Matching With Efficient Early Termination for High-Speed Redundancy Analysis Hayoung Lee, Kiwon Cho, Donghyun Kim, and Sungho Kang , Senior Member, IEEE Abstract—Advances in memory density and capacity have had the consequence of increasing the probability of memory faults. For this reason, redundancy analysis (RA) and repair are used as effective solutions to improve memory yield. However, as the growth of the number of memory cells increases, it causes increase of the number of faulty cells and results in increase of difficulty of fault analysis. Although various RA methodolo- gies have been proposed, most of them require a long analysis time or fast analysis speed without achieving a 100% normalized repair rate. Furthermore, research on conventional RA method- ologies has not included effective early termination methods. Therefore, in this paper, fault group pattern matching (FGPM) is proposed for high speed RA with an effective early termination method. It can achieve very fast analysis with a 100% normal- ized repair rate. Additionally, it can finish the analysis rapidly by the proposed early termination method when a memory cannot be repaired. Experimental results demonstrate that the FGPM is highly effective in reducing analysis time with the achievement of a 100% normalized repair rate. In addition, the effectiveness of the proposed early termination is shown. Index Terms—Early termination, fast analysis, fault group- ing, memory repair, normalized repair rate, pattern matching, redundancy analysis (RA), repair rate. I. I NTRODUCTION W ITH the development of very large scale integra- tion technology, the density and capacity of memories has rapidly increased. However, as the density of memory increases, the number of memory cells increases and the number of faults on memory increases too. For this rea- son, redundancy analysis (RA) and repair are widely used to improve memory yield. Memory repair is a methodology that replaces faulty cells using incorporated redundancies in mem- ories and RA is the process to find repair solutions with the given spares in order to maximize the repair rate. Since there is a tradeoff between the repair time and the repair rate, the problem of RA is the reduction of RA time while maintaining Manuscript received March 20, 2017; revised July 14, 2017; accepted September 20, 2017. Date of publication October 6, 2017; date of current version June 18, 2018. This work was supported by the National Research Foundation of Korea Grant funded by the Korea Government (MSIP) under Grant 2015R1A2A1A13001751. This paper was recommended by Associate Editor A. E. Gattiker. (Corresponding author: Sungho Kang.) The authors are with the Computer Systems Reliable SOC Laboratory, Department of Electrical and Electronic Engineering, Yonsei University, Seoul 120-749, South Korea (e-mail: [email protected]; [email protected]; [email protected]; [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TCAD.2017.2760505 the optimal repair rate. Generally, an efficient RA methodol- ogy is evaluated by the repair rate and analysis time. Because a decline in repair rate induces unwanted drops in yield, it is directly related to the production of commodity memories. On the other hand, the analysis time affects the testing cost. The testing cost increases in proportion to the increase in analy- sis time. Additionally, the optimal repair solution must also be considered in the RA methodology. An optimal repair solution means the number of used spares for repair is minimized. This is important because unused spares in the wafer-level repair process can be used in the package-level repair process [1]. In addition, they can be used in the field when the memory is tested periodically and the faulty cells can be repaired when spare elements are still available for repair. Therefore, an ideal RA methodology should have a high repair rate with fast analysis and should be able to find an optimal repair solution. In general, the RA methodology can be classified into two categories: 1) the automatic test equipment (ATE)-based RA and 2) the built-in RA (BIRA). In the ATE-based RA, the ATE conducts test and repair operations. The ATE transmits test patterns to memories for memory testing and receives test results. After then, fault information of tested memory is stored in a large failure bitmap. After the end of memory testing, the ATE starts to analyze fault information in a failure bitmap using an RA algorithm to find memory repair solu- tions. If memory repair solutions are found, the ATE sends the information to the memories and memories are repaired accordingly. On the other hand, the BIRA is inserted in mem- ories with a built-in self-test (BIST) to conduct testing and repair operations autonomously without the ATE. The BIST sends test patterns to memories for testing, and test results are collected in the BIRA. The BIRA then analyzes the test results to find repair solutions. Generally, the BIRA researches have been proposed based on the advantages that BIRA can reduce repair-cost by reducing repair time and repair processes. However, the main disadvantage is the hardware overhead. Although there are several approaches that have small hard- ware overhead, these are not widely used for commodity memories, but used only for special cases. Instead RA with ATE has been widely used for repair. Several researches for the BIRA have been proceeded despite the implementation problem. Comprehensive real-time exhaustive search test and analysis (CRESTA) [2] is the first RA methodology as the BIRA. CRESTA analyzes the fault information using multiple subanalyzers and searches all pos- sible repair cases, simultaneously. It can achieve fast analysis 0278-0070 c 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
Transcript
Page 1: Fault Group Pattern Matching With Efficient Early ...soc.yonsei.ac.kr/Abstract/International_journal/pdf/154_Fault Group... · IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, VOL. 37, NO. 7, JULY 2018 1473

Fault Group Pattern Matching With Efficient EarlyTermination for High-Speed Redundancy Analysis

Hayoung Lee, Kiwon Cho, Donghyun Kim, and Sungho Kang , Senior Member, IEEE

Abstract—Advances in memory density and capacity have hadthe consequence of increasing the probability of memory faults.For this reason, redundancy analysis (RA) and repair are usedas effective solutions to improve memory yield. However, asthe growth of the number of memory cells increases, it causesincrease of the number of faulty cells and results in increaseof difficulty of fault analysis. Although various RA methodolo-gies have been proposed, most of them require a long analysistime or fast analysis speed without achieving a 100% normalizedrepair rate. Furthermore, research on conventional RA method-ologies has not included effective early termination methods.Therefore, in this paper, fault group pattern matching (FGPM) isproposed for high speed RA with an effective early terminationmethod. It can achieve very fast analysis with a 100% normal-ized repair rate. Additionally, it can finish the analysis rapidly bythe proposed early termination method when a memory cannotbe repaired. Experimental results demonstrate that the FGPM ishighly effective in reducing analysis time with the achievementof a 100% normalized repair rate. In addition, the effectivenessof the proposed early termination is shown.

Index Terms—Early termination, fast analysis, fault group-ing, memory repair, normalized repair rate, pattern matching,redundancy analysis (RA), repair rate.

I. INTRODUCTION

W ITH the development of very large scale integra-tion technology, the density and capacity of memories

has rapidly increased. However, as the density of memoryincreases, the number of memory cells increases and thenumber of faults on memory increases too. For this rea-son, redundancy analysis (RA) and repair are widely used toimprove memory yield. Memory repair is a methodology thatreplaces faulty cells using incorporated redundancies in mem-ories and RA is the process to find repair solutions with thegiven spares in order to maximize the repair rate. Since thereis a tradeoff between the repair time and the repair rate, theproblem of RA is the reduction of RA time while maintaining

Manuscript received March 20, 2017; revised July 14, 2017; acceptedSeptember 20, 2017. Date of publication October 6, 2017; date of currentversion June 18, 2018. This work was supported by the National ResearchFoundation of Korea Grant funded by the Korea Government (MSIP) underGrant 2015R1A2A1A13001751. This paper was recommended by AssociateEditor A. E. Gattiker. (Corresponding author: Sungho Kang.)

The authors are with the Computer Systems Reliable SOC Laboratory,Department of Electrical and Electronic Engineering, Yonsei University,Seoul 120-749, South Korea (e-mail: [email protected];[email protected]; [email protected]; [email protected]).

Color versions of one or more of the figures in this paper are availableonline at http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TCAD.2017.2760505

the optimal repair rate. Generally, an efficient RA methodol-ogy is evaluated by the repair rate and analysis time. Becausea decline in repair rate induces unwanted drops in yield, it isdirectly related to the production of commodity memories. Onthe other hand, the analysis time affects the testing cost. Thetesting cost increases in proportion to the increase in analy-sis time. Additionally, the optimal repair solution must also beconsidered in the RA methodology. An optimal repair solutionmeans the number of used spares for repair is minimized. Thisis important because unused spares in the wafer-level repairprocess can be used in the package-level repair process [1].In addition, they can be used in the field when the memory istested periodically and the faulty cells can be repaired whenspare elements are still available for repair. Therefore, anideal RA methodology should have a high repair rate withfast analysis and should be able to find an optimal repairsolution.

In general, the RA methodology can be classified into twocategories: 1) the automatic test equipment (ATE)-based RAand 2) the built-in RA (BIRA). In the ATE-based RA, theATE conducts test and repair operations. The ATE transmitstest patterns to memories for memory testing and receivestest results. After then, fault information of tested memoryis stored in a large failure bitmap. After the end of memorytesting, the ATE starts to analyze fault information in a failurebitmap using an RA algorithm to find memory repair solu-tions. If memory repair solutions are found, the ATE sendsthe information to the memories and memories are repairedaccordingly. On the other hand, the BIRA is inserted in mem-ories with a built-in self-test (BIST) to conduct testing andrepair operations autonomously without the ATE. The BISTsends test patterns to memories for testing, and test results arecollected in the BIRA. The BIRA then analyzes the test resultsto find repair solutions. Generally, the BIRA researches havebeen proposed based on the advantages that BIRA can reducerepair-cost by reducing repair time and repair processes.However, the main disadvantage is the hardware overhead.Although there are several approaches that have small hard-ware overhead, these are not widely used for commoditymemories, but used only for special cases. Instead RA withATE has been widely used for repair.

Several researches for the BIRA have been proceededdespite the implementation problem. Comprehensive real-timeexhaustive search test and analysis (CRESTA) [2] is the firstRA methodology as the BIRA. CRESTA analyzes the faultinformation using multiple subanalyzers and searches all pos-sible repair cases, simultaneously. It can achieve fast analysis

0278-0070 c© 2017 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

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but, requires multiple subanalyzers, equal to the number ofall possible repair combinations. Therefore, as the increase ofthe number of spares affect to increase of hardware overheada lot. Local repair-most (LRM) and essential spare pivot-ing (ESP) [3], were proposed to apply as the BIRA by reducingstorage requirements. Because a large failure bitmap used inthe ATE cannot be applied to the BIRA duo to the largestorage requirements, LRM uses a small failure bitmap andESP uses small registers instead of a failure bitmap. However,these cannot achieve 100% normalized repair rate but closeto an optimal solution with less hard overhead compared toother BIRAs with optimal repair rate. For increase of therepair rate, intelligent solve first (ISF) [4], minimized binarysearch tree [5], selected fail count comparison (SFCC) [6],and BRANCH [7] are proposed to apply as the BIRA thatuse a binary search tree structure. ISF can find an optimalrepair solution with a 100% normalized repair rate, but hasa low analysis speed. SFCC and BRANCH improve the anal-ysis speed compared to ISF. However, the hardware overheadof these BIRA has caused difficulty of application. Althoughsome studies have been reported to apply as the BIRA,recently [8]–[11], these still has a large hardware overheador a little decrease of repair rate.

On the other hand, there are researches for the ATE-basedRA. There are repair-most (RM) [12] and branch and bound(B&B) [13] as cornerstone of the ATE-based RA. RM isa “greedy” algorithm that allocates spare lines from the linethat has the most faults. Although its analysis speed is fastdue to simple analysis, it cannot achieve a 100% normal-ized repair rate and it is impossible to find an optimal repairsolution. B&B was proposed to achieve a 100% normalizedrepair rate and to find an optimal repair solution. It finds allrepair cases by building a “tree,” like a binary search tree.However, it is difficult to use the B&B because a large amountof analysis time is required for its application. PAGEB [14] isthe ATE-based RA in which the spare allocation problem istransformed as a Boolean expression. There are three Booleanfunctions that should be calculated for finding memory repairsolutions: 1) defect function (DF); 2) constraint function (CF);and 3) repair function (RF). And then, the final repair solu-tion is searched using a binary decision diagram that is usedto manipulate Boolean functions. Although it is proposed toimprove on the low analysis speed of the B&B, it is not suffi-cient to use for repair with the ATE, because it still has a lowanalysis speed because of the calculations of DF, CF, and RF.FAST [15] is the fastest RA algorithm using the fault groupingmethod. Each fault group is analyzed for how many row orcolumn spares are required to repair the fault group. After allfault group analyses, FAST creates combinations of each faultgroup solution and finds a final repair solution. However, itcannot achieve a high repair rate. For this reason, VERA [16]was proposed to improve the repair rate. The VERA also usethe fault grouping method but all of repair cases are searchedby constructing binary search tree. Although its analysis timeis lower than that of FAST, it can achieve a 100% normal-ized repair rate. Therefore, it can be considered as the fastestRA algorithm among the ATE-based RAs that have a 100%normalized repair rate. However, because VERA uses a binary

search tree construction, it can need much time for analysis ifthe number of faults in a group increases. Additionally, as 3-Dmemory is introduced, several researches of RAs for the 3-Dmemory have been proceeded [17]–[19], recently. However,these should be improved for the yield enhancement becausethese cannot find rapidly an optimal solution for repairing thememory.

This paper proposes fault group pattern matching (FGPM)that features a 100% normalized repair rate and faster analy-sis than conventional ATE-based RAs that achieve a 100%normalized repair rate. In addition, it can find an optimalrepair solution by considering all combinations of spares.In the analysis, because the fault grouping method is used,the investigation and classification of fault group patterns foreach fault group is conducted in a short time. Then, mostof fault groups find repair solution lists without additionalanalysis. Only a few fault groups require additional analy-sis with a short analysis time. Finally, it creates combinationsof each fault group solution and finds a final repair solution.Additionally, the FGPM is proposed with an effective earlytermination method; if memories cannot be repaired, it canfinish the analysis rapidly. Until now, several early terminationmethods [3], [20]–[22] have been proposed, but these becomeless useful as the memory density and capacity increases.The early termination [15] proposed with the FAST is rela-tively useful, but it requires improvement because it is stronglyaffected by the number of spares and the number of faults.The proposed early termination can finish the analysis rapidlyat a high rate when memories cannot be repaired. Therefore,the FGPM achieves a high-speed analysis with the proposedRA method and the proposed early termination.

II. BACKGROUND

A. Repair Rate

Repair rate is one of the crucial evaluation elements for anefficient RA methodology and is introduced in [3]. Becausea decline in repair rate causes unwanted yield drops, it affectsthe production of commodity memories. Repair rate representsthe probability of an efficient RA methodology if a memoryrepair solution can be found. The definition of repair rate is

Repair rate = No. of repaired chips

No. of total tested chips. (1)

However, repair rate considers memories that cannot berepaired using any efficient RA methodology with incorpo-rated redundancies. It does not help in comparing RA method-ologies for evaluation of RA efficiency. For this reason,normalized repair rate is used with repair rate for evaluationof RA efficiency; it considers only repairable memories, isintroduced in [10]. The definition of normalized repair rate is

Normalized Repair rate = No. of repaired chips

No. of repairable chips. (2)

B. Spare Allocation

In general, memory repair using RA methodologies imple-ments a line replacement policy. There are two kinds of spares:1) spare row lines and 2) spare column lines as shown in

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Fig. 1. Example of a memory using a line replacement policy.

Fig. 2. Example of memory with the fault grouping method.

Fig. 1, and each spare line is used to replace faulty cellsin memory. The point is that spare lines should be used torepair faulty cells regardless of the number of faults on a rowline or a column line by a line replacement policy. For exam-ple, (a) and (b) represent a single fault that does not sharea row address or a column address with any other faults,as shown in Fig. 1. To repair the single fault, at least onespare line is required regardless of spare line type. In addi-tion, the case of several faults generated on the same line, suchas (c) and (d) in Fig. 1, is a common case. Only differencebetween (c) and (d) is in available spares for repair the faultyline. (c) is a sparse fault that can be repaired by spare row linesor spare column lines but (d) is a must-repair faulty line thatshould be repaired by just one spare line type because of lessnumber of spares than the number of faults in a line. Althoughit appears to be an inappropriate replacement of faulty cellsbecause many normal cells can be replaced because of severalfaulty cells, it has the powerful advantages of simple con-trol of replacement and small control logic directly related tothe cost. However, realistic fault spots can be generated moreconfusing because several sparse faults can be overlapped asshown in Fig. 2. Therefore, an effective RA methodology forrepair is significant for a line replacement policy.

C. Fault Grouping

The fault grouping method is used for several RA tech-niques and evaluation of RA efficiency [15], [16], [23]–[25].Each fault group can consist of a single fault or multiplefaults that share the same row address or the same columnaddress. An important aspect of this approach is that must-repair lines are eliminated before constructing fault groups by

allocating spare lines. It can reduce unnecessary RA becauseit can reduce the number of faults in a group and a must-repairline should be replaced by a fixed spare line type for repair.Must-repair line allocation is proceeded after fault collectionprocess in the ATE. It is that memory row (column) lines thathave more faults than the number of column (row) spares, arefound and allocated by row (column) spares.

The most important consideration in the fault groupingmethod is that faults in a group do not have both the samerow address or the same column address with faults in othergroups. This causes each fault group to be independent of anyother fault groups, meaning that the solution search of eachfault group can be conducted independently. An example ofconstructed fault groups is shown in Fig. 2. As shown in Fig. 2,faults included in the group 1 are not located on the same rowline or the same column line with any faults included in othergroups. On the other hand, each fault included in the group1 is located on the same row line or the same column line withat least one other fault in the group 1. Also, faults includedin other groups show the same aspect. For this reason, eachgroup in Fig. 2 can be analyzed independently.

III. PROPOSED IDEA

A. Overview of the Proposed FGPM

The proposed FGPM has three main features: 1) theproposed early termination; 2) solution match; and 3) solu-tion search based on the fault grouping method. The proposedearly termination is an early termination method that can hap-pen with a high probability through calculating the minimumnumber of necessary spares approximately. The solution matchis a method that can find solution lists without fault analysisthrough matching of fault group pattern information. Solutionsearch is defined as a faulty line-based search achieving reduc-tion of the number of spare allocation cases that should beconsidered for a 100% normalized repair rate. The defini-tion of classification is whether fault group patterns that areincluded in the same category have the same solution lists ornot, when fault group patterns are classified depending on faultgroup pattern information investigated during preprocessing.The detailed description is as follows.

B. Preprocessing of the Proposed FGPM

To apply the proposed FGPM, three steps of preprocess-ing are needed: 1) fault grouping; 2) fault group patterning;and 3) fault group pattern information collecting. The faultgrouping is proceeded as shown in Fig. 2. Faults that have thesame row address or the same column address are grouped,as already mentioned. After the end of fault group genera-tion, fault group patterning is proceeded. Generation of a faultgroup pattern per each fault group is shown in Fig. 3. Asfaults allocated on the same line in each group are con-nected, a fault group pattern of each fault group is constructed.After then, constructed fault group patterns are investigated forapplying the proposed FGPM. The investigated informationlists are: 1) the number of faulty rows (Nfr); 2) the num-ber of faulty columns (Nfc); 3) the number of multifault rows(Nmr); and 4) the number of multifault columns (Nmc). Faulty

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Fig. 3. Example of fault group pattern generation.

rows (columns) represent all of row (column) addresses thatfaults exist in a fault group. For example, faulty rows of thegroup 1 in Fig. 2, are 0, 1, and 3. Therefore, Nfr of the group 1is 3. In the same manner, Nfc of the group 1 is 3 becausefaulty columns of the group 1 in Fig. 2, are 0, 2, and 3. Onthe other hand, multifault rows (columns) represent addressesof row (column) line that multiple faults exist in a fault group.In Fig. 2, rows 0 and 1 have two faults included in the group 1,each. For this reason, multifault rows of the group 1 are 0, 1.Therefore, Nmr of the group 1 is 2. Also, Nmc of the group 1is 2 because columns 0 and 1 have two faults included inFig. 2, each.

C. Early Termination

Although the importance of early termination has beenemphasized because of the effects of eliminating unneces-sary RAs, only little researches on early termination has beenconducted. This paper recognizes the importance of early ter-mination and proposes an effective early termination methodthat achieves a significant reduction in RA time by eliminat-ing RA processes of unrepairable memory. The proposed earlytermination calculates the number of minimum required spares(Nmrs) per each fault group, first. After then, it checks if thesum of Nmrs per each fault group is larger than the numberof available spares. Available spares mean remaining sparesafter must-repair line allocation. If the sum of Nmrs is largerthan the number of available spares, early termination happens.The flow chart of Nmrs calculation for a fault group pattern isshown in Fig. 4.

First, it is checked whether Nmr or Nmc is 0. If it is true, Nmrsto repair the group is 1. Because it means a fault group consistsof a single fault or one-direction sparse fault like (a) or (c) inFig. 1. If not, Nmr and Nmc are compared to select criteria for

Fig. 4. Flow chart of the Nmrs calculation for a fault group pattern.

judgement of necessary spares. If Nmr is smaller than Nmc, Nmrbecomes the criteria. After then, Nmr and Nfr are compared.In this case, if Nmr and Nfr are the same, Nmrs to repair thegroup is Nmr because it means the group can be repaired ifrow spares are allocated on multifault rows in the group. If Nfris larger than Nmr, (Nmr + 1) is decided as Nmrs to repair thegroup because at least one more spare is required than Nmrto repair the group. It is not required to consider the case,where Nmr is larger than Nfr because there is no such case.Also, if Nmr and Nfc is the same, both should be consideredas criteria. Finally, after the analysis of necessary spares foreach fault group pattern, the calculated minimum number oftotal required spares is compared to the number of availablespares.

D. Solution Match

In general, a single memory fault does not need to be ana-lyzed for spare allocation because it can be repaired by a sparerow or a spare column. Therefore, it can be simply allocatedusing remaining spares after the allocation of other faults formemory repair. On the other hand, other faults should gener-ally be analyzed for an efficient allocation with a long analysistime. However, the solution match can find the solution lists ofmultiple faults without analysis for a spare allocation by faultgrouping and FGPM. The fault group pattern information forthe FGPM is already investigated during the preprocessing. Forthis reason, an additional investigation of fault group patternsis not required. For the solution match, five types of fault grouppattern information are checked: 1) the number of faults (Nf );2) Nfr; 3) Nfc; 4) Nmr; and 5) Nmc. And fault group patterns areclassified by these five types of fault group pattern informa-tion as shown in Table I. After then, solution lists of each faultgroup pattern are just read by the FGPM depending on fivetypes of fault group pattern information. It is possible because

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TABLE ICLASSIFICATION OF FAULT GROUP PATTERNS

Fig. 5. Example of solution lists depending on investigated information.

each solution list for each fault group pattern is already storedin the ATE by the solution search method before the start ofRA. The detail of solution search method will be explainedin Section III-D. According to searched solution lists of eachfault group pattern, if fault group patterns have the same fivetypes of fault group pattern information, the fault groups havethe same solution lists.

Fig. 5 shows an example of solution lists depending on theinvestigated information of fault group patterns. As shown inFig. 5, two fault groups that have different fault distributioncan have the same solution lists as these fault groups havethe same fault group pattern. Also, two different fault grouppatterns can have the same solution lists as these fault grouppatterns are the same investigated fault group pattern infor-mation: Nf , Nfr, Nfc, Nmr, and Nmc. Exact spare allocationaddresses for repair are determined easily by referring to thefault bitmap that has exact fault addresses.

This approach is applicable to fault groups that have fewerthan six faults in this paper. It is because when fault groupsthat have fewer than six faults are classified depending on thefive types of fault group pattern information, the fault groupsthat have the same five types of fault group pattern information

Fig. 6. Ratio of fault groups that have fewer than six faults.

have the same solution lists. On the other hand, fault groupsthat have more than five faults, can have different solution listswhen fault groups are classified depending on the five typesof fault group pattern information. It is the reason because asthe number of faults in a group increases, the number of faultgroup patterns increases. And it causes the classification offault group patterns by just five types of fault group patterninformation becomes difficult. However, if the solution matchis applied except for fault group patterns that can have differentsolution lists, more fault group patterns do not need to analyzeand total RA can be proceeded faster. The solution match isapplied for the fault groups that have less than 6 faults inthis paper since most of fault groups are composed of up to5 faults according to the experiments, as shown in Fig. 6.Measurement of group ratio is conducted by increasing thenumber of faults until the repair rate is approximately zerousing the VERA with given spares. As a result, the minimumratio of groups to which the solution match can be appliedis nearly 90%. This means that much analysis time can bereduced because analyses of 90% of the fault groups do notneed to be proceeded by application of the solution match.Although the number of fault groups more than or equal to6 is also small among whole fault groups, several fault groupsthat have the same five types of fault group pattern informationbut, have different solution lists are generated if the numberof faults in a group is more than or equal to 6. However, if thesolution match is applied more fault groups except for severalfault groups, the total RA time can be more reduced.

E. Solution Search

Solution search is proposed for fault group patterns thatsolution match cannot be applied. However, it can find solutionlists for each fault group pattern faster than a general search-ing tree based on cell faults, such as the VERA, because itexecutes solution search on the basis of faulty lines.

First, the reference direction of repair is selected by com-paring Nfr and Nfc in a fault group pattern. The referencedirection of repair is determined by the smaller number offaulty lines between faulty rows and faulty columns. If Nfr issmaller than Nfc, the first solution in which the fault group pat-tern is repaired by only row spares is stored in the solution listsof the fault group pattern after determining the reference direc-tion of repair. Continually, Nf in each faulty row is collectedfor executing the next steps of the solution search. Then, spare

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(a)

(b)

(c)

(d)

(e)

Fig. 7. Example of the solution search for a fault group pattern.

allocation of the faulty row, where Nf is the smallest is can-celed, and nonallocated faults are allocated by column spares.This solution is also stored in the solution lists for the faultgroup pattern. This is repeated until all faults are allocated bycolumn spares. Furthermore, if there are faulty rows that havethe same number of faults, for each solution that is generatedwhen one of the faulty rows is eliminated and nonallocatedfaults are allocated by column spares, the solution, where thenumber of used spares is the lowest is selected and stored inthe solution lists. In addition, if already stored solutions havethe same or lower number of necessary spares than that ofa new solution, the new solution may not need to be stored.However, if the number of total necessary spares of a newsolution is the same with that of solutions already stored butthe number of row spares and the number of column spares aredifferent each, the new solution should be stored because com-bination of solutions of each fault group can make differentsolutions.

An example of the solution search for finding solution listsof a fault group pattern is shown in Fig. 7. This examplehas a fault group pattern that consists of nine faults. First,the reference direction of repair is selected as row directionbecause Nfr is smaller than Nfc. And then, as there are fourfaulty rows in the fault group pattern, “row 4” is inserted in

Fig. 8. Work flow of the proposed FGPM.

the solution lists. Second, spare allocation of the last faultyrow is canceled because the last faulty row has just one fault.After then, nonallocated fault is generated and it is allocatedby column spares. In this moment, all faults in a fault grouppattern is allocated by spares, “row 3, column 1” is inserted inthe solution lists. Likewise, “row 2, column 3” is inserted inthe solution lists. Then, there are faulty rows that consist of thesame number of faults. Therefore, each case is considered byelimination of each faulty rows and allocation of nonallocatedfaults. In the example, “row 1, column 4” is inserted in thesolution lists because each case has the same number of usedspares for solutions. If the number of used spares is different,a solution that consists of fewer used spares will be storedin the solution lists. Finally, allocation of the last row spareis canceled, and all faults are allocated by column spares. Asa result, final solution lists are generated. Because it is a simplealgorithm using line-based solution search, it can achieve fastsolution search for each fault group pattern.

F. Workflow of the FGPM

Fig. 8 shows the entire workflow of the proposedFGPM. First, the location of faults is collected in the faultbitmap during the fault collection stage. Whenever a fault isdetected, the FGPM determines whether the detected fault isalready written in the fault bitmap. If not, because the detectedfault is new, the detected fault is written in the fault bitmap.Additionally, whenever a new fault is written in the faultbitmap, the must-repair conditions are checked by count offaults on each memory line. If the must-repair is found, it iswritten in certain storage and after fault collection stage therepair of must-repair is proceeded in must-repair allocationstage. If there is a must-repair, it is allocated by a requiredspare, and the available spare lists are updated. If there isno remaining must-repair, fault grouping is conducted for theremaining faults. Additionally, the Nf in each fault group isanalyzed with fault grouping. At the end of fault grouping,the first early termination condition is checked. If the numberof fault groups is larger than the number of available spares,early termination occurs. The early termination is performedbecause when the number of available spares is small and the

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memory is unrepairable, the early termination can happen ata high rate. If early termination does not occur, the proposedFGPM enters the fault group pattern investigation stage. In thisstage, each fault group is converted as a fault group pattern anda fault group pattern information is collected that will be usedfor the proposed early termination, solution match, and solu-tion search. As mentioned previously, the information list is:1) Nfr; 2) Nfc; 3) Nmr; and 4) Nmc in each fault group pattern.Because Nf in each fault group pattern is already collectedin the fault grouping stage, it is not analyzed in this stage.Then, the proposed early termination condition is checked. Ifthe condition is not met, each fault group pattern is classifieddepending on applying RA methods and the solution lists ofeach fault group pattern are written. Finally, if all solution listsof each fault group pattern are written, the final solution forthat memory is analyzed in the solution tree construction stage.The final solution for the memory is found as the solution treeis constructed. A solution is selected for each fault group pat-tern, and the selected solution for each fault group patterngenerates a stem of the solution tree. The proposed FGPMexplores along a stem of the solution tree and compares it toavailable spares. If an explored stem of the solution tree can beapplied to the memory with available spares as a final solutionfor the memory, the proposed FGPM decides the stem of thesolution tree as a final solution for the memory and finishesthe RA. If an optimal solution is required, the proposed FGPMis executed until exploration of the last stem of the solutiontree. Also, if all explored stems of the solution tree cannot beapplied to the memory with available spares as a final solu-tion for the memory, the memory is judged as unrepairablememory.

IV. EXPERIMENTAL RESULTS

To estimate the performance of the proposed FGPM, allexperiments are developed in C language. And a 1024 ×1024 memory is used because, although the memory blocksizes are varied, the trend of the experimental results isnearly identical. For a fair comparison, various fault distribu-tion is considered [26]–[30]. Among these fault distributions,Polya-Eggenberger [26] distribution is applied because it isclose to realistic fault distribution. And then, each experimentper fault distribution is proceeded 10 000 times, and averagevalues are calculated for a fair comparison. Additionally, allexperiments are proceeded with various number of faults andspares.

A. Analysis of Early Termination Occurrence Rate

Table II shows the experimental results of early terminationof the previous works and the proposed one. In the experi-ments, the memory with three row spares and three columnspares is used. As shown in Table II, the early termination ofLRM cannot happen well until the number of faults is 19. It isbecause that the number of faults is smaller than 2 × Ra × Caand the number of generated orthogonal faults can be too smallcompared to the number of total generated faults. However, theearly termination of LRM always happen when the number offaults is larger than 18 due to that the number of faults is

larger than 2 × Rs × Cs. On the other hand, the early ter-mination of VERA happens more frequently than LRM whenthe number of faults is small. It is because the early termina-tion of VERA considers the number of fault groups differentwith LRM. When the number of faults is small, as most offault groups consist of a single fault, the early termination canhappen likely. However, if the number of faults is large, it isdifficult to happen the early termination of VERA. The rea-son for this is that since as the number of faults in a groupincreases, there are a lot of fault groups that need more thanone spare but, the early termination of VERA just considersthe number of fault groups by recognizing as the minimumnumber of necessary spares for a group is just one. However,in the case of the proposed early termination, the minimumnumber of necessary spares per fault groups can be calculatedapproximately. Therefore, the proposed early termination canhappen more frequently regardless of the number of faults.Additionally, to clarify the improvement of proposed earlytermination compared to early termination of VERA, addi-tional experiments are performed. For effective analysis of theproposed early termination performance, each experiment wasconducted by increasing the number of faults until most of thememory cannot be repaired with the given spares. For exam-ple, the early termination rate of a memory with three rowspares and three column spares was measured from a faultcount of 7 to a fault count of 14. The early termination rateof a memory with four row spares and four column spareswas measured from a fault count of 9 to a fault count of 18.In addition, to verify the improvement of the proposed earlytermination, the normalized rate of the proposed early termi-nation occurrence was calculated by comparison to the earlytermination occurrence of the VERA, as shown in Fig. 10.First, Fig. 9 shows that the proposed early termination occurswith a high rate. The proposed early termination occurs witha nearly 100% rate when the number of spares is small. Onthe other hand, as the number of spares increases, the occur-rence rate of the proposed early termination looks dwindling.However, this is a reasonable result because as the numberof spares increases, the combination of spares that cannot beconsidered by specific early termination conditions increases.Additionally, according to the number of faults, occurrencerate of the proposed early termination increases and thendecreases in the experiments. It is because when the numberof faults is small, as the increment of the number of faults ina fault group is more than that of the number of fault groups,the calculated minimum number of necessary spares per eachfault group can be inaccurate. For this reason, the occurrencerate of the proposed early termination slightly decreases whenthe number of faults is small. However, when the number offaults increases, as the increment of the number of fault groupsis more than that of the number of faults in a group, the accu-racy of calculating the minimum number of necessary sparesper each fault group increases. Also, the limited number ofincorporated redundancy can affect increases of the proposedearly termination occurrence rate. Because although the cal-culated minimum number of spares per each fault group isinaccurate, if the number of spares are smaller than that, theearly termination can happen. Therefore, when the number

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Fig. 9. Proposed early termination occurrence rate.

Fig. 10. Normalized early termination rate of the proposed early termination compared to the VERA algorithm.

of faults is large, the occurrence rate of the proposed earlytermination increases again.

In other words, the proposed early termination follows gen-eral tendency of early termination. However, Fig. 10 showsthat as the number of spares increases, the proposed earlytermination occurrence rate increases compared to that of theVERA. Therefore, the effect of the proposed early terminationactually increases as the number of spares increases.

B. Analysis of Repair Rate

In the proposed FGPM, each fault group is analyzed to findrepair solutions independently. However, because all repaircases can be considered, the proposed FGPM can achievea 100% normalized repair rate. A 100% normalized repairrate achievement of the proposed FGPM can be verified bycomparison the repair rate of the proposed FGPM and therepair rate of an RA that has a 100% normalized repair rate.For the demonstration of 100% normalized repair rate, theCRESTA was used because it is known to be the BIRA witha 100% normalized repair rate. Each parallel analyzer of theCRESTA considers all spare allocations whenever a new faultis detected. Therefore, although the CRESTA is the BIRA, it isappropriate for comparison of repair rate because of its 100%normalized repair rate. Table III shows the repair rates of theproposed FGPM and the CRESTA depending on the num-ber of faults when the number of row spares is four and fiveand the number of column spares is four and five. As shownin Table III, the CRESTA and the proposed FGPM have thesame repair rate for each number of faults. This means theproposed FGPM can achieve a 100% normalized repair ratelike the CRESTA.

C. Analysis of RA Speed

Analysis speed is an important consideration for an effec-tive ATE-based RA. To verify fast analysis speed of the

TABLE IIEARLY TERMINATION COMPARISON (Rs = Cs = 3)

proposed FGPM, the VERA was applied to memories forcomparison and each experiment was conducted without gen-eration of early termination. The VERA is the ATE-basedRA that has the fastest analysis speed with a 100% normalizedrepair rate. Measurement of analysis speed for each experi-ment was performed by increasing the number of faults withgiven spares. Fig. 11 shows the analysis speed of the proposedFGPM compared to the analysis speed of the VERA depend-ing on the number of faults. As shown in Fig. 11, if theanalysis speed of the VERA is one, the analysis speed ofthe proposed FGPM is expressed as a rate compared to theVERA for analysis of the same fault lists for effective com-parison. Fig. 11 shows that as the number of faults increases,the analysis speed of the proposed FGPM increases. In addi-tion, the analysis speed of the proposed FGPM follows thetendency regardless of the number of spares, because as thenumber of total faults increases, the number of faults in

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Fig. 11. Comparison of analysis time without early termination.

TABLE IIIREPAIR RATE COMPARISON

a group increases, which increases analysis time. Additionally,as the number of spares increases, the analysis speed ofthe proposed FGPM increases, because as the number ofspares increases, the number of groups that are requiredfor repair analysis increases. Therefore, as the number offaults and spares increases, the proposed FGPM is moreeffective.

D. Preprocessing Time Check

To apply the proposed FGPM, additional fault group pat-tern analysis is required for a fault group pattern investigation.For this reason, it is inevitable to require additional analysistime. Table IV shows the added preprocessing time rate of theproposed FGPM compared to the VERA and preprocessingtime ratio in total RA time. As shown in Table IV, the addedpreprocessing time rate is smaller than 10%. Furthermore, thepreprocessing time ratio to total RA time is less than 10%.This means the added preprocessing time affects the totalRA time very little. In addition, Fig. 11 shows the RA time thatalready includes the increase in preprocessing time. Therefore,the proposed FGPM is a powerful RA algorithm based onthe ATE.

TABLE IVPREPROCESSING TIME ANALYSIS

V. CONCLUSION

Because of yield loss by the increase of fault occurrence inmemory, RA methodology is widely used. However, repairrate has been one of the most important challenges withthe increasing number of faults in memory and diversifica-tion of fault group patterns. In addition, analysis speed hasbeen an important factor because it is directly related to cost.For this reason, the FGPM is proposed to solve these prob-lems. It is proposed with a new early termination scheme; theproposed early termination can significantly reduce unneces-sary RA. Furthermore, it can significantly reduce analysis timewith a 100% normalized repair rate by solution match andsolution search. Therefore, it is a powerful RA methodologyfor repair.

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Hayoung Lee received the B.S. degree in elec-trical and electronics engineering from YonseiUniversity, Seoul, South Korea, in 2016, where heis currently pursuing the combined Ph.D. degreewith the Department of Electrical and ElectronicsEngineering.

His current research interests include built-in self-repair, built-in self-testing, built-in redundancy anal-ysis, redundancy analysis algorithms, reliability, andvery large scale integration design.

Kiwon Cho received the B.S. degree in electricaland electronic engineering from the Departmentof Electrical and Electronics Engineering, YonseiUniversity, Seoul, South Korea, in 2013, where heis currently pursuing the combined Ph.D. degree.

His current research interests include built-in self-repair, built-in self-testing, built-in redundancy anal-ysis, redundancy analysis algorithms, reliability, andvery large scale integration design.

Donghyun Kim received the B.S. degree in elec-trical and electronics engineering from Kyung HeeUniversity, Seoul, South Korea, in 2006, where heis currently pursuing the combined M.S. degreewith the Department of Electrical and ElectronicsEngineering.

His current research interests include built-in self-repair, built-in self-testing, built-in redundancy anal-ysis, redundancy analysis algorithms, reliability, andvery large scale integration design.

Sungho Kang (M’89–SM’15) received the B.S.degree in control and instrumentation engineeringfrom Seoul National University, Seoul, South Korea,in 1986, and the M.S. and Ph.D. degrees in electricaland computer engineering from the University ofTexas at Austin, Austin, TX, USA, in 1988 and1992, respectively.

He was a Research Scientist with theSchlumberger Laboratory for Computer Science,Schlumberger Inc., Austin, TX, USA, and a SeniorStaff Engineer with Semiconductor Systems Design

Technology, Motorola Inc., Austin, TX, USA. Since 1994, he has beena Professor with the Department of Electrical and Electronic Engineering,Yonsei University, Seoul, South Korea. His current research interestsinclude very large scale integration design/system-on-a-chip design andtesting, design for testability, design for manufacturability, and fault tolerantcomputing.


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