Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Feedback
CHAPTER 8
1
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Outline
2
1. General Consideration
2. Feedback Topologies
3. Effect of Loading
4. Effect of Feedback on Noise
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
General Consideration
• H(s) : Feedforward network (Represents an amplifier)
• G(s) : Feedback network (β, feedback factor, freq. independent)
• X(s) – G(s)Y(s) : The input to H(s), also called feedback error
• H(s) : open loop transfer function
• Y(s)/X(s) : closed loop transfer function
3
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X s G s H s
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
General Consideration
• In a well designed negative feedback system, the error term is minimized, making the output G(s) an accurate copy of the input.
• Input of H(s) as “virtual ground”.
• Four elements in the feedback system – The feedforward amplifier.
– A means of sensing the output.
– The feedback network.
– A means of generating the feedback error.
4
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Properties of Feedback Circuits
• Gain Degeneration
• Terminal Impedance Modification
• Bandwidth Modification
• Nonlinearity Reduction
5
Analog IC Analysis and Design 8- Chih-Cheng Hsieh 6
1. Desensitize the gain : • make gain less sensitive to variations.
2. Reduce nonlinear distortion : • make gain independent of signal level.
3. Reduce effect of noise : • minimize unwanted signal contribution to output.
4. Control the input and output impedance : • use feedback to control impedance.
5. Extend bandwidth of the amplifier.
Negative Feedback properties :
The basic idea of negative feedback is to trade off gain for other desirable properties, like increased input impedance, extended bandwidth… etc.
Properties of Feedback Circuits
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Terminologies
7
Signal-flow diagram
1. Open-loop Gain : 2. Feedback Factor : 3. Loop Gain : 4. Amount of Feedback : 5. Closed-Loop Gain :
A
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1. Af is almost determined by β and independent of A, that is, the process variation. 2. β can be implemented by passive component and accurate, predictable, stable. 3. xi : negative feedback reduces the input signal of the basic Amp by (1+Aβ )
Comparison circuit (Mixer)
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Gain Desensitization
• Gain desensitization
Compared to gm1 ro1, this gain can be controlled with much higher accuracy
because it is given by the ratio of two capacitors – gain desensitization.
8
Poor definition of the gain : both gm1 and ro1 vary with process and temperature.
For the CS amplifier with feedback (C1 & C2)
The overall voltage gain of the circuit at low freq. such that C2 does not load the output node
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Gain Desensitization
• In a feedback system, the closed-loop gain is much less sensitive to device parameters than the open-loop gain is.
• The closed loop gain varies by a small percentage even if the open loop gain A varies a lot if the loop gain (βA) >> 1.
• The higher the loop gain (βA), the less sensitive Y/X will be to variations in A. – We begin with a high-gain amplifier and apply feedback to obtain a low, but
less sensitive closed-loop gain.
9
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Loop Gain
• Calculation of loop gain – Set the main input to zero.
– Break the loop at some point.
– Inject a test signal in the right direction.
– Obtain the value that returns to the break point.
10
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
• The input resistance without feedback
• Consider the input resistance with feedback, as
• The Loop gain
Input Impedance Modification
• Common gate circuit with feedback (capacitive voltage divider).
11
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Loop Gain
• The feedforward amplifier : M1 and RD (A= )
• Output sensed by C1 and C2.
• The feedback network : C1, C2 and M2 (β= )
• The subtraction occurs in the current domain at the input terminal.
• Loop gain =
12
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Output Impedance Modification
• Common source stage with feedback.
• Common source stage: M1, RS and RD.
• Feedback network sense the Vout, returning a current equal to
• To find the output resistance at relatively low frequencies
13
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Bandwidth Modification
• Suppose the feedforward amplifier has a one-pole transfer function
• The transfer function of the closed loop system is
• The -3dB bandwidth has increased by a factor , albeit at the cost of a proportional reduction in the gain.
• If A is large, the closed loop gain remains approximately equal to
14
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Bandwidth Modification Example
• Suppose we need to amplify a 20-MHz square wave by a factor of 100 and maximum bandwidth but we have only a single-pole amplifier with an open loop gain of 100 and -3 dB bandwidth of 10 MHz.
(a) With open-loop amplifier, the risetime and falltime is long:
(b) Placing two of the amplifiers with feedback in cascade to achieve the same gain. The power dissipation is doubled.
15
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3
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Types of Amplifiers • Circuits sensing a voltage must exhibit a high Zin (as a voltmeter),
circuits sensing a current must provide a low Zin ( as a current meter).
• Circuits generating a voltage must exhibit a low Zout (as a voltage source), circuits generating a current must provide a high Zout (as a current source).
16
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Amplifiers with Improved Performance
• The basic circuits may not provide adequate performance in many applications.
• Use modified circuits to alter the output impedance or increase the gain.
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Sense and Return Mechanisms
• Four type of feedback : voltage-voltage (series-shunt), voltage-current (shunt-shunt), current-current (shunt-series), and current voltage (series-series).
• The first entry in each case denotes the quantity sensed at the output and the second the type of signal returned to the input.
• To sense a current, a current meter is inserted in series with the signal.
• The addition of the feedback signal and the input signal can be performed in the voltage domain or current domain.
18
Sensing a voltage by a voltmeter
Sensing a current by a current meter
Sensing a current by a small resistor
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Return Mechanisms
• To add two quantities, we place them in series if they are voltages and in parallel if they are current.
• The feedback network in reality introduces loading effects that must be taken into account.
19
Voltage mode addition
Current mode addition
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Practical Examples
• Voltage can be sensed by a resistive / capacitive divider in parallel with the port.
• A current can be sensed by placing a resistor in series with the wire and sensing the voltage across it.
• To subtract two voltages, a differential pair or a single transistor can be used.
20
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Sense and Return Mechanism
• Subtraction of currents can be accomplished as follows.
• In summary
– For voltage subtraction, the input and feedback signals are applied to two distinct nodes.
– For current subtraction, they are applied to a single node.
– It help to identify the type of feedback
21
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Outline
22
1. General Consideration
2. Feedback Topologies
3. Effect of Loading
4. Effect of Feedback on Noise
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Voltage-Voltage (V-V) Feedback
• Voltage-voltage feedback (series - shunt)
– samples the output voltage and returns the feedback signal as a voltage.
• The feedback network is connected in parallel with the output and in series with the input port.
• An ideal feedback network in this case exhibits infinite input impedance and zero output impedance.
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Effect of V-V Feedback on Rout
• If the amplifier is loaded by a resistor RL
– Consider a voltage amplifier without feedback (open-loop configuration), the output would drop in proportional to
– Consider a feedback amplifier, if loop gain remains much greater than unity
– The circuit stabilizes the output voltage amplitude despite load variations, it behaves as a voltage source, thus exhibiting a low output impedance.
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Effect of V-V Feedback on Rin
• For the open loop Amp, the Rin of the FF Amp sustains the entire Vin.
• For the closed loop Amp, the Rin of the FF Amp sustains only a fraction of Vin .
• The I(Rin) in the FB topology is less than that in the open-loop system.
• Returning a voltage quantity to the input increases the input impedance.
25
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Current-Voltage (I-V) Feedback
• Sense the output current to perform feedback. (series – series)
• The current is usually sensed by placing a small resistor in series with the output and using the voltage across the resistor as the feedback information.
• The feedback factor β (RF) .
• An ideal FB network in this case exhibits zero input and output impedance .
• The loop gain = Gm RF.
26
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Rin/Rout of I-V Feedback Amplifier
• Output resistance of a current-voltage feedback amplifier
• Input resistance of a current-voltage feedback amplifier
27
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Voltage-Current (V-I) Feedback
• The output voltage is sensed and a proportional current is returned to the summing point at the input. (shunt – shunt)
• The feedforward path incorporates a transimpedance amplifier with gain R0 .
• The feedback factor has a dimension of conductance.
• The feedback network ideally exhibiting infinite input and output impedance.
• The Loop gain : gmFR0
28
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Rin/Rout of V-I Feedback Amplifier • Rin of a voltage-current feedback amplifier.
• The Rin of R0 is placed in series because an ideal transimpedance amplifier exhibits a zero input impedance.
• Output impedance of a voltage-current feedback amplifier.
29
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Current-Current (I-I) Feedback
• The feedforward amplifier is characterized by a current gain AI . (shunt – series)
• The feedback network by a current ratio β.
• The closed loop current gain is
• The input resistance is
• The output resistance is
30
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Outline
31
1. General Consideration
2. Feedback Topologies
3. Effect of Loading
4. Effect of Feedback on Noise
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Two-Port Network Models
32
For voltage-voltage feedback (G)
For voltage-current feedback (Y) For current-voltage feedback (Z)
For current-current feedback (H)
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Loading in V-V Feedback
• If A0 is large, the signal amplified by A0 is much greater than the contribution of G12I2.
33
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Loading in a V-V Feedback Circuit
• If we define the open-loop gain in the presence of loading as
34
• The finite input and output impedances of the feedback network reduces the output voltage and the voltages seen by the input of the main amplifier.
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• G11 is obtained by leaving the output of the feedback network open.
• G22 is calculated by shorting the input of the feedback network.
• Consider the loading effect
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Example of V-V Feedback
35
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Loading in I-V Feedback
• Replacing the feedback network by a Z model, and neglect the source Z12I2
• The loaded open loop gain is equal to
36
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Loading in V-I Feedback
• Replacing the feedback network by a Y model, and neglect the source Y12V2
• The loaded open loop gain is equal to
37
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Example of V-I Feedabck
38
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Loading in I-I Feedback
• Replacing feedback network by an H model. Neglecting the effect of H12 V2
• The loaded open loop gain is equal to
39
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Summary of Loading Effects • The analysis is carried out in three steps
– Open the loop with proper loading and calculate the open-loop gain AOL, and the open-loop input and output impedances.
– Determine the feedback ratio β and hence the loop gain βAOL.
– Calculate the closed-loop gain and input and output impedances by scaling the open loop values by a factor of 1+ βAOL
40
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Outline
41
1. General Consideration
2. Feedback Topologies
3. Effect of Loading
4. Effect of Feedback on Noise
Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Effect of Feedback on Noise
• Feedback does not improve the noise performance of circuits.
• Assume the open-loop voltage amplifier A1 is characterized by only an input-referred noise voltage and the feedback network is noiseless.
• In practice, the feedback network itself may contain resistors or transistors, degrading the overall noise performance.
42
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Analog IC Analysis and Design 8- Chih-Cheng Hsieh
Effect of Feedback on Noise
• As
43
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