Abstract -- The virtual source (VS) compact model has beenshown in the literature to describe nano-scale MOSFETs quitewell. It is therefore an attractive alternative to sophisticated andcomplicated established compact models due to its small num-ber of model parameters. The latter can also fairly easily be de-termined from the electrical characteristics of a single transistorstructure. In this paper, VS model has been modified with thegoal of enabling a circuit and system simulation based compari-son of diverse emerging FET technologies. Examples for the ap-plication of the extended more flexible X-VS model toexperimental data of a Si MOSFET, a InGaAS HFET and a car-bon nanotube (CNT) FET are shown.

Keywords: Carbon nanotube, CNTFET, field-effect transis-tor, linearity, quantum capacitance limit, semiclassical trans-port, Schottky barrier.

1 INTRODUCTION

The end of bulk silicon-based transistor technology has of-ten been predicted in the scientific and technical literature[1]. As a result, many new channel materials (such as III-Vsemiconductors, 2D materials, nanowires and -tubes) and de-vice concepts (such as FinFETs, nanosheets, lateral or verti-cal nanowires and -tubes) have been explored and suggestedto replace silicon-based MOSFETs. However, for evaluatingthe pros and cons of these large number of alternatives in ap-plications under realistic conditions, comparisons at the cir-cuit level are needed. Therefore, a simple and versatilecompact model is required that also provides an intuitive un-derstanding of its material and device structure related pa-rameters. The model should have an as low as possiblenumber of parameters to facilitate an easy and quick parame-ter extraction since most of these new technologies are notmature and often characteristics of only a few or even a sin-gle fabricated device are available that do not allow the ex-traction of parameters for sophisticated compact models likeBSIM.

These modeling challenges are addressed by the extendedVirtual Source (X-VS) compact model presented in this pa-per.

2 X-VS COMPACT MODEL

The equivalent circuit of the X-VS compact model in Fig. 1

can be devided into an internal and external portion. The lat-ter comprises finger and metallization represented by the re-sistances Rsf, Rdf, Rg and the parasitic capacitances Cgs,par,Cgd,par and Cds,par. The internal portion consists of the sourceand drain related contact resistances Rsc and Rdc as well as anonlinear transfer current source Ivs and nonlinear mobilecharges Qs and Qd. The equations for the latter ones are basedon the Virtual Source compact model [2] but augmented herewith new material and structure related formulations as wellas a few fitting parameters, that enable its application to a di-verse set of process technologies. The model equations of theX-VS model are summarized below along with hints towardsthe physical meaning of the modifications and their parame-ters. Model parameters are indicated by bold faced letters.

Fig. 1: Large signal equivalent circuit for the X-VS compactmodel

The nonlinear transfer current source is given by

(1)

where Wg is the total gate width. Qix0 is the channel chargeper unit area and vx0 is the carrier velocity at the virtualsource point x0. The channel charge is given by

(2)

where VT = kBT/q is the thermal voltage, nss is thesubthreshold slope factor and the threshold voltage Vth isgiven by

Ivs WgQix0vx0Fds=

Qix0

Cchnss= VT 1 fdeg

Vgisi Vth αVTFf+–

nssVT

-------------------------------------------------

exp+ln

Flexible virtual source compact model for efficient modeling of emerging channel materials and device architectures

S. Mothes1, F. Wolf1, M. Schröter1,2

1Chair for Electron Devices and Integrated Circuits, TU Dresden, Germany2ECE Dept., University of California, San Diego, USA

244 TechConnect Briefs 2018, TechConnect.org, ISBN 978-0-9988782-5-6

(3)

with the DIBL factor δ. The function

(4)

is of Fermi type and allows a smooth reduction of thethreshold voltage in eq. (2) by αVT from the subthreshold tothe strong inversion region in MOSFETs. α is a fittingfactor and Vth0 a model parameter.

A possible degradation of the channel charge in eq. (2)with large vertical electrical fields (i.e. large gate voltages)is taken into account by the factor

, (5)

where γ>0 is a fitting parameter and Vg,eff is given by

(6)

Fig. 2 displays the behavior of fdeg as a function of Vgisi. Theoriginal VS-model [2] is recovered by fdeg = 1 whichswitches off this effect.

Fig. 2: Fitting function fdeg for different γ, Vth=0.2V, nss=1,α=3.5.

The channel material may consist of either a bulk semi-conductor or a certain number nt of tubes/wires or fins of aFINFET per gate width Wg given by the tube/wire/fin densi-ty ρt=nt/Wg.

In the original VS model the channel capacitance Cch is amodel parameter which describes the inversion capacitanceof the MOSFET. However, the X-VS compact model uses aseries combination of the quantum capacitance Cq and theoxide capacitance Cox to model Cch:

(7)

In case of one-dimensional channels, Cq is given by thetube/wire/fin quantum capacitance Cq,t multiplied with the

tube/wire/fin density ρt.Different device architectures (see Fig. 3) are being han-

dled by the availability of the corresponding formulationsfor the oxide capacitance. For bulk semiconductorsCox=εoxε0/tox. For nanotube and -wires with radius rsemi theoxide capacitance depends, among others, on the gategeometry. For gate-all-around structures one obtains

(8)

with h=tox+rsemi. A single planar gate can be modeled with

, (9)

which includes the impact of screening effects betweentubes or wires. Finally, for FinFETs with U=Wfin+2*Hfin asthe effective channel width per fin

. (10)

Fig. 3: Schematic cross sections of the different devicearchitectures.

The drain voltage dependence of Ivs in eq. (1) is de-scribed by the function

, (11)

where

(12)

represents the velocity-field dependence of carriers in thechannel and

(13)

accounts for channel length modulation (i.e. Early effect)and thus a finite output conductance. For Vdisi>>Vd,sat eq.(13) reduces to Fa=1+(Vdisi-Vd,sat)/Va, otherwise Fa~1. The

Vth Vth0 δVdisi–=

Ff 1Vgisi Vth αVT 2⁄+–

αVT

--------------------------------------------------

exp+

1–

=

fdeg 1=1

γVg,eff

----------------– exp–

Vg,eff nssVT 1Vgisi Vth αVTFf+–

nssVT

-------------------------------------------------

exp+ln=

Cch

CoxCq

Cox Cq+-----------------------=

Cox

2πεoxε0ρt

h rsemi⁄( )ln------------------------------=

Cox

2πεoxε0ρt

πρt h h2 rsemi

2–+

sinh

πρtrsemi

---------------------------------------------------------------------

ln

---------------------------------------------------------------------------------=

Cox

εoxε0Uρt

tox

------------------------=

Fds FsFaFd=

Fs

Vdisi Vd,sat⁄

1 Vdisi Vd,sat⁄( )β+[ ]

1 β⁄-------------------------------------------------------------=

Fa 1VT

Va

------- 1Vdisi Vd,sat–

VT

-------------------------------

exp+

ln+=

Informatics, Electronics and Microsystems: TechConnect Briefs 2018 245

original VS model with Fa=1 is recovered by an infinite Va.The possible influence of source/drain Schottky barriers on

the drain current characteristics is taken into account by theempirical function

(14)

which can be used to model s-shaped output characteristics.The saturation voltage in eq. (12) and eq. (13) is given by

(15)

with

. (16)

The apparent mobility μapp is calculated according to Mat-thiessen’s rule

, (17)

from the ballistic mobility

(18)

and the effective scattering related mobility

. (19)

The virtual source velocity vx0 in eq. (1) and eq. (16) is givenby

. (20)

with the model parameter vball as the ballistic carrier velocityand Lfl as the critical length defined by the distance overwhich the electric potential drops by VT from the virtualsource point. For ballistic transport (Lch<<λ0 and Lfl<<λ0)Vd,sat,s reduces to 2VT. This leads to very large values of thechannel resistance for Vdisi<Vd,sat,s. In order to increase thesaturation voltage Vd,sat in eq. (16), the following formulationis used

. (21)

The original VS model can be recovered without changingthe saturation voltage, i.e. setting pqcl=0.

In the ballistic regime the implemented model equationscan limit the output conductance and transconductance to thetheoretical maximum values expected for the transistor oper-ating in the quantum capacitance limited regime. For

Vgisi>>Vth, Ff=0 and if additionally Vd,sat,q>>2VT one getsVd,sat~Vd,sat,q. For ballistic transport (pqcl=1) in the linear re-gion (Vdisi<<Vd,sat) Fds~Vdisi/Vd,sat and thus Ivs~WgCchvball-Vdisi. In quantum capacitance limit operation, where Cox>>Cqone gets Cch=Cq and thus, one can write the output conduc-tance as gds=WgCqvball. For CNTFETs, the quantum capaci-tance for Vgisi>>Vth can be written as Cq,t=4q2/(hvball) [3].Then one gets gds = 2ntg0, where nt=Wgρt is the number ofnanotubes in the channel and g0=2q2/h is the quantum con-ductance (the additional factor 2 accounts for the two degen-erate bands in the CNT channel).

Assuming the same conditions in saturation (Vdisi>>Vd,sat)one can show that the transconductance approaches the theo-retical limit of gm = 2ntg0.

The charge model for Qs and Qd is based on [4],

, (22)

where the drift-diffusion charge components are given by [5]

(23)

and

(24)

with

, (25)

The function

(26)

with

, (27)

represents the field dependence of the channel charge similarto eq. (12) and eq. (15). The fitting parameter fb can be usedto adjust the saturation voltage for the charge. The channelcharge is given by

. (28)

The ballistic charge in eq. (22) is given by [4]

(29)

and

Fd 1Vdisi Vth,d–

ndVT

-------------------------------–

exp+1–

=

Vd,sat Vd,sat,s Vd,sat,q+( ) 1 Ff–( ) VTFf+=

Vd,sat,s

vx0Lch

μapp

-----------------=

μapp1– μball

1– μeff1–

+=

μball

vballLch

2VT

---------------------=

μeff

vballλ0

2VT

------------------=

vx0 vball

λ0

λ0 2Lfl+-----------------------

=

Vd,sat,q

pqclQix0Cch

---------------------=

Qs/d Qs/d,dd 1 Fsat,b–( )2Qs/d,ballFsat,b

2+=

Qs,dd Qch6 12η 8η2 4η3+ + +

15 1 η+( )2----------------------------------------------------=

Qd,dd Qch4 8η 12η2 6η3+ + +

15 1 η+( )2----------------------------------------------------=

η 1 Fsat,b–=

Fsat,b fbVdisi Vsat,b⁄

1 Vdisi Vsat,b⁄( )βch

+1 βch⁄

---------------------------------------------------------------------=

Vsat,b Ff αVT( )2Qix0 Cch⁄( )2

+=

Qch WgLchQix0=

Qs,ball Qch

sinh1–kq

kq

--------------------------kq 1+ 1–

kq

----------------------------–=

246 TechConnect Briefs 2018, TechConnect.org, ISBN 978-0-9988782-5-6

(30)

with

. (31)

which represents the ratio of electric field related energy tokinetic carrier energy at the virtual source.

3 APPLICATION

The new X-VS model has been applied to both experi-mental and TCAD generated data of a variety of devicestructures with different channel materials. The correspond-ing model parameter values are listed in Table 1.

Fig. 4 displays the comparison to measurements of a car-bon nanotube (CNT) FET [6]. Here, the formulation of thetransconductance behavior still needs some improvement.This also applies to highly linear CNTFETs which cannotbe described with the present model formulations.

As shown in Fig. 5, good agreement with measurementsof a 120nm channel length bulk Si-MOSFET has been ob-tained for both drain current, transconductance and transitfrequency. The comparison to measurements of a 200nm In-GaAs nanowire FET [7] in Fig. 6 also exhibits quite goodagreement.

Additional devices with smaller channel lengths and fromdifferent technologies with carrier transport ranging fromballistic to diffusive have been modeled and will be shownelsewhere. In all cases, after adding capacitive and resistiveparasitics from the metalization, at least satisfactory agree-ment has been obtained using the same compact modelframework. This enables the exploration of device and cir-cuit performance under realistic conditions and a fair tech-nology comparison especially in terms of circuit design.

Table 1 X-VS-CM parameters for FETs from differenttechnologies. Calculated parameters (from devicephysics) are indicated in italic. ACKNOWLEDGMENTS

The authors are partially indebted to the Center for Ad-vancing Electronics Dresden (CfAED) and the German Na-tional Science Foundation (DFG SCHR695/6, CL384/2) forfinancial support.

REFERENCES

[1] H. Iwai, “Future of nano CMOS technology,” Solid-StateElectronics, vol. 112, pp. 56–67, oct 2015.

[2] A. Khakifirooz, O. M. Nayfeh, and D. Antoniadis, “A simplesemiempirical short-channel MOSFET current–voltage modelcontinuous across all regions of operation and employing onlyphysical parameters,” IEEE Trans. on Electron Dev., vol. 56,

Parameter Si InGaAs CNT

FETtype bulk FinFET TG-nano-tube

Wg/μm 84 14 20

Lch/nm 120 200 100

ρt/μm-1 - 14.3 40

rsemi/nm - - 0.75

U/nm - 33 -

Vth0/V 0.63 0.162 0.22

Qd,ball Qch

kq 1+ 1–

kq

----------------------------=

kq

2qVdisi

m0meffvx02

---------------------------=

nss 1.46 1.33 3.88

α 3.5 3.5 3.5

δ 0.068 0.053 0.2886

γ/V-1 0.4 0.73 0.453

tox/nm 3.15 2.33 3

εox 3.9 3.9 9

Cox/(fF/μm2) 11 7 8.2

Cq/(fF/μm2) 3.5 36.18 3.52

Cq,t/(fF/μm) - 2.53 0.1094

Va/V 24.8 2.03 -

β 1.79 2.31 1.863

pqcl 0 0 0

vball/(cm/s) 3.48x107 3.68x107 3.31x107

λ0/nm 55.2 30.1 28.64

Lfl/nm 3.31 20 23.58

Vth,d/V - - 0.3

nd - - 5.165

βch 1.73 2.3 1.863

fb 1 1 0.1

meff 0.024 0.041 0.048

Rsc/(Ωμm) 180 204 782.5

Rdc/(Ωμm) 180 204 782.5

Rsc,t/kΩ - 2.923 31.3

Rdc,t/kΩ - 2.923 31.3

Rg/Ω 12 100 140

Cgs,par/(fF/μm) 0.5 0.62 0.11

Cgd,par/(fF/μm) 0.34 0.62 0.11

Parameter Si InGaAs CNT

Informatics, Electronics and Microsystems: TechConnect Briefs 2018 247

no. 8, pp. 1674–1680, 2009.[3] S. Mothes, M. Claus and M. Schroter, “Toward Linearity in

Schottky Barrier CNTFETs”, IEEE Transactions onNanotechnology, vol. 14, pp. 372–378, 2015.

[4] L. Wei, O. Mysore and D. Antoniadis, “Virtual-Source-BasedSelf-Consistent Current and Charge FET Models: From Ballisticto Drift-Diffusion Velocity-Saturation Operation”, IEEE Trans.on Electron Dev., vol. 59, pp. 1263–1271, 2012.

[5] Y. Tsividis, “Operation and Modelling of the MOS transistor”,Boston, MA,McGraw-Hill, 1999

[6] Y. Cao, G. J. Brady, H. Gui, C. Rutherglen, M. S. Arnold, and C.Zhou, “Radio frequency transistors using aligned semiconductingcarbon nanotubes with current-gain cutoff frequency andmaximum oscillation frequency simultaneously greater than 70GHz,” ACS nano, vol. 10, no. 7, pp. 6782–6790, 2016.

[7] C. B. Zota, G. Roll, L.-E. Wernersson, and E. Lind, “Radio-frequency characterization of selectively regrown InGaAs lateralnanowire MOSFETs,” IEEE Trans. on Electron Dev., vol. 61, no.12, pp. 4078–4083, 2014

Fig. 4: Characteristics of a 100 nm MT-CNTFET [6] incomparison with the X-VS CM: (a) transfercharacteristics (Vds = -1.5V), (b) output characteristics(Vgs/V = 0, -0.4, -1.2, -2), (c) transconductance (Vds =-1.5V), (d) output conductance (Vgs/V = 0, -0.4, -1.2, -2), (e) and (f) transit frequency and maximumoscillation frequency (measurement at Vds = -1.5V andVgs =-1.2V, simulations at Vds/V = -0.5, -1, -1.5).

Fig. 5: Characteristics of a 120 nm bulk MOSFET incomparison with the X-VS CM: (a) transfercharacteristic (Vds/V = 0.05, 1.5), (b) outputcharacteristics (Vgs/V = 0.3...1.5), (c) transconductance(Vds/V = 0.05, 1.5), and (d) transit frequency (Vds =1V).

Fig. 6: Characteristics of a 200 nm InGaAs FET [7] incomparison with the X-VS CM: (a) transfercharacteristic (Vds/V = 0.05, 0.5), (b) outputcharacteristic (Vgs/V =0.2...1), (c) transconductance(Vds/V = 0.05, 0.5), and (d) output conductance (Vgs/V= 0.2... 1).

(b)(a)

(d)(c)

(f)(e)

(b)(a)

(d)(c)

(b)(a)

(d)(c)

248 TechConnect Briefs 2018, TechConnect.org, ISBN 978-0-9988782-5-6