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Foundry Services: MOSIS as a model

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Stanford. HP. MIT. Startup X. UCB. users. Information. vendors. Chips. Mask maker. Dicing and packaging. Orbit 2um. HP 0.5um. Foundry Services: MOSIS as a model. MOSIS: MOS implementation service, ISI, 1980. MOSIS. $$$$$. Foundry Services and Standard Processes. - PowerPoint PPT Presentation
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ksjp, 7/01 MEMS Design & Fab Foundry Services: MOSIS as a model MOSIS: MOS implementation service, ISI, 1980. UCB HP Stanford Startup X MIT users Mask maker Orbit 2um HP 0.5um Dicing and packaging vendors Chips Information $$$$$ MOSIS
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Page 1: Foundry Services: MOSIS as a model

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MEMS Design & Fab

Foundry Services: MOSIS as a model

• MOSIS: MOS implementation service, ISI, 1980.

UCB

HP StanfordStartup XMIT

users

Maskmaker Orbit

2um HP0.5um

Dicing and packaging

vendors Chips

Information$$$$$MOSIS

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MEMS Design & Fab

Foundry Services and Standard Processes

• MCNC/MUMPS (now by Cronos)• 3 level poly, no electronics• started in 1992, now 6 runs per year

• LIGAMUMPS• single level metal, no electronics

• Sandia• 5 level poly, no electronics• 1 level poly w/ quality CMOS

• CMOS + post-processing• EDP, TMAH, XeF2 (Parameswaran)• Plasma (Fedder)

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MEMS Design & Fab

MUMPS process flow

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MEMS Design & Fab

MUMPS process flow

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MEMS Design & Fab

MUMPS process flow

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MEMS Design & Fab

MUMPS process flow

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MEMS Design & Fab

MUMPS process flow

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MEMS Design & Fab

MicroOptical Bench (Ming Wu, UCLA)

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MEMS Design & Fab

MCNC/MUMPS layer thicknesses

Material Layer Thickness (µm) Lithography Level Name

Nitride 0.6 -

Poly 0 0.5 POLY0 (HOLE0)

DIMPLEFirst Oxide 2.0

ANCHOR1

Poly 1 2.0 POLY1 (HOLE1)

POLY1_POLY2_VIASecond Oxide 0.75

ANCHOR2

Poly 2 1.5 POLY2 (HOLE2)

Metal 0.5 METAL (HOLEM)

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MEMS Design & Fab

Design “Rules”

• Guidelines for communication between fab people and design people

• Generally not enforced• MUMPS, 2um CMOS: no• HP sub-micron CMOS: yes

• Often desireable to violate• MUMPS: process exploration, new devices, some

previous design rule violations are now encouraged• CMOS: Parameswaran, Fedder style MEMS

depends on design rule violations

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MEMS Design & Fab

• Typically due to • lithographic resolution limits• lithographic alignment repeatability• etching capabilities

• Most important: Line/space• due to lithography or etching• varies from layer to layer• varies near topography• no guarantee of dimensions: the

lines will exist and be distinct.

Design Rules

Line width

... and spacing

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MEMS Design & Fab

Design Rules

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MEMS Design & Fab

MCNC/MUMPS Design Rules

MnemonicLevel Name

CIFLevelName

GDS LevelNumber

Nominal Line/Space(µm)

Minimum Line(µm)

Minimum Space(µm)

POLY0 CPZ 13 3.0 2.0 2.0

ANCHOR1 COF 43 3.0 3.0 2.0

DIMPLE COS 50 3.0 2.0 3.0

POLY1 CPS 45 3.0 2.0 2.0

POLY1_POLY2_VIA

COT 47 3.0 2.0 2.0

ANCHOR2 COL 52 3.0 3.0 2.0

POLY2 CPT 49 3.0 2.0 2.0

METAL CCM 51 3.0 3.0 3.0

HOLE0 CHZ 41 3.0 2.0 2.0

HOLE1 CHO 0 3.0 2.0 2.0

HOLE2 CHT 1 3.0 2.0 2.0

HOLEM CHM 48 3.0 3.0 3.0

Rules for line/space on all mask layers.

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MEMS Design & Fab

MCNC/MUMPS Design Rules

RuleRule

Letter

Rule

value

POLY1 enclose ANCHOR1 G 4.0

POLY1 enclose DIMPLE N 4.0

POLY1 enclose POLY1_POLY2_VIA H 4.0

POLY1 enclose POLY2 O 4.0

POLY1 space to ANCHOR2 K 3.0

Spacing between lateral etch holes inPOLY1

R <30

RuleRule

Letter

Rule

value

POLY0 space to ANCHOR1 A 4.0

POLY0 enclose ANCHOR1 B 4.0

POLY0 enclose POLY1 C 4.0

POLY0 enclose POLY2 D 5.0

POLY0 enclose ANCHOR2 E 5.0

POLY0 space to ANCHOR2 F 5.0

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MEMS Design & Fab

MCNC/MUMPS Design Rules

RuleRule

Letter

Rule

value

POLY2 enclose ANCHOR2 J 5.0

POLY2 enclosePOLY1_POLY2_VIA

L 4.0

POLY2 cut-in POLY1 P 5.0

POLY2 cut-out POLY1 Q 4.0

POLY2 enclose METAL M 3.0

POLY2 space to POLY1 I 3.0

HOLE2 enclose HOLE1 ? T 2.0

HOLEM enclose HOLE2 U 2.0

Spacing between lateral etch holesin POLY1

R <30

Examples for POLY2 frommems.mcnc.org/smumps/mrules

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MEMS Design & Fab

Breaking the Rules

• Sub-minimum lithography• risky, but often successful, especially in planar areas

• Breaching nitride (substrate contacts and opens)• Stack anchor1 and poly1-poly2-via• don’t include poly1• include poly2 for electrical contact to substrate, or

remove to expose bare substrate

• Double-thick poly• continuous sheet of poly1 enclosed in poly1-poly2-via• poly2 structures on top

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MEMS Design & Fab

MCNC/MUMPS access

• Cost is $3,500 per submission• 1cm2 die area per submission• 15 identical dice returned (~$2/mm2)

• Files are submitted by anonymous ftp

• Dicing, bonding, HF release are all available for additional cost

• Parameterized and static design cells are free online (CaMEL)

• Design services are available for additional cost

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MEMS Design & Fab

MCNC/MUMPS process specs

Film Thickness (Å) Residual Stress (MPa) Resistance (ohms/sq)

Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.

Nitride 5600 6000 6400 20 60 100 N/A

Poly0 4600 5000 5400 0 -10 -20 20 30 40

Oxide1 19000 20000 21000 N/A N/A

Poly1 19500 20000 20500 0 -10 -20 5 10 15

Oxide2 7100 7500 7900 N/A N/A

Poly2 14250 15000 15750 0 -10 -20 10 20 30

Metal 4800 5200 5600 0 20 40 0.05 0.06 0.07

Polys are compressive, nitride and metal (Cr/Au) are tensile.

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MEMS Design & Fab

MCNC/LIGAMUMPS

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MCNC/LIGAMUMPS Design Rules

A, W, L must be greater than or equal to 20.0 microns.Photoresist aspect ratio, L/W, must be less than or equal to 10.


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