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George Mason University ECE 448 – FPGA and ASIC Design with VHDL
FPGAs – Survey of the Market
ECE 448Lecture 17
2 ECE 448 – FPGA and ASIC Design with VHDL
Resources
Xcell Journal
available for FREE on line
or in the printed form @
http://www.xilinx.com/publications/xcellonline/
FPGA and Structured ASIC Journal
available for FREE by e-mail or on the web @
http://www.fpgajournal.com/
3 ECE 448 – FPGA and ASIC Design with VHDL
FPGAs – State of the Market
4 ECE 448 – FPGA and ASIC Design with VHDL
Major FPGA vendors
SRAM-based FPGAsXilinx Inc. – www.xilinx.comAltera Corp. – www.altera.comAtmel Corp. – www.atmel.comLattice Semiconductor Corp.
– www.latticesemi.com
Antifuse and flash-based FPGAsActel Corp. – www.actel.comQuickLogic Corp. – www.quicklogic.com
5 ECE 448 – FPGA and ASIC Design with VHDL
The Programmable MarketplaceThe Programmable MarketplaceQ1 Calendar Year 2005
Source: Company reportsLatest information available; computed on a 4-quarter rolling basis
XilinxXilinxAltera
LatticeActel QuickLogic: 2% XilinxXilinx
All OthersAll Others
Two dominant suppliers, indicating a maturing market
PLD Segment FPGA Sub-Segment
Other: 2%
51%33%
5% 7%
AlteraAltera
58%
31% 11%
6 ECE 448 – FPGA and ASIC Design with VHDL
PLD Market SharePLD Market Share
Source: Gartner Dataquest
$2.3B$2.6B$4.1B$2.6B$2.1B $2.6B $3.1B
31% 33% 34% 32% 31% 32% 32%
39%32% 28% 24% 20% 18% 17%
49% 50%44%
38%35%
30%
51%
0%
20%
40%
60%
80%
100%
Calendar year 1998 1999 2000 2001 2002 2003 2004
Ma
rke
t S
ha
re (
%)
Xilinx Altera All Others
7 ECE 448 – FPGA and ASIC Design with VHDL
A Maturing MarketA Maturing Market
• Dominated by two players, Xilinx and Altera• With 51% and 32% share = 83% combined
• Remaining players scramble for niches• All non-dedicated players have given up:
• Intel, T.I., Motorola, NSC, AMD, Cypress, Philips…
• Late-comers have been absorbed or failed:• Dynachip, PlusLogic, Triscend, SiliconSpice (absorbed)
Chameleon, Quicksilver, Morphics, Adaptive Silicon (failed)
The pace of innovation is set by the leaders
8 ECE 448 – FPGA and ASIC Design with VHDL
Mainstream RequirementsMainstream Requirements
• Versatility, high performance, and low cost• Popular sub-functions @ ASIC performance and
cost• User-friendly and capable tools• Many available cores, helpful tech support• Easy (partial) re-programmability• Signal integrity on the pc-board• Compatible I/O levels and standards• Many size, speed, temp and package options• Small-quantity part availability for fast prototyping
9 ECE 448 – FPGA and ASIC Design with VHDL
FPGA families
Spartan 3 Virtex 4 LX / SX / FXSpartan 3E Virtex 5 LX/LXT/SXT/FXT
Spartan 3ASpartan 3ANSpartan 3A DSP
Low-cost High-performance
Xilinx
Altera Cyclone II Stratix II
Cyclone III Stratix II GX
Stratix III
10 ECE 448 – FPGA and ASIC Design with VHDL
Xilinx FPGA Families• Old families
• XC3000, XC4000, XC5200• Old 0.5µm, 0.35µm and 0.25µm technology. Not
recommended for modern designs.• Low Cost Family
• Spartan/XL – derived from XC4000• Spartan-II – derived from Virtex• Spartan-IIE – derived from Virtex-E• Spartan-3, Spartan-3E, Spartan-3A• Spartan-3AN, Spartan-3A DSP (90 nm)
• High-performance families• Virtex (220 nm)• Virtex-E, Virtex-EM (180 nm)• Virtex-II, Virtex-II PRO (130 nm)• Virtex-4 (90 nm)• Virtex-5 (65 nm)
Source: [Xilinx Inc.]
11 ECE 448 – FPGA and ASIC Design with VHDL
Virtex 4
Source: [Xilinx, Inc.]
12 ECE 448 – FPGA and ASIC Design with VHDL
Three Virtex-4 FamiliesThree Virtex-4 Families
• Application-Specific Modular Block Architecturemakes it easier to create sub-families• LX has logic, BlockRAMs, DSP-Blocks, I/O• SX has more DSP Blocks and BlockRAMs,
less logic• FX adds powerful system features:
• PPC, Ethernet controller, 11 Gbps transceivers
Virtex-4 = eight ‘LX, three ‘SX, six ‘FX circuits
17 family members available in 2005
13 ECE 448 – FPGA and ASIC Design with VHDL
Covering a Wide RangeCovering a Wide RangeTh
roug
hput
Arithmetic Performance
FX
LXSX
Network Processing Supercomputing
Scientific Processing
14 ECE 448 – FPGA and ASIC Design with VHDL
Prices of the most recent families of Xilinx FPGAs
Spartan 3 Virtex II, Virtex II-Pro
< $130* < $3,000*
Spartan 3E Virtex 4
< $35* < $3,000*
* approximate cost of the largest device per unit for
a batch of 10,000 units
Low-cost High-performance
15 ECE 448 – FPGA and ASIC Design with VHDL
Virtex-5 Product Roadmap
16 ECE 448 – FPGA and ASIC Design with VHDL
WHAT’S NEW IN THE VIRTEX-5 FPGA FAMILY
17 ECE 448 – FPGA and ASIC Design with VHDL
4-bit LUTs vs. 6-bit LUTs
18 ECE 448 – FPGA and ASIC Design with VHDL
Hard IP Blocks in Virtex 5
19 ECE 448 – FPGA and ASIC Design with VHDL
Virtex-5 vs. Virtex-4 Performance